* [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework
@ 2026-05-18 10:36 Mika Kahola
2026-05-18 10:36 ` [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper Mika Kahola
` (8 more replies)
0 siblings, 9 replies; 15+ messages in thread
From: Mika Kahola @ 2026-05-18 10:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Mika Kahola
Move DG2 MPLLB handling over to the shared DPLL framework.
DG2 is not yet integrated into the shared DPLL framework. Instead it
still handles MPLLB setup through DG2-specific paths: clock computation
calls intel_mpllb_calc_state() directly, encoder clock hooks enable and
disable MPLLB directly, and DDI readout reads MPLLB state directly from
the encoder path.
Add a DG2 DPLL manager for MPLLB-backed port PLLs and switch DG2 over
to use the generic DPLL framework compute, reserve, enable, disable,
and readout flow.
Split the series into four steps:
- refactor the MPLLB enable helper
- add DG2 DPLL manager support
- convert DG2 users to framework-style paths
- switch DG2 over to the DPLL framework and remove the old direct clock
hooks
Mika Kahola (4):
drm/i915/display: Split out DG2 MPLLB enable helper
drm/i915/display: Add DG2 MPLLB DPLL manager support
drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework
drm/i915/display: Switch DG2 to use DPLL framework
drivers/gpu/drm/i915/display/intel_ddi.c | 30 ++-
drivers/gpu/drm/i915/display/intel_dpll.c | 22 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 238 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 22 ++
.../drm/i915/display/intel_modeset_verify.c | 1 -
drivers/gpu/drm/i915/display/intel_snps_phy.c | 60 +----
drivers/gpu/drm/i915/display/intel_snps_phy.h | 2 +
7 files changed, 293 insertions(+), 82 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola @ 2026-05-18 10:36 ` Mika Kahola 2026-06-19 13:05 ` Michał Grzelak 2026-05-18 10:36 ` [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support Mika Kahola ` (7 subsequent siblings) 8 siblings, 1 reply; 15+ messages in thread From: Mika Kahola @ 2026-05-18 10:36 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: Mika Kahola Refactor the DG2 MPLLB enable path by splitting out a helper that programs the PHY directly from an intel_mpllb_state. This is preparatory work for moving DG2 MPLLB handling under the DPLL framework, where callbacks operate on dpll_hw_state rather than the full crtc_state. Assisted-by: Copilot:claude-sonnet-4-6 Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++++++++--- drivers/gpu/drm/i915/display/intel_snps_phy.h | 2 ++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c index bf9df566630f..dfb3a5c35c85 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c @@ -1816,11 +1816,10 @@ int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state, return -EINVAL; } -void intel_mpllb_enable(struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state) +void intel_mpllb_enable_phy(struct intel_encoder *encoder, + const struct intel_mpllb_state *pll_state) { struct intel_display *display = to_intel_display(encoder); - const struct intel_mpllb_state *pll_state = &crtc_state->dpll_hw_state.mpllb; enum phy phy = intel_encoder_to_phy(encoder); intel_reg_t enable_reg = (phy <= PHY_D ? DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0)); @@ -1875,6 +1874,12 @@ void intel_mpllb_enable(struct intel_encoder *encoder, */ } +void intel_mpllb_enable(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state) +{ + intel_mpllb_enable_phy(encoder, &crtc_state->dpll_hw_state.mpllb); +} + void intel_mpllb_disable(struct intel_encoder *encoder) { struct intel_display *display = to_intel_display(encoder); diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h index 7f96da22d028..2c7a5f2040f1 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.h +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h @@ -22,6 +22,8 @@ void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder, int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder); +void intel_mpllb_enable_phy(struct intel_encoder *encoder, + const struct intel_mpllb_state *pll_state); void intel_mpllb_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_mpllb_disable(struct intel_encoder *encoder); -- 2.43.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper 2026-05-18 10:36 ` [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper Mika Kahola @ 2026-06-19 13:05 ` Michał Grzelak 0 siblings, 0 replies; 15+ messages in thread From: Michał Grzelak @ 2026-06-19 13:05 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx, intel-xe [-- Attachment #1: Type: text/plain, Size: 2726 bytes --] On Mon, 18 May 2026, Mika Kahola wrote: > Refactor the DG2 MPLLB enable path by splitting out a helper that > programs the PHY directly from an intel_mpllb_state. > > This is preparatory work for moving DG2 MPLLB handling under the DPLL > framework, where callbacks operate on dpll_hw_state rather than the > full crtc_state. > > Assisted-by: Copilot:claude-sonnet-4-6 > Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> BR, Michał > --- > drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++++++++--- > drivers/gpu/drm/i915/display/intel_snps_phy.h | 2 ++ > 2 files changed, 10 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c > index bf9df566630f..dfb3a5c35c85 100644 > --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c > @@ -1816,11 +1816,10 @@ int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state, > return -EINVAL; > } > > -void intel_mpllb_enable(struct intel_encoder *encoder, > - const struct intel_crtc_state *crtc_state) > +void intel_mpllb_enable_phy(struct intel_encoder *encoder, > + const struct intel_mpllb_state *pll_state) > { > struct intel_display *display = to_intel_display(encoder); > - const struct intel_mpllb_state *pll_state = &crtc_state->dpll_hw_state.mpllb; > enum phy phy = intel_encoder_to_phy(encoder); > intel_reg_t enable_reg = (phy <= PHY_D ? > DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0)); > @@ -1875,6 +1874,12 @@ void intel_mpllb_enable(struct intel_encoder *encoder, > */ > } > > +void intel_mpllb_enable(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state) > +{ > + intel_mpllb_enable_phy(encoder, &crtc_state->dpll_hw_state.mpllb); > +} > + > void intel_mpllb_disable(struct intel_encoder *encoder) > { > struct intel_display *display = to_intel_display(encoder); > diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h > index 7f96da22d028..2c7a5f2040f1 100644 > --- a/drivers/gpu/drm/i915/display/intel_snps_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h > @@ -22,6 +22,8 @@ void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder, > > int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state, > struct intel_encoder *encoder); > +void intel_mpllb_enable_phy(struct intel_encoder *encoder, > + const struct intel_mpllb_state *pll_state); > void intel_mpllb_enable(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state); > void intel_mpllb_disable(struct intel_encoder *encoder); > -- > 2.43.0 > > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola 2026-05-18 10:36 ` [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper Mika Kahola @ 2026-05-18 10:36 ` Mika Kahola 2026-06-19 13:18 ` Michał Grzelak 2026-06-19 13:57 ` Imre Deak 2026-05-18 10:36 ` [PATCH 3/4] drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework Mika Kahola ` (6 subsequent siblings) 8 siblings, 2 replies; 15+ messages in thread From: Mika Kahola @ 2026-05-18 10:36 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: Mika Kahola Add DG2-specific DPLL manager infrastructure for MPLLB-backed port PLLs. Introduce PLL id mapping, DG2-specific DPLL callbacks for enable/disable/readout/frequency calculation, and manager callbacks for compute/get/dump/compare. The platform is not switched over yet. DG2's PLL-to-encoder lookup prefers the active encoder using the PLL, but fall back to a matching encoder for the fixed port-to-PLL mapping when no active user can be identified. This keeps the active-user fix for operational paths while allowing readout and verification paths to resolve the PHY even when pll->active_mask does not identify an active user. Assisted-by: Copilot:claude-sonnet-4-6 Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 227 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 22 ++ 2 files changed, 249 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index bb487e647f76..c03560532d94 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -42,6 +42,7 @@ #include "intel_lt_phy.h" #include "intel_mg_phy_regs.h" #include "intel_pch_refclk.h" +#include "intel_snps_phy.h" #include "intel_tc.h" /** @@ -4735,6 +4736,232 @@ static const struct intel_dpll_mgr xe3plpd_pll_mgr = { .compare_hw_state = xe3plpd_compare_hw_state, }; +enum intel_dpll_id dg2_port_to_pll_id(enum port port) +{ + switch (port) { + case PORT_A: + return DPLL_ID_DG2_DPLL_A; + case PORT_B: + return DPLL_ID_DG2_DPLL_B; + case PORT_C: + return DPLL_ID_DG2_DPLL_C; + case PORT_D_XELPD: + return DPLL_ID_DG2_DPLL_D; + case PORT_TC1: + return DPLL_ID_DG2_DPLL_E; + default: + MISSING_CASE(port); + return DPLL_ID_DG2_DPLL_A; + } +} + +static struct intel_encoder *dg2_get_intel_encoder(struct intel_display *display, + const struct intel_dpll *pll) +{ + struct intel_encoder *encoder; + struct intel_encoder *fallback = NULL; + + for_each_intel_encoder(display->drm, encoder) { + struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); + + if (dg2_port_to_pll_id(encoder->port) != pll->info->id) + continue; + + /* + * Multiple encoder objects may exist for the same physical port. + * Prefer the encoder that is actively using this PLL. + */ + if (crtc && (pll->active_mask & BIT(crtc->pipe))) + return encoder; + + /* + * Fall back to a matching encoder so that readout paths can + * still resolve the PHY when active_mask does not identify an + * active user. + */ + if (!fallback) + fallback = encoder; + } + + return fallback; +} + +static void dg2_mpllb_enable(struct intel_display *display, + struct intel_dpll *pll, + const struct intel_dpll_hw_state *dpll_hw_state) +{ + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); + + if (drm_WARN_ON(display->drm, !encoder)) + return; + + intel_mpllb_enable_phy(encoder, &dpll_hw_state->mpllb); +} + +static void dg2_mpllb_disable(struct intel_display *display, + struct intel_dpll *pll) +{ + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); + + if (drm_WARN_ON(display->drm, !encoder)) + return; + + intel_mpllb_disable(encoder); +} + +static bool dg2_mpllb_get_hw_state(struct intel_display *display, + struct intel_dpll *pll, + struct intel_dpll_hw_state *dpll_hw_state) +{ + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); + enum phy phy; + i915_reg_t enable_reg; + struct ref_tracker *wakeref; + bool ret = false; + u32 val; + + if (!encoder) + return false; + + wakeref = intel_display_power_get_if_enabled(display, + POWER_DOMAIN_DISPLAY_CORE); + if (!wakeref) + return false; + + phy = intel_encoder_to_phy(encoder); + enable_reg = (phy <= PHY_D ? DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0)); + + val = intel_de_read(display, enable_reg); + if (!(val & PLL_ENABLE)) + goto out; + + intel_mpllb_readout_hw_state(encoder, &dpll_hw_state->mpllb); + ret = true; + +out: + intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref); + return ret; +} + +static int dg2_mpllb_get_freq(struct intel_display *display, + const struct intel_dpll *pll, + const struct intel_dpll_hw_state *dpll_hw_state) +{ + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); + + if (drm_WARN_ON(display->drm, !encoder)) + return 0; + + return intel_mpllb_calc_port_clock(encoder, &dpll_hw_state->mpllb); +} + +static const struct intel_dpll_funcs mpllb_pll_funcs = { + .enable = dg2_mpllb_enable, + .disable = dg2_mpllb_disable, + .get_hw_state = dg2_mpllb_get_hw_state, + .get_freq = dg2_mpllb_get_freq, +}; + +static const struct dpll_info dg2_plls[] = { + { .name = "MPLLB A", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_A, }, + { .name = "MPLLB B", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_B, }, + { .name = "MPLLB C", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_C, }, + { .name = "MPLLB D", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_D, }, + { .name = "MPLLB E", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_E, }, + {} +}; + +static int dg2_compute_dplls(struct intel_atomic_state *state, + struct intel_crtc *crtc, + struct intel_encoder *encoder) +{ + struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct icl_port_dpll *port_dpll = + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; + int ret; + + ret = intel_mpllb_calc_state(crtc_state, encoder); + if (ret) + return ret; + + port_dpll->hw_state = crtc_state->dpll_hw_state; + + /* this is mainly for the fastset check */ + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); + + crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, + &port_dpll->hw_state.mpllb); + + return 0; +} + +static int dg2_get_dplls(struct intel_atomic_state *state, + struct intel_crtc *crtc, + struct intel_encoder *encoder) +{ + struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct icl_port_dpll *port_dpll = + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; + enum intel_dpll_id dpll_id = dg2_port_to_pll_id(encoder->port); + + port_dpll->pll = intel_find_dpll(state, crtc, + &port_dpll->hw_state, + BIT(dpll_id)); + if (!port_dpll->pll) + return -EINVAL; + + intel_reference_dpll(state, crtc, + port_dpll->pll, &port_dpll->hw_state); + + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); + + return 0; +} + +static void dg2_dump_hw_state(struct drm_printer *p, + const struct intel_dpll_hw_state *dpll_hw_state) +{ + const struct intel_mpllb_state *hw_state = &dpll_hw_state->mpllb; + + drm_printf(p, "dpll_hw_state: mpllb_cp: 0x%x, mpllb_div: 0x%x, " + "mpllb_div2: 0x%x, mpllb_fracn1: 0x%x, " + "mpllb_fracn2: 0x%x, mpllb_sscen: 0x%x, " + "mpllb_sscstep: 0x%x, ref_control: 0x%x\n", + hw_state->mpllb_cp, hw_state->mpllb_div, + hw_state->mpllb_div2, hw_state->mpllb_fracn1, + hw_state->mpllb_fracn2, hw_state->mpllb_sscen, + hw_state->mpllb_sscstep, hw_state->ref_control); +} + +static bool dg2_compare_hw_state(const struct intel_dpll_hw_state *_a, + const struct intel_dpll_hw_state *_b) +{ + const struct intel_mpllb_state *a = &_a->mpllb; + const struct intel_mpllb_state *b = &_b->mpllb; + + return a->mpllb_cp == b->mpllb_cp && + a->mpllb_div == b->mpllb_div && + a->mpllb_div2 == b->mpllb_div2 && + a->mpllb_fracn1 == b->mpllb_fracn1 && + a->mpllb_fracn2 == b->mpllb_fracn2 && + a->mpllb_sscen == b->mpllb_sscen && + a->mpllb_sscstep == b->mpllb_sscstep; +} + +__maybe_unused +static const struct intel_dpll_mgr dg2_pll_mgr = { + .dpll_info = dg2_plls, + .compute_dplls = dg2_compute_dplls, + .get_dplls = dg2_get_dplls, + .put_dplls = icl_put_dplls, + .update_active_dpll = icl_update_active_dpll, + .update_ref_clks = icl_update_dpll_ref_clks, + .dump_hw_state = dg2_dump_hw_state, + .compare_hw_state = dg2_compare_hw_state, +}; + /** * intel_dpll_init - Initialize DPLLs * @display: intel_display device diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index d408ccf6f902..f4b84733a58c 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -169,9 +169,31 @@ enum intel_dpll_id { * @DPLL_ID_DG1_DPLL3: DG1 combo PHY DPLL3 */ DPLL_ID_DG1_DPLL3 = 3, + + /** + * @DPLL_ID_DG2_DPLL_A: DG2 port PLL for PHY A (PORT_A) + */ + DPLL_ID_DG2_DPLL_A = 0, + /** + * @DPLL_ID_DG2_DPLL_B: DG2 port PLL for PHY B (PORT_B) + */ + DPLL_ID_DG2_DPLL_B = 1, + /** + * @DPLL_ID_DG2_DPLL_C: DG2 port PLL for PHY C (PORT_C) + */ + DPLL_ID_DG2_DPLL_C = 2, + /** + * @DPLL_ID_DG2_DPLL_D: DG2 port PLL for PHY D (PORT_D_XELPD) + */ + DPLL_ID_DG2_DPLL_D = 3, + /** + * @DPLL_ID_DG2_DPLL_E: DG2 port PLL for PHY F (PORT_TC1) + */ + DPLL_ID_DG2_DPLL_E = 4, }; #define I915_NUM_PLLS 9 +enum intel_dpll_id dg2_port_to_pll_id(enum port port); enum icl_port_dpll_id { ICL_PORT_DPLL_DEFAULT, -- 2.43.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support 2026-05-18 10:36 ` [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support Mika Kahola @ 2026-06-19 13:18 ` Michał Grzelak 2026-06-19 13:57 ` Imre Deak 1 sibling, 0 replies; 15+ messages in thread From: Michał Grzelak @ 2026-06-19 13:18 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx, intel-xe [-- Attachment #1: Type: text/plain, Size: 9820 bytes --] On Mon, 18 May 2026, Mika Kahola wrote: > Add DG2-specific DPLL manager infrastructure for MPLLB-backed port PLLs. > > Introduce PLL id mapping, DG2-specific DPLL callbacks for > enable/disable/readout/frequency calculation, and manager callbacks > for compute/get/dump/compare. The platform is not switched over yet. > > DG2's PLL-to-encoder lookup prefers the active encoder using the PLL, > but fall back to a matching encoder for the fixed port-to-PLL mapping > when no active user can be identified. > > This keeps the active-user fix for operational paths while allowing > readout and verification paths to resolve the PHY even when > pll->active_mask does not identify an active user. > > Assisted-by: Copilot:claude-sonnet-4-6 > Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> BR, Michał > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 227 ++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 22 ++ > 2 files changed, 249 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index bb487e647f76..c03560532d94 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -42,6 +42,7 @@ > #include "intel_lt_phy.h" > #include "intel_mg_phy_regs.h" > #include "intel_pch_refclk.h" > +#include "intel_snps_phy.h" > #include "intel_tc.h" > > /** > @@ -4735,6 +4736,232 @@ static const struct intel_dpll_mgr xe3plpd_pll_mgr = { > .compare_hw_state = xe3plpd_compare_hw_state, > }; > > +enum intel_dpll_id dg2_port_to_pll_id(enum port port) > +{ > + switch (port) { > + case PORT_A: > + return DPLL_ID_DG2_DPLL_A; > + case PORT_B: > + return DPLL_ID_DG2_DPLL_B; > + case PORT_C: > + return DPLL_ID_DG2_DPLL_C; > + case PORT_D_XELPD: > + return DPLL_ID_DG2_DPLL_D; > + case PORT_TC1: > + return DPLL_ID_DG2_DPLL_E; > + default: > + MISSING_CASE(port); > + return DPLL_ID_DG2_DPLL_A; > + } > +} > + > +static struct intel_encoder *dg2_get_intel_encoder(struct intel_display *display, > + const struct intel_dpll *pll) > +{ > + struct intel_encoder *encoder; > + struct intel_encoder *fallback = NULL; > + > + for_each_intel_encoder(display->drm, encoder) { > + struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > + > + if (dg2_port_to_pll_id(encoder->port) != pll->info->id) > + continue; > + > + /* > + * Multiple encoder objects may exist for the same physical port. > + * Prefer the encoder that is actively using this PLL. > + */ > + if (crtc && (pll->active_mask & BIT(crtc->pipe))) > + return encoder; > + > + /* > + * Fall back to a matching encoder so that readout paths can > + * still resolve the PHY when active_mask does not identify an > + * active user. > + */ > + if (!fallback) > + fallback = encoder; > + } > + > + return fallback; > +} > + > +static void dg2_mpllb_enable(struct intel_display *display, > + struct intel_dpll *pll, > + const struct intel_dpll_hw_state *dpll_hw_state) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + > + if (drm_WARN_ON(display->drm, !encoder)) > + return; > + > + intel_mpllb_enable_phy(encoder, &dpll_hw_state->mpllb); > +} > + > +static void dg2_mpllb_disable(struct intel_display *display, > + struct intel_dpll *pll) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + > + if (drm_WARN_ON(display->drm, !encoder)) > + return; > + > + intel_mpllb_disable(encoder); > +} > + > +static bool dg2_mpllb_get_hw_state(struct intel_display *display, > + struct intel_dpll *pll, > + struct intel_dpll_hw_state *dpll_hw_state) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + enum phy phy; > + i915_reg_t enable_reg; > + struct ref_tracker *wakeref; > + bool ret = false; > + u32 val; > + > + if (!encoder) > + return false; > + > + wakeref = intel_display_power_get_if_enabled(display, > + POWER_DOMAIN_DISPLAY_CORE); > + if (!wakeref) > + return false; > + > + phy = intel_encoder_to_phy(encoder); > + enable_reg = (phy <= PHY_D ? DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0)); > + > + val = intel_de_read(display, enable_reg); > + if (!(val & PLL_ENABLE)) > + goto out; > + > + intel_mpllb_readout_hw_state(encoder, &dpll_hw_state->mpllb); > + ret = true; > + > +out: > + intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref); > + return ret; > +} > + > +static int dg2_mpllb_get_freq(struct intel_display *display, > + const struct intel_dpll *pll, > + const struct intel_dpll_hw_state *dpll_hw_state) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + > + if (drm_WARN_ON(display->drm, !encoder)) > + return 0; > + > + return intel_mpllb_calc_port_clock(encoder, &dpll_hw_state->mpllb); > +} > + > +static const struct intel_dpll_funcs mpllb_pll_funcs = { > + .enable = dg2_mpllb_enable, > + .disable = dg2_mpllb_disable, > + .get_hw_state = dg2_mpllb_get_hw_state, > + .get_freq = dg2_mpllb_get_freq, > +}; > + > +static const struct dpll_info dg2_plls[] = { > + { .name = "MPLLB A", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_A, }, > + { .name = "MPLLB B", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_B, }, > + { .name = "MPLLB C", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_C, }, > + { .name = "MPLLB D", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_D, }, > + { .name = "MPLLB E", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_E, }, > + {} > +}; > + > +static int dg2_compute_dplls(struct intel_atomic_state *state, > + struct intel_crtc *crtc, > + struct intel_encoder *encoder) > +{ > + struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + struct icl_port_dpll *port_dpll = > + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; > + int ret; > + > + ret = intel_mpllb_calc_state(crtc_state, encoder); > + if (ret) > + return ret; > + > + port_dpll->hw_state = crtc_state->dpll_hw_state; > + > + /* this is mainly for the fastset check */ > + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); > + > + crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, > + &port_dpll->hw_state.mpllb); > + > + return 0; > +} > + > +static int dg2_get_dplls(struct intel_atomic_state *state, > + struct intel_crtc *crtc, > + struct intel_encoder *encoder) > +{ > + struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + struct icl_port_dpll *port_dpll = > + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; > + enum intel_dpll_id dpll_id = dg2_port_to_pll_id(encoder->port); > + > + port_dpll->pll = intel_find_dpll(state, crtc, > + &port_dpll->hw_state, > + BIT(dpll_id)); > + if (!port_dpll->pll) > + return -EINVAL; > + > + intel_reference_dpll(state, crtc, > + port_dpll->pll, &port_dpll->hw_state); > + > + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); > + > + return 0; > +} > + > +static void dg2_dump_hw_state(struct drm_printer *p, > + const struct intel_dpll_hw_state *dpll_hw_state) > +{ > + const struct intel_mpllb_state *hw_state = &dpll_hw_state->mpllb; > + > + drm_printf(p, "dpll_hw_state: mpllb_cp: 0x%x, mpllb_div: 0x%x, " > + "mpllb_div2: 0x%x, mpllb_fracn1: 0x%x, " > + "mpllb_fracn2: 0x%x, mpllb_sscen: 0x%x, " > + "mpllb_sscstep: 0x%x, ref_control: 0x%x\n", > + hw_state->mpllb_cp, hw_state->mpllb_div, > + hw_state->mpllb_div2, hw_state->mpllb_fracn1, > + hw_state->mpllb_fracn2, hw_state->mpllb_sscen, > + hw_state->mpllb_sscstep, hw_state->ref_control); > +} > + > +static bool dg2_compare_hw_state(const struct intel_dpll_hw_state *_a, > + const struct intel_dpll_hw_state *_b) > +{ > + const struct intel_mpllb_state *a = &_a->mpllb; > + const struct intel_mpllb_state *b = &_b->mpllb; > + > + return a->mpllb_cp == b->mpllb_cp && > + a->mpllb_div == b->mpllb_div && > + a->mpllb_div2 == b->mpllb_div2 && > + a->mpllb_fracn1 == b->mpllb_fracn1 && > + a->mpllb_fracn2 == b->mpllb_fracn2 && > + a->mpllb_sscen == b->mpllb_sscen && > + a->mpllb_sscstep == b->mpllb_sscstep; > +} > + > +__maybe_unused > +static const struct intel_dpll_mgr dg2_pll_mgr = { > + .dpll_info = dg2_plls, > + .compute_dplls = dg2_compute_dplls, > + .get_dplls = dg2_get_dplls, > + .put_dplls = icl_put_dplls, > + .update_active_dpll = icl_update_active_dpll, > + .update_ref_clks = icl_update_dpll_ref_clks, > + .dump_hw_state = dg2_dump_hw_state, > + .compare_hw_state = dg2_compare_hw_state, > +}; > + > /** > * intel_dpll_init - Initialize DPLLs > * @display: intel_display device > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > index d408ccf6f902..f4b84733a58c 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > @@ -169,9 +169,31 @@ enum intel_dpll_id { > * @DPLL_ID_DG1_DPLL3: DG1 combo PHY DPLL3 > */ > DPLL_ID_DG1_DPLL3 = 3, > + > + /** > + * @DPLL_ID_DG2_DPLL_A: DG2 port PLL for PHY A (PORT_A) > + */ > + DPLL_ID_DG2_DPLL_A = 0, > + /** > + * @DPLL_ID_DG2_DPLL_B: DG2 port PLL for PHY B (PORT_B) > + */ > + DPLL_ID_DG2_DPLL_B = 1, > + /** > + * @DPLL_ID_DG2_DPLL_C: DG2 port PLL for PHY C (PORT_C) > + */ > + DPLL_ID_DG2_DPLL_C = 2, > + /** > + * @DPLL_ID_DG2_DPLL_D: DG2 port PLL for PHY D (PORT_D_XELPD) > + */ > + DPLL_ID_DG2_DPLL_D = 3, > + /** > + * @DPLL_ID_DG2_DPLL_E: DG2 port PLL for PHY F (PORT_TC1) > + */ > + DPLL_ID_DG2_DPLL_E = 4, > }; > > #define I915_NUM_PLLS 9 > +enum intel_dpll_id dg2_port_to_pll_id(enum port port); > > enum icl_port_dpll_id { > ICL_PORT_DPLL_DEFAULT, > -- > 2.43.0 > > ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support 2026-05-18 10:36 ` [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support Mika Kahola 2026-06-19 13:18 ` Michał Grzelak @ 2026-06-19 13:57 ` Imre Deak 1 sibling, 0 replies; 15+ messages in thread From: Imre Deak @ 2026-06-19 13:57 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx, intel-xe On Mon, May 18, 2026 at 10:36:40AM +0000, Mika Kahola wrote: > Add DG2-specific DPLL manager infrastructure for MPLLB-backed port PLLs. > > Introduce PLL id mapping, DG2-specific DPLL callbacks for > enable/disable/readout/frequency calculation, and manager callbacks > for compute/get/dump/compare. The platform is not switched over yet. > > DG2's PLL-to-encoder lookup prefers the active encoder using the PLL, > but fall back to a matching encoder for the fixed port-to-PLL mapping > when no active user can be identified. > > This keeps the active-user fix for operational paths while allowing > readout and verification paths to resolve the PHY even when > pll->active_mask does not identify an active user. > > Assisted-by: Copilot:claude-sonnet-4-6 > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 227 ++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 22 ++ > 2 files changed, 249 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index bb487e647f76..c03560532d94 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -42,6 +42,7 @@ > #include "intel_lt_phy.h" > #include "intel_mg_phy_regs.h" > #include "intel_pch_refclk.h" > +#include "intel_snps_phy.h" > #include "intel_tc.h" > > /** > @@ -4735,6 +4736,232 @@ static const struct intel_dpll_mgr xe3plpd_pll_mgr = { > .compare_hw_state = xe3plpd_compare_hw_state, > }; > > +enum intel_dpll_id dg2_port_to_pll_id(enum port port) > +{ > + switch (port) { > + case PORT_A: > + return DPLL_ID_DG2_DPLL_A; > + case PORT_B: > + return DPLL_ID_DG2_DPLL_B; > + case PORT_C: > + return DPLL_ID_DG2_DPLL_C; > + case PORT_D_XELPD: > + return DPLL_ID_DG2_DPLL_D; > + case PORT_TC1: > + return DPLL_ID_DG2_DPLL_E; > + default: > + MISSING_CASE(port); > + return DPLL_ID_DG2_DPLL_A; > + } > +} > + > +static struct intel_encoder *dg2_get_intel_encoder(struct intel_display *display, > + const struct intel_dpll *pll) > +{ > + struct intel_encoder *encoder; > + struct intel_encoder *fallback = NULL; > + > + for_each_intel_encoder(display->drm, encoder) { > + struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > + > + if (dg2_port_to_pll_id(encoder->port) != pll->info->id) > + continue; > + > + /* > + * Multiple encoder objects may exist for the same physical port. > + * Prefer the encoder that is actively using this PLL. > + */ > + if (crtc && (pll->active_mask & BIT(crtc->pipe))) > + return encoder; This looks wrong. Could you provide the details (i.e. the encoder->type) for the encoders you see using the same port? I suppose it could be MST per-pipe encoders, but in that case it's not the per-pipe encoder selected above which should be used for enabling the PLL. The PLL is specific to the whole MST link in that case, not to the streams/pipes on the link. So the primary encoder should be selected above, matching what has been done before. For that you could select an encoder only if intel_encoder_is_dig_port(encoder)) is true for it. > + > + /* > + * Fall back to a matching encoder so that readout paths can > + * still resolve the PHY when active_mask does not identify an > + * active user. > + */ > + if (!fallback) > + fallback = encoder; > + } > + > + return fallback; > +} > + > +static void dg2_mpllb_enable(struct intel_display *display, > + struct intel_dpll *pll, > + const struct intel_dpll_hw_state *dpll_hw_state) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + > + if (drm_WARN_ON(display->drm, !encoder)) > + return; > + > + intel_mpllb_enable_phy(encoder, &dpll_hw_state->mpllb); > +} > + > +static void dg2_mpllb_disable(struct intel_display *display, > + struct intel_dpll *pll) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + > + if (drm_WARN_ON(display->drm, !encoder)) > + return; > + > + intel_mpllb_disable(encoder); > +} > + > +static bool dg2_mpllb_get_hw_state(struct intel_display *display, > + struct intel_dpll *pll, > + struct intel_dpll_hw_state *dpll_hw_state) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + enum phy phy; > + i915_reg_t enable_reg; > + struct ref_tracker *wakeref; > + bool ret = false; > + u32 val; > + > + if (!encoder) > + return false; > + > + wakeref = intel_display_power_get_if_enabled(display, > + POWER_DOMAIN_DISPLAY_CORE); > + if (!wakeref) > + return false; > + > + phy = intel_encoder_to_phy(encoder); > + enable_reg = (phy <= PHY_D ? DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0)); > + > + val = intel_de_read(display, enable_reg); > + if (!(val & PLL_ENABLE)) > + goto out; > + > + intel_mpllb_readout_hw_state(encoder, &dpll_hw_state->mpllb); > + ret = true; > + > +out: > + intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref); > + return ret; > +} > + > +static int dg2_mpllb_get_freq(struct intel_display *display, > + const struct intel_dpll *pll, > + const struct intel_dpll_hw_state *dpll_hw_state) > +{ > + struct intel_encoder *encoder = dg2_get_intel_encoder(display, pll); > + > + if (drm_WARN_ON(display->drm, !encoder)) > + return 0; > + > + return intel_mpllb_calc_port_clock(encoder, &dpll_hw_state->mpllb); > +} > + > +static const struct intel_dpll_funcs mpllb_pll_funcs = { > + .enable = dg2_mpllb_enable, > + .disable = dg2_mpllb_disable, > + .get_hw_state = dg2_mpllb_get_hw_state, > + .get_freq = dg2_mpllb_get_freq, > +}; > + > +static const struct dpll_info dg2_plls[] = { > + { .name = "MPLLB A", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_A, }, > + { .name = "MPLLB B", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_B, }, > + { .name = "MPLLB C", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_C, }, > + { .name = "MPLLB D", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_D, }, > + { .name = "MPLLB E", .funcs = &mpllb_pll_funcs, .id = DPLL_ID_DG2_DPLL_E, }, > + {} > +}; > + > +static int dg2_compute_dplls(struct intel_atomic_state *state, > + struct intel_crtc *crtc, > + struct intel_encoder *encoder) > +{ > + struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + struct icl_port_dpll *port_dpll = > + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; > + int ret; > + > + ret = intel_mpllb_calc_state(crtc_state, encoder); > + if (ret) > + return ret; > + > + port_dpll->hw_state = crtc_state->dpll_hw_state; > + > + /* this is mainly for the fastset check */ > + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); > + > + crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, > + &port_dpll->hw_state.mpllb); > + > + return 0; > +} > + > +static int dg2_get_dplls(struct intel_atomic_state *state, > + struct intel_crtc *crtc, > + struct intel_encoder *encoder) > +{ > + struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + struct icl_port_dpll *port_dpll = > + &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; > + enum intel_dpll_id dpll_id = dg2_port_to_pll_id(encoder->port); > + > + port_dpll->pll = intel_find_dpll(state, crtc, > + &port_dpll->hw_state, > + BIT(dpll_id)); > + if (!port_dpll->pll) > + return -EINVAL; > + > + intel_reference_dpll(state, crtc, > + port_dpll->pll, &port_dpll->hw_state); > + > + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); > + > + return 0; > +} > + > +static void dg2_dump_hw_state(struct drm_printer *p, > + const struct intel_dpll_hw_state *dpll_hw_state) > +{ > + const struct intel_mpllb_state *hw_state = &dpll_hw_state->mpllb; > + > + drm_printf(p, "dpll_hw_state: mpllb_cp: 0x%x, mpllb_div: 0x%x, " > + "mpllb_div2: 0x%x, mpllb_fracn1: 0x%x, " > + "mpllb_fracn2: 0x%x, mpllb_sscen: 0x%x, " > + "mpllb_sscstep: 0x%x, ref_control: 0x%x\n", > + hw_state->mpllb_cp, hw_state->mpllb_div, > + hw_state->mpllb_div2, hw_state->mpllb_fracn1, > + hw_state->mpllb_fracn2, hw_state->mpllb_sscen, > + hw_state->mpllb_sscstep, hw_state->ref_control); > +} > + > +static bool dg2_compare_hw_state(const struct intel_dpll_hw_state *_a, > + const struct intel_dpll_hw_state *_b) > +{ > + const struct intel_mpllb_state *a = &_a->mpllb; > + const struct intel_mpllb_state *b = &_b->mpllb; > + > + return a->mpllb_cp == b->mpllb_cp && > + a->mpllb_div == b->mpllb_div && > + a->mpllb_div2 == b->mpllb_div2 && > + a->mpllb_fracn1 == b->mpllb_fracn1 && > + a->mpllb_fracn2 == b->mpllb_fracn2 && > + a->mpllb_sscen == b->mpllb_sscen && > + a->mpllb_sscstep == b->mpllb_sscstep; > +} > + > +__maybe_unused > +static const struct intel_dpll_mgr dg2_pll_mgr = { > + .dpll_info = dg2_plls, > + .compute_dplls = dg2_compute_dplls, > + .get_dplls = dg2_get_dplls, > + .put_dplls = icl_put_dplls, > + .update_active_dpll = icl_update_active_dpll, > + .update_ref_clks = icl_update_dpll_ref_clks, > + .dump_hw_state = dg2_dump_hw_state, > + .compare_hw_state = dg2_compare_hw_state, > +}; > + > /** > * intel_dpll_init - Initialize DPLLs > * @display: intel_display device > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > index d408ccf6f902..f4b84733a58c 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > @@ -169,9 +169,31 @@ enum intel_dpll_id { > * @DPLL_ID_DG1_DPLL3: DG1 combo PHY DPLL3 > */ > DPLL_ID_DG1_DPLL3 = 3, > + > + /** > + * @DPLL_ID_DG2_DPLL_A: DG2 port PLL for PHY A (PORT_A) > + */ > + DPLL_ID_DG2_DPLL_A = 0, > + /** > + * @DPLL_ID_DG2_DPLL_B: DG2 port PLL for PHY B (PORT_B) > + */ > + DPLL_ID_DG2_DPLL_B = 1, > + /** > + * @DPLL_ID_DG2_DPLL_C: DG2 port PLL for PHY C (PORT_C) > + */ > + DPLL_ID_DG2_DPLL_C = 2, > + /** > + * @DPLL_ID_DG2_DPLL_D: DG2 port PLL for PHY D (PORT_D_XELPD) > + */ > + DPLL_ID_DG2_DPLL_D = 3, > + /** > + * @DPLL_ID_DG2_DPLL_E: DG2 port PLL for PHY F (PORT_TC1) > + */ > + DPLL_ID_DG2_DPLL_E = 4, > }; > > #define I915_NUM_PLLS 9 > +enum intel_dpll_id dg2_port_to_pll_id(enum port port); > > enum icl_port_dpll_id { > ICL_PORT_DPLL_DEFAULT, > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/4] drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola 2026-05-18 10:36 ` [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper Mika Kahola 2026-05-18 10:36 ` [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support Mika Kahola @ 2026-05-18 10:36 ` Mika Kahola 2026-06-19 13:18 ` Michał Grzelak 2026-05-18 10:36 ` [PATCH 4/4] drm/i915/display: Switch DG2 to use " Mika Kahola ` (5 subsequent siblings) 8 siblings, 1 reply; 15+ messages in thread From: Mika Kahola @ 2026-05-18 10:36 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: Mika Kahola Prepare DG2 users to obtain clock state and reserve PLLs through the shared DPLL framework. Replace the DG2-specific compute hook with the generic framework-backed helpers. Assisted-by: Copilot:claude-sonnet-4-6 Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 28 ++++++++++++++++++++--- drivers/gpu/drm/i915/display/intel_dpll.c | 22 ++---------------- 2 files changed, 27 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 86520848892e..b6799ed24de4 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4307,11 +4307,33 @@ static void mtl_ddi_tc_phy_get_config(struct intel_encoder *encoder, mtl_port_to_pll_id(display, encoder->port)); } +static struct intel_dpll *dg2_ddi_get_pll(struct intel_encoder *encoder) +{ + struct intel_display *display = to_intel_display(encoder); + + return intel_get_dpll_by_id(display, dg2_port_to_pll_id(encoder->port)); +} + static void dg2_ddi_get_config(struct intel_encoder *encoder, - struct intel_crtc_state *crtc_state) + struct intel_crtc_state *crtc_state) { - intel_mpllb_readout_hw_state(encoder, &crtc_state->dpll_hw_state.mpllb); - crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, &crtc_state->dpll_hw_state.mpllb); + struct icl_port_dpll *port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; + struct intel_dpll *pll = dg2_ddi_get_pll(encoder); + + if (pll) + intel_ddi_get_clock(encoder, crtc_state, pll); + + /* + * Keep the hw readout robust against unexpected NULL PLL lookups, + * so modeset verify always has intel_dpll populated for DG2. + */ + if (!crtc_state->intel_dpll) { + port_dpll->pll = pll; + intel_mpllb_readout_hw_state(encoder, &port_dpll->hw_state.mpllb); + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); + crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, + &port_dpll->hw_state.mpllb); + } intel_ddi_get_config(encoder, crtc_state); } diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index f40807a5566b..20fd091cb9db 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -22,7 +22,6 @@ #include "intel_lvds_regs.h" #include "intel_panel.h" #include "intel_pps.h" -#include "intel_snps_phy.h" #include "vlv_dpio_phy_regs.h" #include "vlv_sideband.h" @@ -1194,24 +1193,6 @@ static int hsw_crtc_get_dpll(struct intel_atomic_state *state, return intel_dpll_reserve(state, crtc, encoder); } -static int dg2_crtc_compute_clock(struct intel_atomic_state *state, - struct intel_crtc *crtc) -{ - struct intel_crtc_state *crtc_state = - intel_atomic_get_new_crtc_state(state, crtc); - struct intel_encoder *encoder = - intel_get_crtc_new_encoder(state, crtc_state); - int ret; - - ret = intel_mpllb_calc_state(crtc_state, encoder); - if (ret) - return ret; - - crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state); - - return 0; -} - static int ilk_fb_cb_factor(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); @@ -1682,7 +1663,8 @@ static const struct intel_dpll_global_funcs mtl_dpll_funcs = { }; static const struct intel_dpll_global_funcs dg2_dpll_funcs = { - .crtc_compute_clock = dg2_crtc_compute_clock, + .crtc_compute_clock = hsw_crtc_compute_clock, + .crtc_get_dpll = hsw_crtc_get_dpll, }; static const struct intel_dpll_global_funcs hsw_dpll_funcs = { -- 2.43.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 3/4] drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework 2026-05-18 10:36 ` [PATCH 3/4] drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework Mika Kahola @ 2026-06-19 13:18 ` Michał Grzelak 0 siblings, 0 replies; 15+ messages in thread From: Michał Grzelak @ 2026-06-19 13:18 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx, intel-xe [-- Attachment #1: Type: text/plain, Size: 3922 bytes --] On Mon, 18 May 2026, Mika Kahola wrote: > Prepare DG2 users to obtain clock state and reserve PLLs through the > shared DPLL framework. > > Replace the DG2-specific compute hook with the generic framework-backed > helpers. > > Assisted-by: Copilot:claude-sonnet-4-6 > Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> BR, Michał > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 28 ++++++++++++++++++++--- > drivers/gpu/drm/i915/display/intel_dpll.c | 22 ++---------------- > 2 files changed, 27 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 86520848892e..b6799ed24de4 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4307,11 +4307,33 @@ static void mtl_ddi_tc_phy_get_config(struct intel_encoder *encoder, > mtl_port_to_pll_id(display, encoder->port)); > } > > +static struct intel_dpll *dg2_ddi_get_pll(struct intel_encoder *encoder) > +{ > + struct intel_display *display = to_intel_display(encoder); > + > + return intel_get_dpll_by_id(display, dg2_port_to_pll_id(encoder->port)); > +} > + > static void dg2_ddi_get_config(struct intel_encoder *encoder, > - struct intel_crtc_state *crtc_state) > + struct intel_crtc_state *crtc_state) > { > - intel_mpllb_readout_hw_state(encoder, &crtc_state->dpll_hw_state.mpllb); > - crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, &crtc_state->dpll_hw_state.mpllb); > + struct icl_port_dpll *port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; > + struct intel_dpll *pll = dg2_ddi_get_pll(encoder); > + > + if (pll) > + intel_ddi_get_clock(encoder, crtc_state, pll); > + > + /* > + * Keep the hw readout robust against unexpected NULL PLL lookups, > + * so modeset verify always has intel_dpll populated for DG2. > + */ > + if (!crtc_state->intel_dpll) { > + port_dpll->pll = pll; > + intel_mpllb_readout_hw_state(encoder, &port_dpll->hw_state.mpllb); > + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); > + crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, > + &port_dpll->hw_state.mpllb); > + } > > intel_ddi_get_config(encoder, crtc_state); > } > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c > index f40807a5566b..20fd091cb9db 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -22,7 +22,6 @@ > #include "intel_lvds_regs.h" > #include "intel_panel.h" > #include "intel_pps.h" > -#include "intel_snps_phy.h" > #include "vlv_dpio_phy_regs.h" > #include "vlv_sideband.h" > > @@ -1194,24 +1193,6 @@ static int hsw_crtc_get_dpll(struct intel_atomic_state *state, > return intel_dpll_reserve(state, crtc, encoder); > } > > -static int dg2_crtc_compute_clock(struct intel_atomic_state *state, > - struct intel_crtc *crtc) > -{ > - struct intel_crtc_state *crtc_state = > - intel_atomic_get_new_crtc_state(state, crtc); > - struct intel_encoder *encoder = > - intel_get_crtc_new_encoder(state, crtc_state); > - int ret; > - > - ret = intel_mpllb_calc_state(crtc_state, encoder); > - if (ret) > - return ret; > - > - crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state); > - > - return 0; > -} > - > static int ilk_fb_cb_factor(const struct intel_crtc_state *crtc_state) > { > struct intel_display *display = to_intel_display(crtc_state); > @@ -1682,7 +1663,8 @@ static const struct intel_dpll_global_funcs mtl_dpll_funcs = { > }; > > static const struct intel_dpll_global_funcs dg2_dpll_funcs = { > - .crtc_compute_clock = dg2_crtc_compute_clock, > + .crtc_compute_clock = hsw_crtc_compute_clock, > + .crtc_get_dpll = hsw_crtc_get_dpll, > }; > > static const struct intel_dpll_global_funcs hsw_dpll_funcs = { > -- > 2.43.0 > > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 4/4] drm/i915/display: Switch DG2 to use DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola ` (2 preceding siblings ...) 2026-05-18 10:36 ` [PATCH 3/4] drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework Mika Kahola @ 2026-05-18 10:36 ` Mika Kahola 2026-06-19 13:19 ` Michał Grzelak 2026-05-18 10:43 ` ✓ CI.KUnit: success for drm/i915/display: Switch DG2 MPLLB handling to the " Patchwork ` (4 subsequent siblings) 8 siblings, 1 reply; 15+ messages in thread From: Mika Kahola @ 2026-05-18 10:36 UTC (permalink / raw) To: intel-gfx, intel-xe; +Cc: Mika Kahola Now that DG2 has a DPLL manager and its users are prepared to obtain clock state through the framework, switch the platform over to use the shared DPLL manager. Remove specific MPLLB state verification and use .compare_hw function hook to compare HW and SW PLL states. Assisted-by: Copilot:claude-sonnet-4-6 Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 - drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 +++-- .../drm/i915/display/intel_modeset_verify.c | 1 - drivers/gpu/drm/i915/display/intel_snps_phy.c | 49 ------------------- 4 files changed, 8 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index b6799ed24de4..1c4820430b68 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -5330,8 +5330,6 @@ void intel_ddi_init(struct intel_display *display, else encoder->get_config = mtl_ddi_non_tc_phy_get_config; } else if (display->platform.dg2) { - encoder->enable_clock = intel_mpllb_enable; - encoder->disable_clock = intel_mpllb_disable; encoder->get_config = dg2_ddi_get_config; } else if (display->platform.alderlake_s) { encoder->enable_clock = adls_ddi_enable_clock; diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index c03560532d94..6678188e3563 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4950,7 +4950,6 @@ static bool dg2_compare_hw_state(const struct intel_dpll_hw_state *_a, a->mpllb_sscstep == b->mpllb_sscstep; } -__maybe_unused static const struct intel_dpll_mgr dg2_pll_mgr = { .dpll_info = dg2_plls, .compute_dplls = dg2_compute_dplls, @@ -4977,8 +4976,7 @@ void intel_dpll_init(struct intel_display *display) mutex_init(&display->dpll.lock); if (display->platform.dg2) - /* No shared DPLLs on DG2; port PLLs are part of the PHY */ - dpll_mgr = NULL; + dpll_mgr = &dg2_pll_mgr; else if (DISPLAY_VER(display) >= 35) dpll_mgr = &xe3plpd_pll_mgr; else if (DISPLAY_VER(display) >= 14) @@ -5347,8 +5345,13 @@ verify_single_dpll_state(struct intel_display *display, if (pll->on) { const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr; - - if (HAS_LT_PHY(display)) + /* + * Avoid direct struct comparison here. Some hw state fields, such + * as DG2 MPLLB ref_control or LT PHY config[1], are written by + * firmware and may differ from the software state without indicating + * a real mismatch. + */ + if (HAS_LT_PHY(display) || display->platform.dg2) pll_mismatch = !dpll_mgr->compare_hw_state(&pll->state.hw_state, &dpll_hw_state); else diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 2ec17c2bfe0f..f0761d8a7437 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -245,7 +245,6 @@ void intel_modeset_verify_crtc(struct intel_atomic_state *state, verify_connector_state(state, crtc); verify_crtc_state(state, crtc); intel_dpll_state_verify(state, crtc); - intel_mpllb_state_verify(state, crtc); } void intel_modeset_verify_disabled(struct intel_atomic_state *state) diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c index dfb3a5c35c85..ce94ac689064 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c @@ -1982,52 +1982,3 @@ void intel_mpllb_readout_hw_state(struct intel_encoder *encoder, */ pll_state->mpllb_div &= ~SNPS_PHY_MPLLB_FORCE_EN; } - -void intel_mpllb_state_verify(struct intel_atomic_state *state, - struct intel_crtc *crtc) -{ - struct intel_display *display = to_intel_display(state); - const struct intel_crtc_state *new_crtc_state = - intel_atomic_get_new_crtc_state(state, crtc); - struct intel_mpllb_state mpllb_hw_state = {}; - const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->dpll_hw_state.mpllb; - struct intel_encoder *encoder; - - if (!display->platform.dg2) - return; - - if (!new_crtc_state->hw.active) - return; - - /* intel_get_crtc_new_encoder() only works for modeset/fastset commits */ - if (!intel_crtc_needs_modeset(new_crtc_state) && - !intel_crtc_needs_fastset(new_crtc_state)) - return; - - encoder = intel_get_crtc_new_encoder(state, new_crtc_state); - intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state); - -#define MPLLB_CHECK(__name) \ - INTEL_DISPLAY_STATE_WARN(display, mpllb_sw_state->__name != mpllb_hw_state.__name, \ - "[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \ - crtc->base.base.id, crtc->base.name, \ - __stringify(__name), \ - mpllb_sw_state->__name, mpllb_hw_state.__name) - - MPLLB_CHECK(mpllb_cp); - MPLLB_CHECK(mpllb_div); - MPLLB_CHECK(mpllb_div2); - MPLLB_CHECK(mpllb_fracn1); - MPLLB_CHECK(mpllb_fracn2); - MPLLB_CHECK(mpllb_sscen); - MPLLB_CHECK(mpllb_sscstep); - - /* - * ref_control is handled by the hardware/firemware and never - * programmed by the software, but the proper values are supplied - * in the bspec for verification purposes. - */ - MPLLB_CHECK(ref_control); - -#undef MPLLB_CHECK -} -- 2.43.0 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 4/4] drm/i915/display: Switch DG2 to use DPLL framework 2026-05-18 10:36 ` [PATCH 4/4] drm/i915/display: Switch DG2 to use " Mika Kahola @ 2026-06-19 13:19 ` Michał Grzelak 0 siblings, 0 replies; 15+ messages in thread From: Michał Grzelak @ 2026-06-19 13:19 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx, intel-xe [-- Attachment #1: Type: text/plain, Size: 5725 bytes --] On Mon, 18 May 2026, Mika Kahola wrote: > Now that DG2 has a DPLL manager and its users are prepared to obtain > clock state through the framework, switch the platform over to use the > shared DPLL manager. > > Remove specific MPLLB state verification and use .compare_hw function > hook to compare HW and SW PLL states. > > Assisted-by: Copilot:claude-sonnet-4-6 > Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> BR, Michał > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 2 - > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 +++-- > .../drm/i915/display/intel_modeset_verify.c | 1 - > drivers/gpu/drm/i915/display/intel_snps_phy.c | 49 ------------------- > 4 files changed, 8 insertions(+), 57 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index b6799ed24de4..1c4820430b68 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -5330,8 +5330,6 @@ void intel_ddi_init(struct intel_display *display, > else > encoder->get_config = mtl_ddi_non_tc_phy_get_config; > } else if (display->platform.dg2) { > - encoder->enable_clock = intel_mpllb_enable; > - encoder->disable_clock = intel_mpllb_disable; > encoder->get_config = dg2_ddi_get_config; > } else if (display->platform.alderlake_s) { > encoder->enable_clock = adls_ddi_enable_clock; > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index c03560532d94..6678188e3563 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -4950,7 +4950,6 @@ static bool dg2_compare_hw_state(const struct intel_dpll_hw_state *_a, > a->mpllb_sscstep == b->mpllb_sscstep; > } > > -__maybe_unused > static const struct intel_dpll_mgr dg2_pll_mgr = { > .dpll_info = dg2_plls, > .compute_dplls = dg2_compute_dplls, > @@ -4977,8 +4976,7 @@ void intel_dpll_init(struct intel_display *display) > mutex_init(&display->dpll.lock); > > if (display->platform.dg2) > - /* No shared DPLLs on DG2; port PLLs are part of the PHY */ > - dpll_mgr = NULL; > + dpll_mgr = &dg2_pll_mgr; > else if (DISPLAY_VER(display) >= 35) > dpll_mgr = &xe3plpd_pll_mgr; > else if (DISPLAY_VER(display) >= 14) > @@ -5347,8 +5345,13 @@ verify_single_dpll_state(struct intel_display *display, > > if (pll->on) { > const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr; > - > - if (HAS_LT_PHY(display)) > + /* > + * Avoid direct struct comparison here. Some hw state fields, such > + * as DG2 MPLLB ref_control or LT PHY config[1], are written by > + * firmware and may differ from the software state without indicating > + * a real mismatch. > + */ > + if (HAS_LT_PHY(display) || display->platform.dg2) > pll_mismatch = !dpll_mgr->compare_hw_state(&pll->state.hw_state, > &dpll_hw_state); > else > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c > index 2ec17c2bfe0f..f0761d8a7437 100644 > --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c > +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c > @@ -245,7 +245,6 @@ void intel_modeset_verify_crtc(struct intel_atomic_state *state, > verify_connector_state(state, crtc); > verify_crtc_state(state, crtc); > intel_dpll_state_verify(state, crtc); > - intel_mpllb_state_verify(state, crtc); > } > > void intel_modeset_verify_disabled(struct intel_atomic_state *state) > diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c > index dfb3a5c35c85..ce94ac689064 100644 > --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c > @@ -1982,52 +1982,3 @@ void intel_mpllb_readout_hw_state(struct intel_encoder *encoder, > */ > pll_state->mpllb_div &= ~SNPS_PHY_MPLLB_FORCE_EN; > } > - > -void intel_mpllb_state_verify(struct intel_atomic_state *state, > - struct intel_crtc *crtc) > -{ > - struct intel_display *display = to_intel_display(state); > - const struct intel_crtc_state *new_crtc_state = > - intel_atomic_get_new_crtc_state(state, crtc); > - struct intel_mpllb_state mpllb_hw_state = {}; > - const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->dpll_hw_state.mpllb; > - struct intel_encoder *encoder; > - > - if (!display->platform.dg2) > - return; > - > - if (!new_crtc_state->hw.active) > - return; > - > - /* intel_get_crtc_new_encoder() only works for modeset/fastset commits */ > - if (!intel_crtc_needs_modeset(new_crtc_state) && > - !intel_crtc_needs_fastset(new_crtc_state)) > - return; > - > - encoder = intel_get_crtc_new_encoder(state, new_crtc_state); > - intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state); > - > -#define MPLLB_CHECK(__name) \ > - INTEL_DISPLAY_STATE_WARN(display, mpllb_sw_state->__name != mpllb_hw_state.__name, \ > - "[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \ > - crtc->base.base.id, crtc->base.name, \ > - __stringify(__name), \ > - mpllb_sw_state->__name, mpllb_hw_state.__name) > - > - MPLLB_CHECK(mpllb_cp); > - MPLLB_CHECK(mpllb_div); > - MPLLB_CHECK(mpllb_div2); > - MPLLB_CHECK(mpllb_fracn1); > - MPLLB_CHECK(mpllb_fracn2); > - MPLLB_CHECK(mpllb_sscen); > - MPLLB_CHECK(mpllb_sscstep); > - > - /* > - * ref_control is handled by the hardware/firemware and never > - * programmed by the software, but the proper values are supplied > - * in the bspec for verification purposes. > - */ > - MPLLB_CHECK(ref_control); > - > -#undef MPLLB_CHECK > -} > -- > 2.43.0 > > ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola ` (3 preceding siblings ...) 2026-05-18 10:36 ` [PATCH 4/4] drm/i915/display: Switch DG2 to use " Mika Kahola @ 2026-05-18 10:43 ` Patchwork 2026-05-18 11:20 ` ✓ Xe.CI.BAT: " Patchwork ` (3 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2026-05-18 10:43 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-xe == Series Details == Series: drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework URL : https://patchwork.freedesktop.org/series/166763/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [10:41:51] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [10:41:55] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:42:26] Starting KUnit Kernel (1/1)... [10:42:26] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:42:27] ================== guc_buf (11 subtests) =================== [10:42:27] [PASSED] test_smallest [10:42:27] [PASSED] test_largest [10:42:27] [PASSED] test_granular [10:42:27] [PASSED] test_unique [10:42:27] [PASSED] test_overlap [10:42:27] [PASSED] test_reusable [10:42:27] [PASSED] test_too_big [10:42:27] [PASSED] test_flush [10:42:27] [PASSED] test_lookup [10:42:27] [PASSED] test_data [10:42:27] [PASSED] test_class [10:42:27] ===================== [PASSED] guc_buf ===================== [10:42:27] =================== guc_dbm (7 subtests) =================== [10:42:27] [PASSED] test_empty [10:42:27] [PASSED] test_default [10:42:27] ======================== test_size ======================== [10:42:27] [PASSED] 4 [10:42:27] [PASSED] 8 [10:42:27] [PASSED] 32 [10:42:27] [PASSED] 256 [10:42:27] ==================== [PASSED] test_size ==================== [10:42:27] ======================= test_reuse ======================== [10:42:27] [PASSED] 4 [10:42:27] [PASSED] 8 [10:42:27] [PASSED] 32 [10:42:27] [PASSED] 256 [10:42:27] =================== [PASSED] test_reuse ==================== [10:42:27] =================== test_range_overlap ==================== [10:42:27] [PASSED] 4 [10:42:27] [PASSED] 8 [10:42:27] [PASSED] 32 [10:42:27] [PASSED] 256 [10:42:27] =============== [PASSED] test_range_overlap ================ [10:42:27] =================== test_range_compact ==================== [10:42:27] [PASSED] 4 [10:42:27] [PASSED] 8 [10:42:27] [PASSED] 32 [10:42:27] [PASSED] 256 [10:42:27] =============== [PASSED] test_range_compact ================ [10:42:27] ==================== test_range_spare ===================== [10:42:27] [PASSED] 4 [10:42:27] [PASSED] 8 [10:42:27] [PASSED] 32 [10:42:27] [PASSED] 256 [10:42:27] ================ [PASSED] test_range_spare ================= [10:42:27] ===================== [PASSED] guc_dbm ===================== [10:42:27] =================== guc_idm (6 subtests) =================== [10:42:27] [PASSED] bad_init [10:42:27] [PASSED] no_init [10:42:27] [PASSED] init_fini [10:42:27] [PASSED] check_used [10:42:27] [PASSED] check_quota [10:42:27] [PASSED] check_all [10:42:27] ===================== [PASSED] guc_idm ===================== [10:42:27] ================== no_relay (3 subtests) =================== [10:42:27] [PASSED] xe_drops_guc2pf_if_not_ready [10:42:27] [PASSED] xe_drops_guc2vf_if_not_ready [10:42:27] [PASSED] xe_rejects_send_if_not_ready [10:42:27] ==================== [PASSED] no_relay ===================== [10:42:27] ================== pf_relay (14 subtests) ================== [10:42:27] [PASSED] pf_rejects_guc2pf_too_short [10:42:27] [PASSED] pf_rejects_guc2pf_too_long [10:42:27] [PASSED] pf_rejects_guc2pf_no_payload [10:42:27] [PASSED] pf_fails_no_payload [10:42:27] [PASSED] pf_fails_bad_origin [10:42:27] [PASSED] pf_fails_bad_type [10:42:27] [PASSED] pf_txn_reports_error [10:42:27] [PASSED] pf_txn_sends_pf2guc [10:42:27] [PASSED] pf_sends_pf2guc [10:42:27] [SKIPPED] pf_loopback_nop [10:42:27] [SKIPPED] pf_loopback_echo [10:42:27] [SKIPPED] pf_loopback_fail [10:42:27] [SKIPPED] pf_loopback_busy [10:42:27] [SKIPPED] pf_loopback_retry [10:42:27] ==================== [PASSED] pf_relay ===================== [10:42:27] ================== vf_relay (3 subtests) =================== [10:42:27] [PASSED] vf_rejects_guc2vf_too_short [10:42:27] [PASSED] vf_rejects_guc2vf_too_long [10:42:27] [PASSED] vf_rejects_guc2vf_no_payload [10:42:27] ==================== [PASSED] vf_relay ===================== [10:42:27] ================ pf_gt_config (9 subtests) ================= [10:42:27] [PASSED] fair_contexts_1vf [10:42:27] [PASSED] fair_doorbells_1vf [10:42:27] [PASSED] fair_ggtt_1vf [10:42:27] ====================== fair_vram_1vf ====================== [10:42:27] [PASSED] 3.50 GiB [10:42:27] [PASSED] 11.5 GiB [10:42:27] [PASSED] 15.5 GiB [10:42:27] [PASSED] 31.5 GiB [10:42:27] [PASSED] 63.5 GiB [10:42:27] [PASSED] 1.91 GiB [10:42:27] ================== [PASSED] fair_vram_1vf ================== [10:42:27] ================ fair_vram_1vf_admin_only ================= [10:42:27] [PASSED] 3.50 GiB [10:42:27] [PASSED] 11.5 GiB [10:42:27] [PASSED] 15.5 GiB [10:42:27] [PASSED] 31.5 GiB [10:42:27] [PASSED] 63.5 GiB [10:42:27] [PASSED] 1.91 GiB [10:42:27] ============ [PASSED] fair_vram_1vf_admin_only ============= [10:42:27] ====================== fair_contexts ====================== [10:42:27] [PASSED] 1 VF [10:42:27] [PASSED] 2 VFs [10:42:27] [PASSED] 3 VFs [10:42:27] [PASSED] 4 VFs [10:42:27] [PASSED] 5 VFs [10:42:27] [PASSED] 6 VFs [10:42:27] [PASSED] 7 VFs [10:42:27] [PASSED] 8 VFs [10:42:27] [PASSED] 9 VFs [10:42:27] [PASSED] 10 VFs [10:42:27] [PASSED] 11 VFs [10:42:27] [PASSED] 12 VFs [10:42:27] [PASSED] 13 VFs [10:42:27] [PASSED] 14 VFs [10:42:27] [PASSED] 15 VFs [10:42:27] [PASSED] 16 VFs [10:42:27] [PASSED] 17 VFs [10:42:27] [PASSED] 18 VFs [10:42:27] [PASSED] 19 VFs [10:42:27] [PASSED] 20 VFs [10:42:27] [PASSED] 21 VFs [10:42:27] [PASSED] 22 VFs [10:42:27] [PASSED] 23 VFs [10:42:27] [PASSED] 24 VFs [10:42:27] [PASSED] 25 VFs [10:42:27] [PASSED] 26 VFs [10:42:27] [PASSED] 27 VFs [10:42:27] [PASSED] 28 VFs [10:42:27] [PASSED] 29 VFs [10:42:27] [PASSED] 30 VFs [10:42:27] [PASSED] 31 VFs [10:42:27] [PASSED] 32 VFs [10:42:27] [PASSED] 33 VFs [10:42:27] [PASSED] 34 VFs [10:42:27] [PASSED] 35 VFs [10:42:27] [PASSED] 36 VFs [10:42:27] [PASSED] 37 VFs [10:42:27] [PASSED] 38 VFs [10:42:27] [PASSED] 39 VFs [10:42:27] [PASSED] 40 VFs [10:42:27] [PASSED] 41 VFs [10:42:27] [PASSED] 42 VFs [10:42:27] [PASSED] 43 VFs [10:42:27] [PASSED] 44 VFs [10:42:27] [PASSED] 45 VFs [10:42:27] [PASSED] 46 VFs [10:42:27] [PASSED] 47 VFs [10:42:27] [PASSED] 48 VFs [10:42:27] [PASSED] 49 VFs [10:42:27] [PASSED] 50 VFs [10:42:27] [PASSED] 51 VFs [10:42:27] [PASSED] 52 VFs [10:42:27] [PASSED] 53 VFs [10:42:27] [PASSED] 54 VFs [10:42:27] [PASSED] 55 VFs [10:42:27] [PASSED] 56 VFs [10:42:27] [PASSED] 57 VFs [10:42:27] [PASSED] 58 VFs [10:42:27] [PASSED] 59 VFs [10:42:27] [PASSED] 60 VFs [10:42:27] [PASSED] 61 VFs [10:42:27] [PASSED] 62 VFs [10:42:27] [PASSED] 63 VFs [10:42:27] ================== [PASSED] fair_contexts ================== [10:42:27] ===================== fair_doorbells ====================== [10:42:27] [PASSED] 1 VF [10:42:27] [PASSED] 2 VFs [10:42:27] [PASSED] 3 VFs [10:42:27] [PASSED] 4 VFs [10:42:27] [PASSED] 5 VFs [10:42:27] [PASSED] 6 VFs [10:42:27] [PASSED] 7 VFs [10:42:27] [PASSED] 8 VFs [10:42:27] [PASSED] 9 VFs [10:42:27] [PASSED] 10 VFs [10:42:27] [PASSED] 11 VFs [10:42:27] [PASSED] 12 VFs [10:42:27] [PASSED] 13 VFs [10:42:27] [PASSED] 14 VFs [10:42:27] [PASSED] 15 VFs [10:42:27] [PASSED] 16 VFs [10:42:27] [PASSED] 17 VFs [10:42:27] [PASSED] 18 VFs [10:42:27] [PASSED] 19 VFs [10:42:27] [PASSED] 20 VFs [10:42:27] [PASSED] 21 VFs [10:42:27] [PASSED] 22 VFs [10:42:27] [PASSED] 23 VFs [10:42:27] [PASSED] 24 VFs [10:42:27] [PASSED] 25 VFs [10:42:27] [PASSED] 26 VFs [10:42:27] [PASSED] 27 VFs [10:42:27] [PASSED] 28 VFs [10:42:27] [PASSED] 29 VFs [10:42:27] [PASSED] 30 VFs [10:42:27] [PASSED] 31 VFs [10:42:27] [PASSED] 32 VFs [10:42:27] [PASSED] 33 VFs [10:42:27] [PASSED] 34 VFs [10:42:27] [PASSED] 35 VFs [10:42:27] [PASSED] 36 VFs [10:42:27] [PASSED] 37 VFs [10:42:27] [PASSED] 38 VFs [10:42:27] [PASSED] 39 VFs [10:42:27] [PASSED] 40 VFs [10:42:27] [PASSED] 41 VFs [10:42:27] [PASSED] 42 VFs [10:42:27] [PASSED] 43 VFs [10:42:27] [PASSED] 44 VFs [10:42:27] [PASSED] 45 VFs [10:42:27] [PASSED] 46 VFs [10:42:27] [PASSED] 47 VFs [10:42:27] [PASSED] 48 VFs [10:42:27] [PASSED] 49 VFs [10:42:27] [PASSED] 50 VFs [10:42:27] [PASSED] 51 VFs [10:42:27] [PASSED] 52 VFs [10:42:27] [PASSED] 53 VFs [10:42:27] [PASSED] 54 VFs [10:42:27] [PASSED] 55 VFs [10:42:27] [PASSED] 56 VFs [10:42:27] [PASSED] 57 VFs [10:42:27] [PASSED] 58 VFs [10:42:27] [PASSED] 59 VFs [10:42:27] [PASSED] 60 VFs [10:42:27] [PASSED] 61 VFs [10:42:27] [PASSED] 62 VFs [10:42:27] [PASSED] 63 VFs [10:42:27] ================= [PASSED] fair_doorbells ================== [10:42:27] ======================== fair_ggtt ======================== [10:42:27] [PASSED] 1 VF [10:42:27] [PASSED] 2 VFs [10:42:27] [PASSED] 3 VFs [10:42:27] [PASSED] 4 VFs [10:42:27] [PASSED] 5 VFs [10:42:27] [PASSED] 6 VFs [10:42:27] [PASSED] 7 VFs [10:42:27] [PASSED] 8 VFs [10:42:27] [PASSED] 9 VFs [10:42:27] [PASSED] 10 VFs [10:42:27] [PASSED] 11 VFs [10:42:27] [PASSED] 12 VFs [10:42:27] [PASSED] 13 VFs [10:42:27] [PASSED] 14 VFs [10:42:27] [PASSED] 15 VFs [10:42:27] [PASSED] 16 VFs [10:42:27] [PASSED] 17 VFs [10:42:27] [PASSED] 18 VFs [10:42:27] [PASSED] 19 VFs [10:42:27] [PASSED] 20 VFs [10:42:27] [PASSED] 21 VFs [10:42:27] [PASSED] 22 VFs [10:42:27] [PASSED] 23 VFs [10:42:27] [PASSED] 24 VFs [10:42:27] [PASSED] 25 VFs [10:42:27] [PASSED] 26 VFs [10:42:27] [PASSED] 27 VFs [10:42:27] [PASSED] 28 VFs [10:42:27] [PASSED] 29 VFs [10:42:27] [PASSED] 30 VFs [10:42:27] [PASSED] 31 VFs [10:42:27] [PASSED] 32 VFs [10:42:27] [PASSED] 33 VFs [10:42:27] [PASSED] 34 VFs [10:42:27] [PASSED] 35 VFs [10:42:27] [PASSED] 36 VFs [10:42:27] [PASSED] 37 VFs [10:42:27] [PASSED] 38 VFs [10:42:27] [PASSED] 39 VFs [10:42:27] [PASSED] 40 VFs [10:42:27] [PASSED] 41 VFs [10:42:27] [PASSED] 42 VFs [10:42:27] [PASSED] 43 VFs [10:42:27] [PASSED] 44 VFs [10:42:27] [PASSED] 45 VFs [10:42:27] [PASSED] 46 VFs [10:42:27] [PASSED] 47 VFs [10:42:27] [PASSED] 48 VFs [10:42:27] [PASSED] 49 VFs [10:42:27] [PASSED] 50 VFs [10:42:27] [PASSED] 51 VFs [10:42:27] [PASSED] 52 VFs [10:42:27] [PASSED] 53 VFs [10:42:27] [PASSED] 54 VFs [10:42:27] [PASSED] 55 VFs [10:42:27] [PASSED] 56 VFs [10:42:27] [PASSED] 57 VFs [10:42:27] [PASSED] 58 VFs [10:42:27] [PASSED] 59 VFs [10:42:27] [PASSED] 60 VFs [10:42:27] [PASSED] 61 VFs [10:42:27] [PASSED] 62 VFs [10:42:27] [PASSED] 63 VFs [10:42:27] ==================== [PASSED] fair_ggtt ==================== [10:42:27] ======================== fair_vram ======================== [10:42:27] [PASSED] 1 VF [10:42:27] [PASSED] 2 VFs [10:42:27] [PASSED] 3 VFs [10:42:27] [PASSED] 4 VFs [10:42:27] [PASSED] 5 VFs [10:42:27] [PASSED] 6 VFs [10:42:27] [PASSED] 7 VFs [10:42:27] [PASSED] 8 VFs [10:42:27] [PASSED] 9 VFs [10:42:27] [PASSED] 10 VFs [10:42:27] [PASSED] 11 VFs [10:42:27] [PASSED] 12 VFs [10:42:27] [PASSED] 13 VFs [10:42:27] [PASSED] 14 VFs [10:42:27] [PASSED] 15 VFs [10:42:27] [PASSED] 16 VFs [10:42:27] [PASSED] 17 VFs [10:42:27] [PASSED] 18 VFs [10:42:27] [PASSED] 19 VFs [10:42:27] [PASSED] 20 VFs [10:42:27] [PASSED] 21 VFs [10:42:27] [PASSED] 22 VFs [10:42:27] [PASSED] 23 VFs [10:42:27] [PASSED] 24 VFs [10:42:27] [PASSED] 25 VFs [10:42:27] [PASSED] 26 VFs [10:42:27] [PASSED] 27 VFs [10:42:27] [PASSED] 28 VFs [10:42:27] [PASSED] 29 VFs [10:42:27] [PASSED] 30 VFs [10:42:27] [PASSED] 31 VFs [10:42:27] [PASSED] 32 VFs [10:42:27] [PASSED] 33 VFs [10:42:27] [PASSED] 34 VFs [10:42:27] [PASSED] 35 VFs [10:42:27] [PASSED] 36 VFs [10:42:27] [PASSED] 37 VFs [10:42:27] [PASSED] 38 VFs [10:42:27] [PASSED] 39 VFs [10:42:27] [PASSED] 40 VFs [10:42:27] [PASSED] 41 VFs [10:42:27] [PASSED] 42 VFs [10:42:27] [PASSED] 43 VFs [10:42:27] [PASSED] 44 VFs [10:42:27] [PASSED] 45 VFs [10:42:27] [PASSED] 46 VFs [10:42:27] [PASSED] 47 VFs [10:42:27] [PASSED] 48 VFs [10:42:27] [PASSED] 49 VFs [10:42:27] [PASSED] 50 VFs [10:42:27] [PASSED] 51 VFs [10:42:27] [PASSED] 52 VFs [10:42:27] [PASSED] 53 VFs [10:42:27] [PASSED] 54 VFs [10:42:27] [PASSED] 55 VFs [10:42:27] [PASSED] 56 VFs [10:42:27] [PASSED] 57 VFs [10:42:27] [PASSED] 58 VFs [10:42:27] [PASSED] 59 VFs [10:42:27] [PASSED] 60 VFs [10:42:27] [PASSED] 61 VFs [10:42:27] [PASSED] 62 VFs [10:42:27] [PASSED] 63 VFs [10:42:27] ==================== [PASSED] fair_vram ==================== [10:42:27] ================== [PASSED] pf_gt_config =================== [10:42:27] ===================== lmtt (1 subtest) ===================== [10:42:27] ======================== test_ops ========================= [10:42:27] [PASSED] 2-level [10:42:27] [PASSED] multi-level [10:42:27] ==================== [PASSED] test_ops ===================== [10:42:27] ====================== [PASSED] lmtt ======================= [10:42:27] ================= pf_service (11 subtests) ================= [10:42:27] [PASSED] pf_negotiate_any [10:42:27] [PASSED] pf_negotiate_base_match [10:42:27] [PASSED] pf_negotiate_base_newer [10:42:27] [PASSED] pf_negotiate_base_next [10:42:27] [SKIPPED] pf_negotiate_base_older [10:42:27] [PASSED] pf_negotiate_base_prev [10:42:27] [PASSED] pf_negotiate_latest_match [10:42:27] [PASSED] pf_negotiate_latest_newer [10:42:27] [PASSED] pf_negotiate_latest_next [10:42:27] [SKIPPED] pf_negotiate_latest_older [10:42:27] [SKIPPED] pf_negotiate_latest_prev [10:42:27] =================== [PASSED] pf_service ==================== [10:42:27] ================= xe_guc_g2g (2 subtests) ================== [10:42:27] ============== xe_live_guc_g2g_kunit_default ============== [10:42:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [10:42:27] ============== xe_live_guc_g2g_kunit_allmem =============== [10:42:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [10:42:27] =================== [SKIPPED] xe_guc_g2g =================== [10:42:27] =================== xe_mocs (2 subtests) =================== [10:42:27] ================ xe_live_mocs_kernel_kunit ================ [10:42:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [10:42:27] ================ xe_live_mocs_reset_kunit ================= [10:42:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [10:42:27] ==================== [SKIPPED] xe_mocs ===================== [10:42:27] ================= xe_migrate (2 subtests) ================== [10:42:27] ================= xe_migrate_sanity_kunit ================= [10:42:27] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [10:42:27] ================== xe_validate_ccs_kunit ================== [10:42:27] ============= [SKIPPED] xe_validate_ccs_kunit ============== [10:42:27] =================== [SKIPPED] xe_migrate =================== [10:42:27] ================== xe_dma_buf (1 subtest) ================== [10:42:27] ==================== xe_dma_buf_kunit ===================== [10:42:27] ================ [SKIPPED] xe_dma_buf_kunit ================ [10:42:27] =================== [SKIPPED] xe_dma_buf =================== [10:42:27] ================= xe_bo_shrink (1 subtest) ================= [10:42:27] =================== xe_bo_shrink_kunit ==================== [10:42:27] =============== [SKIPPED] xe_bo_shrink_kunit =============== [10:42:27] ================== [SKIPPED] xe_bo_shrink ================== [10:42:27] ==================== xe_bo (2 subtests) ==================== [10:42:27] ================== xe_ccs_migrate_kunit =================== [10:42:27] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [10:42:27] ==================== xe_bo_evict_kunit ==================== [10:42:27] =============== [SKIPPED] xe_bo_evict_kunit ================ [10:42:27] ===================== [SKIPPED] xe_bo ====================== [10:42:27] ==================== args (13 subtests) ==================== [10:42:27] [PASSED] count_args_test [10:42:27] [PASSED] call_args_example [10:42:27] [PASSED] call_args_test [10:42:27] [PASSED] drop_first_arg_example [10:42:27] [PASSED] drop_first_arg_test [10:42:27] [PASSED] first_arg_example [10:42:27] [PASSED] first_arg_test [10:42:27] [PASSED] last_arg_example [10:42:27] [PASSED] last_arg_test [10:42:27] [PASSED] pick_arg_example [10:42:27] [PASSED] if_args_example [10:42:27] [PASSED] if_args_test [10:42:27] [PASSED] sep_comma_example [10:42:27] ====================== [PASSED] args ======================= [10:42:27] =================== xe_pci (3 subtests) ==================== [10:42:27] ==================== check_graphics_ip ==================== [10:42:27] [PASSED] 12.00 Xe_LP [10:42:27] [PASSED] 12.10 Xe_LP+ [10:42:27] [PASSED] 12.55 Xe_HPG [10:42:27] [PASSED] 12.60 Xe_HPC [10:42:27] [PASSED] 12.70 Xe_LPG [10:42:27] [PASSED] 12.71 Xe_LPG [10:42:27] [PASSED] 12.74 Xe_LPG+ [10:42:27] [PASSED] 20.01 Xe2_HPG [10:42:27] [PASSED] 20.02 Xe2_HPG [10:42:27] [PASSED] 20.04 Xe2_LPG [10:42:27] [PASSED] 30.00 Xe3_LPG [10:42:27] [PASSED] 30.01 Xe3_LPG [10:42:27] [PASSED] 30.03 Xe3_LPG [10:42:27] [PASSED] 30.04 Xe3_LPG [10:42:27] [PASSED] 30.05 Xe3_LPG [10:42:27] [PASSED] 35.10 Xe3p_LPG [10:42:27] [PASSED] 35.11 Xe3p_XPC [10:42:27] ================ [PASSED] check_graphics_ip ================ [10:42:27] ===================== check_media_ip ====================== [10:42:27] [PASSED] 12.00 Xe_M [10:42:27] [PASSED] 12.55 Xe_HPM [10:42:27] [PASSED] 13.00 Xe_LPM+ [10:42:27] [PASSED] 13.01 Xe2_HPM [10:42:27] [PASSED] 20.00 Xe2_LPM [10:42:27] [PASSED] 30.00 Xe3_LPM [10:42:27] [PASSED] 30.02 Xe3_LPM [10:42:27] [PASSED] 35.00 Xe3p_LPM [10:42:27] [PASSED] 35.03 Xe3p_HPM [10:42:27] ================= [PASSED] check_media_ip ================== [10:42:27] =================== check_platform_desc =================== [10:42:27] [PASSED] 0x9A60 (TIGERLAKE) [10:42:27] [PASSED] 0x9A68 (TIGERLAKE) [10:42:27] [PASSED] 0x9A70 (TIGERLAKE) [10:42:27] [PASSED] 0x9A40 (TIGERLAKE) [10:42:27] [PASSED] 0x9A49 (TIGERLAKE) [10:42:27] [PASSED] 0x9A59 (TIGERLAKE) [10:42:27] [PASSED] 0x9A78 (TIGERLAKE) [10:42:27] [PASSED] 0x9AC0 (TIGERLAKE) [10:42:27] [PASSED] 0x9AC9 (TIGERLAKE) [10:42:27] [PASSED] 0x9AD9 (TIGERLAKE) [10:42:27] [PASSED] 0x9AF8 (TIGERLAKE) [10:42:27] [PASSED] 0x4C80 (ROCKETLAKE) [10:42:27] [PASSED] 0x4C8A (ROCKETLAKE) [10:42:27] [PASSED] 0x4C8B (ROCKETLAKE) [10:42:27] [PASSED] 0x4C8C (ROCKETLAKE) [10:42:27] [PASSED] 0x4C90 (ROCKETLAKE) [10:42:27] [PASSED] 0x4C9A (ROCKETLAKE) [10:42:27] [PASSED] 0x4680 (ALDERLAKE_S) [10:42:27] [PASSED] 0x4682 (ALDERLAKE_S) [10:42:27] [PASSED] 0x4688 (ALDERLAKE_S) [10:42:27] [PASSED] 0x468A (ALDERLAKE_S) [10:42:27] [PASSED] 0x468B (ALDERLAKE_S) [10:42:27] [PASSED] 0x4690 (ALDERLAKE_S) [10:42:27] [PASSED] 0x4692 (ALDERLAKE_S) [10:42:27] [PASSED] 0x4693 (ALDERLAKE_S) [10:42:27] [PASSED] 0x46A0 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46A1 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46A2 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46A3 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46A6 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46A8 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46AA (ALDERLAKE_P) [10:42:27] [PASSED] 0x462A (ALDERLAKE_P) [10:42:27] [PASSED] 0x4626 (ALDERLAKE_P) [10:42:27] [PASSED] 0x4628 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46B0 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46B1 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46B2 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46B3 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46C0 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46C1 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46C2 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46C3 (ALDERLAKE_P) [10:42:27] [PASSED] 0x46D0 (ALDERLAKE_N) [10:42:27] [PASSED] 0x46D1 (ALDERLAKE_N) [10:42:27] [PASSED] 0x46D2 (ALDERLAKE_N) [10:42:27] [PASSED] 0x46D3 (ALDERLAKE_N) [10:42:27] [PASSED] 0x46D4 (ALDERLAKE_N) [10:42:27] [PASSED] 0xA721 (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7A1 (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7A9 (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7AC (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7AD (ALDERLAKE_P) [10:42:27] [PASSED] 0xA720 (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7A0 (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7A8 (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7AA (ALDERLAKE_P) [10:42:27] [PASSED] 0xA7AB (ALDERLAKE_P) [10:42:27] [PASSED] 0xA780 (ALDERLAKE_S) [10:42:27] [PASSED] 0xA781 (ALDERLAKE_S) [10:42:27] [PASSED] 0xA782 (ALDERLAKE_S) [10:42:27] [PASSED] 0xA783 (ALDERLAKE_S) [10:42:27] [PASSED] 0xA788 (ALDERLAKE_S) [10:42:27] [PASSED] 0xA789 (ALDERLAKE_S) [10:42:27] [PASSED] 0xA78A (ALDERLAKE_S) [10:42:27] [PASSED] 0xA78B (ALDERLAKE_S) [10:42:27] [PASSED] 0x4905 (DG1) [10:42:27] [PASSED] 0x4906 (DG1) [10:42:27] [PASSED] 0x4907 (DG1) [10:42:27] [PASSED] 0x4908 (DG1) [10:42:27] [PASSED] 0x4909 (DG1) [10:42:27] [PASSED] 0x56C0 (DG2) [10:42:27] [PASSED] 0x56C2 (DG2) [10:42:27] [PASSED] 0x56C1 (DG2) [10:42:27] [PASSED] 0x7D51 (METEORLAKE) [10:42:27] [PASSED] 0x7DD1 (METEORLAKE) [10:42:27] [PASSED] 0x7D41 (METEORLAKE) [10:42:27] [PASSED] 0x7D67 (METEORLAKE) [10:42:27] [PASSED] 0xB640 (METEORLAKE) [10:42:27] [PASSED] 0x56A0 (DG2) [10:42:27] [PASSED] 0x56A1 (DG2) [10:42:27] [PASSED] 0x56A2 (DG2) [10:42:27] [PASSED] 0x56BE (DG2) [10:42:27] [PASSED] 0x56BF (DG2) [10:42:27] [PASSED] 0x5690 (DG2) [10:42:27] [PASSED] 0x5691 (DG2) [10:42:27] [PASSED] 0x5692 (DG2) [10:42:27] [PASSED] 0x56A5 (DG2) [10:42:27] [PASSED] 0x56A6 (DG2) [10:42:27] [PASSED] 0x56B0 (DG2) [10:42:27] [PASSED] 0x56B1 (DG2) [10:42:27] [PASSED] 0x56BA (DG2) [10:42:27] [PASSED] 0x56BB (DG2) [10:42:27] [PASSED] 0x56BC (DG2) [10:42:27] [PASSED] 0x56BD (DG2) [10:42:27] [PASSED] 0x5693 (DG2) [10:42:27] [PASSED] 0x5694 (DG2) [10:42:27] [PASSED] 0x5695 (DG2) [10:42:27] [PASSED] 0x56A3 (DG2) [10:42:27] [PASSED] 0x56A4 (DG2) [10:42:27] [PASSED] 0x56B2 (DG2) [10:42:27] [PASSED] 0x56B3 (DG2) [10:42:27] [PASSED] 0x5696 (DG2) [10:42:27] [PASSED] 0x5697 (DG2) [10:42:27] [PASSED] 0xB69 (PVC) [10:42:27] [PASSED] 0xB6E (PVC) [10:42:27] [PASSED] 0xBD4 (PVC) [10:42:27] [PASSED] 0xBD5 (PVC) [10:42:27] [PASSED] 0xBD6 (PVC) [10:42:27] [PASSED] 0xBD7 (PVC) [10:42:27] [PASSED] 0xBD8 (PVC) [10:42:27] [PASSED] 0xBD9 (PVC) [10:42:27] [PASSED] 0xBDA (PVC) [10:42:27] [PASSED] 0xBDB (PVC) [10:42:27] [PASSED] 0xBE0 (PVC) [10:42:27] [PASSED] 0xBE1 (PVC) [10:42:27] [PASSED] 0xBE5 (PVC) [10:42:27] [PASSED] 0x7D40 (METEORLAKE) [10:42:27] [PASSED] 0x7D45 (METEORLAKE) [10:42:27] [PASSED] 0x7D55 (METEORLAKE) [10:42:27] [PASSED] 0x7D60 (METEORLAKE) [10:42:27] [PASSED] 0x7DD5 (METEORLAKE) [10:42:27] [PASSED] 0x6420 (LUNARLAKE) [10:42:27] [PASSED] 0x64A0 (LUNARLAKE) [10:42:27] [PASSED] 0x64B0 (LUNARLAKE) [10:42:27] [PASSED] 0xE202 (BATTLEMAGE) [10:42:27] [PASSED] 0xE209 (BATTLEMAGE) [10:42:27] [PASSED] 0xE20B (BATTLEMAGE) [10:42:27] [PASSED] 0xE20C (BATTLEMAGE) [10:42:27] [PASSED] 0xE20D (BATTLEMAGE) [10:42:27] [PASSED] 0xE210 (BATTLEMAGE) [10:42:27] [PASSED] 0xE211 (BATTLEMAGE) [10:42:27] [PASSED] 0xE212 (BATTLEMAGE) [10:42:27] [PASSED] 0xE216 (BATTLEMAGE) [10:42:27] [PASSED] 0xE220 (BATTLEMAGE) [10:42:27] [PASSED] 0xE221 (BATTLEMAGE) [10:42:27] [PASSED] 0xE222 (BATTLEMAGE) [10:42:27] [PASSED] 0xE223 (BATTLEMAGE) [10:42:27] [PASSED] 0xB080 (PANTHERLAKE) [10:42:27] [PASSED] 0xB081 (PANTHERLAKE) [10:42:27] [PASSED] 0xB082 (PANTHERLAKE) [10:42:27] [PASSED] 0xB083 (PANTHERLAKE) [10:42:27] [PASSED] 0xB084 (PANTHERLAKE) [10:42:27] [PASSED] 0xB085 (PANTHERLAKE) [10:42:27] [PASSED] 0xB086 (PANTHERLAKE) [10:42:27] [PASSED] 0xB087 (PANTHERLAKE) [10:42:27] [PASSED] 0xB08F (PANTHERLAKE) [10:42:27] [PASSED] 0xB090 (PANTHERLAKE) [10:42:27] [PASSED] 0xB0A0 (PANTHERLAKE) [10:42:27] [PASSED] 0xB0B0 (PANTHERLAKE) [10:42:27] [PASSED] 0xFD80 (PANTHERLAKE) [10:42:27] [PASSED] 0xFD81 (PANTHERLAKE) [10:42:27] [PASSED] 0xD740 (NOVALAKE_S) [10:42:27] [PASSED] 0xD741 (NOVALAKE_S) [10:42:27] [PASSED] 0xD742 (NOVALAKE_S) [10:42:27] [PASSED] 0xD743 (NOVALAKE_S) [10:42:27] [PASSED] 0xD744 (NOVALAKE_S) [10:42:27] [PASSED] 0xD745 (NOVALAKE_S) [10:42:27] [PASSED] 0x674C (CRESCENTISLAND) [10:42:27] [PASSED] 0x674D (CRESCENTISLAND) [10:42:27] [PASSED] 0x674E (CRESCENTISLAND) [10:42:27] [PASSED] 0x674F (CRESCENTISLAND) [10:42:27] [PASSED] 0x6750 (CRESCENTISLAND) [10:42:27] [PASSED] 0xD750 (NOVALAKE_P) [10:42:27] [PASSED] 0xD751 (NOVALAKE_P) [10:42:27] [PASSED] 0xD752 (NOVALAKE_P) [10:42:27] [PASSED] 0xD753 (NOVALAKE_P) [10:42:27] [PASSED] 0xD754 (NOVALAKE_P) [10:42:27] [PASSED] 0xD755 (NOVALAKE_P) [10:42:27] [PASSED] 0xD756 (NOVALAKE_P) [10:42:27] [PASSED] 0xD757 (NOVALAKE_P) [10:42:27] [PASSED] 0xD75F (NOVALAKE_P) [10:42:27] =============== [PASSED] check_platform_desc =============== [10:42:27] ===================== [PASSED] xe_pci ====================== [10:42:27] =================== xe_rtp (2 subtests) ==================== [10:42:27] =============== xe_rtp_process_to_sr_tests ================ [10:42:27] [PASSED] coalesce-same-reg [10:42:27] [PASSED] no-match-no-add [10:42:27] [PASSED] match-or [10:42:27] [PASSED] match-or-xfail [10:42:27] [PASSED] no-match-no-add-multiple-rules [10:42:27] [PASSED] two-regs-two-entries [10:42:27] [PASSED] clr-one-set-other [10:42:27] [PASSED] set-field [10:42:27] [PASSED] conflict-duplicate [10:42:27] [PASSED] conflict-not-disjoint [10:42:27] [PASSED] conflict-reg-type [10:42:27] [PASSED] bad-mcr-reg-forced-to-regular [10:42:27] [PASSED] bad-regular-reg-forced-to-mcr [10:42:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [10:42:27] ================== xe_rtp_process_tests =================== [10:42:27] [PASSED] active1 [10:42:27] [PASSED] active2 [10:42:27] [PASSED] active-inactive [10:42:27] [PASSED] inactive-active [10:42:27] [PASSED] inactive-1st_or_active-inactive [10:42:27] [PASSED] inactive-2nd_or_active-inactive [10:42:27] [PASSED] inactive-last_or_active-inactive [10:42:27] [PASSED] inactive-no_or_active-inactive [10:42:27] ============== [PASSED] xe_rtp_process_tests =============== [10:42:27] ===================== [PASSED] xe_rtp ====================== [10:42:27] ==================== xe_wa (1 subtest) ===================== [10:42:27] ======================== xe_wa_gt ========================= [10:42:27] [PASSED] TIGERLAKE B0 [10:42:27] [PASSED] DG1 A0 [10:42:27] [PASSED] DG1 B0 [10:42:27] [PASSED] ALDERLAKE_S A0 [10:42:27] [PASSED] ALDERLAKE_S B0 [10:42:27] [PASSED] ALDERLAKE_S C0 [10:42:27] [PASSED] ALDERLAKE_S D0 [10:42:27] [PASSED] ALDERLAKE_P A0 [10:42:27] [PASSED] ALDERLAKE_P B0 [10:42:27] [PASSED] ALDERLAKE_P C0 [10:42:27] [PASSED] ALDERLAKE_S RPLS D0 [10:42:27] [PASSED] ALDERLAKE_P RPLU E0 [10:42:27] [PASSED] DG2 G10 C0 [10:42:27] [PASSED] DG2 G11 B1 [10:42:27] [PASSED] DG2 G12 A1 [10:42:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [10:42:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [10:42:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [10:42:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [10:42:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [10:42:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [10:42:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [10:42:27] ==================== [PASSED] xe_wa_gt ===================== [10:42:27] ====================== [PASSED] xe_wa ====================== [10:42:27] ============================================================ [10:42:27] Testing complete. Ran 603 tests: passed: 585, skipped: 18 [10:42:27] Elapsed time: 36.231s total, 4.282s configuring, 31.334s building, 0.610s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [10:42:27] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [10:42:29] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:42:53] Starting KUnit Kernel (1/1)... [10:42:53] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:42:53] ============ drm_test_pick_cmdline (2 subtests) ============ [10:42:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [10:42:53] =============== drm_test_pick_cmdline_named =============== [10:42:53] [PASSED] NTSC [10:42:53] [PASSED] NTSC-J [10:42:53] [PASSED] PAL [10:42:53] [PASSED] PAL-M [10:42:53] =========== [PASSED] drm_test_pick_cmdline_named =========== [10:42:53] ============== [PASSED] drm_test_pick_cmdline ============== [10:42:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [10:42:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [10:42:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [10:42:53] =========== drm_validate_clone_mode (2 subtests) =========== [10:42:53] ============== drm_test_check_in_clone_mode =============== [10:42:53] [PASSED] in_clone_mode [10:42:53] [PASSED] not_in_clone_mode [10:42:53] ========== [PASSED] drm_test_check_in_clone_mode =========== [10:42:53] =============== drm_test_check_valid_clones =============== [10:42:53] [PASSED] not_in_clone_mode [10:42:53] [PASSED] valid_clone [10:42:53] [PASSED] invalid_clone [10:42:53] =========== [PASSED] drm_test_check_valid_clones =========== [10:42:53] ============= [PASSED] drm_validate_clone_mode ============= [10:42:53] ============= drm_validate_modeset (1 subtest) ============= [10:42:53] [PASSED] drm_test_check_connector_changed_modeset [10:42:53] ============== [PASSED] drm_validate_modeset =============== [10:42:53] ====== drm_test_bridge_get_current_state (2 subtests) ====== [10:42:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic [10:42:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy [10:42:53] ======== [PASSED] drm_test_bridge_get_current_state ======== [10:42:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [10:42:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [10:42:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [10:42:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [10:42:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [10:42:53] ============== drm_bridge_alloc (2 subtests) =============== [10:42:53] [PASSED] drm_test_drm_bridge_alloc_basic [10:42:53] [PASSED] drm_test_drm_bridge_alloc_get_put [10:42:53] ================ [PASSED] drm_bridge_alloc ================= [10:42:53] ============= drm_cmdline_parser (40 subtests) ============= [10:42:53] [PASSED] drm_test_cmdline_force_d_only [10:42:53] [PASSED] drm_test_cmdline_force_D_only_dvi [10:42:53] [PASSED] drm_test_cmdline_force_D_only_hdmi [10:42:53] [PASSED] drm_test_cmdline_force_D_only_not_digital [10:42:53] [PASSED] drm_test_cmdline_force_e_only [10:42:53] [PASSED] drm_test_cmdline_res [10:42:53] [PASSED] drm_test_cmdline_res_vesa [10:42:53] [PASSED] drm_test_cmdline_res_vesa_rblank [10:42:53] [PASSED] drm_test_cmdline_res_rblank [10:42:53] [PASSED] drm_test_cmdline_res_bpp [10:42:53] [PASSED] drm_test_cmdline_res_refresh [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [10:42:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [10:42:53] [PASSED] drm_test_cmdline_res_margins_force_on [10:42:53] [PASSED] drm_test_cmdline_res_vesa_margins [10:42:53] [PASSED] drm_test_cmdline_name [10:42:53] [PASSED] drm_test_cmdline_name_bpp [10:42:53] [PASSED] drm_test_cmdline_name_option [10:42:53] [PASSED] drm_test_cmdline_name_bpp_option [10:42:53] [PASSED] drm_test_cmdline_rotate_0 [10:42:53] [PASSED] drm_test_cmdline_rotate_90 [10:42:53] [PASSED] drm_test_cmdline_rotate_180 [10:42:53] [PASSED] drm_test_cmdline_rotate_270 [10:42:53] [PASSED] drm_test_cmdline_hmirror [10:42:53] [PASSED] drm_test_cmdline_vmirror [10:42:53] [PASSED] drm_test_cmdline_margin_options [10:42:53] [PASSED] drm_test_cmdline_multiple_options [10:42:53] [PASSED] drm_test_cmdline_bpp_extra_and_option [10:42:53] [PASSED] drm_test_cmdline_extra_and_option [10:42:53] [PASSED] drm_test_cmdline_freestanding_options [10:42:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [10:42:53] [PASSED] drm_test_cmdline_panel_orientation [10:42:53] ================ drm_test_cmdline_invalid ================= [10:42:53] [PASSED] margin_only [10:42:53] [PASSED] interlace_only [10:42:53] [PASSED] res_missing_x [10:42:53] [PASSED] res_missing_y [10:42:53] [PASSED] res_bad_y [10:42:53] [PASSED] res_missing_y_bpp [10:42:53] [PASSED] res_bad_bpp [10:42:53] [PASSED] res_bad_refresh [10:42:53] [PASSED] res_bpp_refresh_force_on_off [10:42:53] [PASSED] res_invalid_mode [10:42:53] [PASSED] res_bpp_wrong_place_mode [10:42:53] [PASSED] name_bpp_refresh [10:42:53] [PASSED] name_refresh [10:42:53] [PASSED] name_refresh_wrong_mode [10:42:53] [PASSED] name_refresh_invalid_mode [10:42:53] [PASSED] rotate_multiple [10:42:53] [PASSED] rotate_invalid_val [10:42:53] [PASSED] rotate_truncated [10:42:53] [PASSED] invalid_option [10:42:53] [PASSED] invalid_tv_option [10:42:53] [PASSED] truncated_tv_option [10:42:53] ============ [PASSED] drm_test_cmdline_invalid ============= [10:42:53] =============== drm_test_cmdline_tv_options =============== [10:42:53] [PASSED] NTSC [10:42:53] [PASSED] NTSC_443 [10:42:53] [PASSED] NTSC_J [10:42:53] [PASSED] PAL [10:42:53] [PASSED] PAL_M [10:42:53] [PASSED] PAL_N [10:42:53] [PASSED] SECAM [10:42:53] [PASSED] MONO_525 [10:42:53] [PASSED] MONO_625 [10:42:53] =========== [PASSED] drm_test_cmdline_tv_options =========== [10:42:53] =============== [PASSED] drm_cmdline_parser ================ [10:42:53] ========== drmm_connector_hdmi_init (20 subtests) ========== [10:42:53] [PASSED] drm_test_connector_hdmi_init_valid [10:42:53] [PASSED] drm_test_connector_hdmi_init_bpc_8 [10:42:53] [PASSED] drm_test_connector_hdmi_init_bpc_10 [10:42:53] [PASSED] drm_test_connector_hdmi_init_bpc_12 [10:42:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [10:42:53] [PASSED] drm_test_connector_hdmi_init_bpc_null [10:42:53] [PASSED] drm_test_connector_hdmi_init_formats_empty [10:42:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [10:42:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [10:42:53] [PASSED] supported_formats=0x9 yuv420_allowed=1 [10:42:53] [PASSED] supported_formats=0x9 yuv420_allowed=0 [10:42:53] [PASSED] supported_formats=0x5 yuv420_allowed=1 [10:42:53] [PASSED] supported_formats=0x5 yuv420_allowed=0 [10:42:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [10:42:53] [PASSED] drm_test_connector_hdmi_init_null_ddc [10:42:53] [PASSED] drm_test_connector_hdmi_init_null_product [10:42:53] [PASSED] drm_test_connector_hdmi_init_null_vendor [10:42:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact [10:42:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [10:42:53] [PASSED] drm_test_connector_hdmi_init_product_valid [10:42:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [10:42:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [10:42:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid [10:42:53] ========= drm_test_connector_hdmi_init_type_valid ========= [10:42:53] [PASSED] HDMI-A [10:42:53] [PASSED] HDMI-B [10:42:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [10:42:53] ======== drm_test_connector_hdmi_init_type_invalid ======== [10:42:53] [PASSED] Unknown [10:42:53] [PASSED] VGA [10:42:53] [PASSED] DVI-I [10:42:53] [PASSED] DVI-D [10:42:53] [PASSED] DVI-A [10:42:53] [PASSED] Composite [10:42:53] [PASSED] SVIDEO [10:42:53] [PASSED] LVDS [10:42:53] [PASSED] Component [10:42:53] [PASSED] DIN [10:42:53] [PASSED] DP [10:42:53] [PASSED] TV [10:42:53] [PASSED] eDP [10:42:53] [PASSED] Virtual [10:42:53] [PASSED] DSI [10:42:53] [PASSED] DPI [10:42:53] [PASSED] Writeback [10:42:53] [PASSED] SPI [10:42:53] [PASSED] USB [10:42:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [10:42:53] ============ [PASSED] drmm_connector_hdmi_init ============= [10:42:53] ============= drmm_connector_init (3 subtests) ============= [10:42:53] [PASSED] drm_test_drmm_connector_init [10:42:53] [PASSED] drm_test_drmm_connector_init_null_ddc [10:42:53] ========= drm_test_drmm_connector_init_type_valid ========= [10:42:53] [PASSED] Unknown [10:42:53] [PASSED] VGA [10:42:53] [PASSED] DVI-I [10:42:53] [PASSED] DVI-D [10:42:53] [PASSED] DVI-A [10:42:53] [PASSED] Composite [10:42:53] [PASSED] SVIDEO [10:42:53] [PASSED] LVDS [10:42:53] [PASSED] Component [10:42:53] [PASSED] DIN [10:42:53] [PASSED] DP [10:42:53] [PASSED] HDMI-A [10:42:53] [PASSED] HDMI-B [10:42:53] [PASSED] TV [10:42:53] [PASSED] eDP [10:42:53] [PASSED] Virtual [10:42:53] [PASSED] DSI [10:42:53] [PASSED] DPI [10:42:53] [PASSED] Writeback [10:42:53] [PASSED] SPI [10:42:53] [PASSED] USB [10:42:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [10:42:53] =============== [PASSED] drmm_connector_init =============== [10:42:53] ========= drm_connector_dynamic_init (6 subtests) ========== [10:42:53] [PASSED] drm_test_drm_connector_dynamic_init [10:42:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [10:42:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added [10:42:53] [PASSED] drm_test_drm_connector_dynamic_init_properties [10:42:53] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [10:42:53] [PASSED] Unknown [10:42:53] [PASSED] VGA [10:42:53] [PASSED] DVI-I [10:42:53] [PASSED] DVI-D [10:42:53] [PASSED] DVI-A [10:42:53] [PASSED] Composite [10:42:53] [PASSED] SVIDEO [10:42:53] [PASSED] LVDS [10:42:53] [PASSED] Component [10:42:53] [PASSED] DIN [10:42:53] [PASSED] DP [10:42:53] [PASSED] HDMI-A [10:42:53] [PASSED] HDMI-B [10:42:53] [PASSED] TV [10:42:53] [PASSED] eDP [10:42:53] [PASSED] Virtual [10:42:53] [PASSED] DSI [10:42:53] [PASSED] DPI [10:42:53] [PASSED] Writeback [10:42:53] [PASSED] SPI [10:42:53] [PASSED] USB [10:42:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [10:42:53] ======== drm_test_drm_connector_dynamic_init_name ========= [10:42:53] [PASSED] Unknown [10:42:53] [PASSED] VGA [10:42:53] [PASSED] DVI-I [10:42:53] [PASSED] DVI-D [10:42:53] [PASSED] DVI-A [10:42:53] [PASSED] Composite [10:42:53] [PASSED] SVIDEO [10:42:53] [PASSED] LVDS [10:42:53] [PASSED] Component [10:42:53] [PASSED] DIN [10:42:53] [PASSED] DP [10:42:53] [PASSED] HDMI-A [10:42:53] [PASSED] HDMI-B [10:42:53] [PASSED] TV [10:42:53] [PASSED] eDP [10:42:53] [PASSED] Virtual [10:42:53] [PASSED] DSI [10:42:53] [PASSED] DPI [10:42:53] [PASSED] Writeback [10:42:53] [PASSED] SPI [10:42:53] [PASSED] USB [10:42:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [10:42:53] =========== [PASSED] drm_connector_dynamic_init ============ [10:42:53] ==== drm_connector_dynamic_register_early (4 subtests) ===== [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [10:42:53] ====== [PASSED] drm_connector_dynamic_register_early ======= [10:42:53] ======= drm_connector_dynamic_register (7 subtests) ======== [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [10:42:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [10:42:53] ========= [PASSED] drm_connector_dynamic_register ========== [10:42:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [10:42:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [10:42:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [10:42:53] === [PASSED] drm_connector_attach_broadcast_rgb_property === [10:42:53] ========== drm_get_tv_mode_from_name (2 subtests) ========== [10:42:53] ========== drm_test_get_tv_mode_from_name_valid =========== [10:42:53] [PASSED] NTSC [10:42:53] [PASSED] NTSC-443 [10:42:53] [PASSED] NTSC-J [10:42:53] [PASSED] PAL [10:42:53] [PASSED] PAL-M [10:42:53] [PASSED] PAL-N [10:42:53] [PASSED] SECAM [10:42:53] [PASSED] Mono [10:42:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [10:42:53] [PASSED] drm_test_get_tv_mode_from_name_truncated [10:42:53] ============ [PASSED] drm_get_tv_mode_from_name ============ [10:42:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [10:42:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [10:42:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [10:42:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [10:42:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [10:42:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [10:42:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [10:42:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [10:42:53] [PASSED] VIC 96 [10:42:53] [PASSED] VIC 97 [10:42:53] [PASSED] VIC 101 [10:42:53] [PASSED] VIC 102 [10:42:53] [PASSED] VIC 106 [10:42:53] [PASSED] VIC 107 [10:42:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [10:42:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [10:42:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [10:42:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [10:42:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [10:42:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [10:42:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [10:42:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [10:42:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [10:42:53] [PASSED] Automatic [10:42:53] [PASSED] Full [10:42:53] [PASSED] Limited 16:235 [10:42:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [10:42:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [10:42:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [10:42:53] == drm_hdmi_connector_get_output_format_name (2 subtests) == [10:42:53] === drm_test_drm_hdmi_connector_get_output_format_name ==== [10:42:53] [PASSED] RGB [10:42:53] [PASSED] YUV 4:2:0 [10:42:53] [PASSED] YUV 4:2:2 [10:42:53] [PASSED] YUV 4:4:4 [10:42:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [10:42:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [10:42:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [10:42:53] ============= drm_damage_helper (21 subtests) ============== [10:42:53] [PASSED] drm_test_damage_iter_no_damage [10:42:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src [10:42:53] [PASSED] drm_test_damage_iter_no_damage_src_moved [10:42:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [10:42:53] [PASSED] drm_test_damage_iter_no_damage_not_visible [10:42:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc [10:42:53] [PASSED] drm_test_damage_iter_no_damage_no_fb [10:42:53] [PASSED] drm_test_damage_iter_simple_damage [10:42:53] [PASSED] drm_test_damage_iter_single_damage [10:42:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src [10:42:53] [PASSED] drm_test_damage_iter_single_damage_outside_src [10:42:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src [10:42:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [10:42:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [10:42:53] [PASSED] drm_test_damage_iter_single_damage_src_moved [10:42:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [10:42:53] [PASSED] drm_test_damage_iter_damage [10:42:53] [PASSED] drm_test_damage_iter_damage_one_intersect [10:42:53] [PASSED] drm_test_damage_iter_damage_one_outside [10:42:53] [PASSED] drm_test_damage_iter_damage_src_moved [10:42:53] [PASSED] drm_test_damage_iter_damage_not_visible [10:42:53] ================ [PASSED] drm_damage_helper ================ [10:42:53] ============== drm_dp_mst_helper (3 subtests) ============== [10:42:53] ============== drm_test_dp_mst_calc_pbn_mode ============== [10:42:53] [PASSED] Clock 154000 BPP 30 DSC disabled [10:42:53] [PASSED] Clock 234000 BPP 30 DSC disabled [10:42:53] [PASSED] Clock 297000 BPP 24 DSC disabled [10:42:53] [PASSED] Clock 332880 BPP 24 DSC enabled [10:42:53] [PASSED] Clock 324540 BPP 24 DSC enabled [10:42:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [10:42:53] ============== drm_test_dp_mst_calc_pbn_div =============== [10:42:53] [PASSED] Link rate 2000000 lane count 4 [10:42:53] [PASSED] Link rate 2000000 lane count 2 [10:42:53] [PASSED] Link rate 2000000 lane count 1 [10:42:53] [PASSED] Link rate 1350000 lane count 4 [10:42:53] [PASSED] Link rate 1350000 lane count 2 [10:42:53] [PASSED] Link rate 1350000 lane count 1 [10:42:53] [PASSED] Link rate 1000000 lane count 4 [10:42:53] [PASSED] Link rate 1000000 lane count 2 [10:42:53] [PASSED] Link rate 1000000 lane count 1 [10:42:53] [PASSED] Link rate 810000 lane count 4 [10:42:53] [PASSED] Link rate 810000 lane count 2 [10:42:53] [PASSED] Link rate 810000 lane count 1 [10:42:53] [PASSED] Link rate 540000 lane count 4 [10:42:53] [PASSED] Link rate 540000 lane count 2 [10:42:53] [PASSED] Link rate 540000 lane count 1 [10:42:53] [PASSED] Link rate 270000 lane count 4 [10:42:53] [PASSED] Link rate 270000 lane count 2 [10:42:53] [PASSED] Link rate 270000 lane count 1 [10:42:53] [PASSED] Link rate 162000 lane count 4 [10:42:53] [PASSED] Link rate 162000 lane count 2 [10:42:53] [PASSED] Link rate 162000 lane count 1 [10:42:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [10:42:53] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [10:42:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number [10:42:53] [PASSED] DP_POWER_UP_PHY with port number [10:42:53] [PASSED] DP_POWER_DOWN_PHY with port number [10:42:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [10:42:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number [10:42:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [10:42:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [10:42:53] [PASSED] DP_QUERY_PAYLOAD with port number [10:42:53] [PASSED] DP_QUERY_PAYLOAD with VCPI [10:42:53] [PASSED] DP_REMOTE_DPCD_READ with port number [10:42:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [10:42:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [10:42:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number [10:42:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [10:42:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array [10:42:53] [PASSED] DP_REMOTE_I2C_READ with port number [10:42:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [10:42:53] [PASSED] DP_REMOTE_I2C_READ with transactions array [10:42:53] [PASSED] DP_REMOTE_I2C_WRITE with port number [10:42:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [10:42:53] [PASSED] DP_REMOTE_I2C_WRITE with data array [10:42:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [10:42:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [10:42:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [10:42:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [10:42:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [10:42:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [10:42:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [10:42:53] ================ [PASSED] drm_dp_mst_helper ================ [10:42:53] ================== drm_exec (7 subtests) =================== [10:42:53] [PASSED] sanitycheck [10:42:53] [PASSED] test_lock [10:42:53] [PASSED] test_lock_unlock [10:42:53] [PASSED] test_duplicates [10:42:53] [PASSED] test_prepare [10:42:53] [PASSED] test_prepare_array [10:42:53] [PASSED] test_multiple_loops [10:42:53] ==================== [PASSED] drm_exec ===================== [10:42:53] =========== drm_format_helper_test (17 subtests) =========== [10:42:53] ============== drm_test_fb_xrgb8888_to_gray8 ============== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [10:42:53] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [10:42:53] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [10:42:53] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [10:42:53] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [10:42:53] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [10:42:53] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [10:42:53] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [10:42:53] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [10:42:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [10:42:53] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [10:42:53] ============== drm_test_fb_xrgb8888_to_mono =============== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [10:42:53] ==================== drm_test_fb_swab ===================== [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ================ [PASSED] drm_test_fb_swab ================= [10:42:53] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [10:42:53] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [10:42:53] [PASSED] single_pixel_source_buffer [10:42:53] [PASSED] single_pixel_clip_rectangle [10:42:53] [PASSED] well_known_colors [10:42:53] [PASSED] destination_pitch [10:42:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [10:42:53] ================= drm_test_fb_clip_offset ================= [10:42:53] [PASSED] pass through [10:42:53] [PASSED] horizontal offset [10:42:53] [PASSED] vertical offset [10:42:53] [PASSED] horizontal and vertical offset [10:42:53] [PASSED] horizontal offset (custom pitch) [10:42:53] [PASSED] vertical offset (custom pitch) [10:42:53] [PASSED] horizontal and vertical offset (custom pitch) [10:42:53] ============= [PASSED] drm_test_fb_clip_offset ============= [10:42:53] =================== drm_test_fb_memcpy ==================== [10:42:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [10:42:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [10:42:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [10:42:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [10:42:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [10:42:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [10:42:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [10:42:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [10:42:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [10:42:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [10:42:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [10:42:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [10:42:53] =============== [PASSED] drm_test_fb_memcpy ================ [10:42:53] ============= [PASSED] drm_format_helper_test ============== [10:42:53] ================= drm_format (18 subtests) ================= [10:42:53] [PASSED] drm_test_format_block_width_invalid [10:42:53] [PASSED] drm_test_format_block_width_one_plane [10:42:53] [PASSED] drm_test_format_block_width_two_plane [10:42:53] [PASSED] drm_test_format_block_width_three_plane [10:42:53] [PASSED] drm_test_format_block_width_tiled [10:42:53] [PASSED] drm_test_format_block_height_invalid [10:42:53] [PASSED] drm_test_format_block_height_one_plane [10:42:53] [PASSED] drm_test_format_block_height_two_plane [10:42:53] [PASSED] drm_test_format_block_height_three_plane [10:42:53] [PASSED] drm_test_format_block_height_tiled [10:42:53] [PASSED] drm_test_format_min_pitch_invalid [10:42:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [10:42:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [10:42:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [10:42:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [10:42:53] [PASSED] drm_test_format_min_pitch_two_plane [10:42:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [10:42:53] [PASSED] drm_test_format_min_pitch_tiled [10:42:53] =================== [PASSED] drm_format ==================== [10:42:53] ============== drm_framebuffer (10 subtests) =============== [10:42:53] ========== drm_test_framebuffer_check_src_coords ========== [10:42:53] [PASSED] Success: source fits into fb [10:42:53] [PASSED] Fail: overflowing fb with x-axis coordinate [10:42:53] [PASSED] Fail: overflowing fb with y-axis coordinate [10:42:53] [PASSED] Fail: overflowing fb with source width [10:42:53] [PASSED] Fail: overflowing fb with source height [10:42:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [10:42:53] [PASSED] drm_test_framebuffer_cleanup [10:42:53] =============== drm_test_framebuffer_create =============== [10:42:53] [PASSED] ABGR8888 normal sizes [10:42:53] [PASSED] ABGR8888 max sizes [10:42:53] [PASSED] ABGR8888 pitch greater than min required [10:42:53] [PASSED] ABGR8888 pitch less than min required [10:42:53] [PASSED] ABGR8888 Invalid width [10:42:53] [PASSED] ABGR8888 Invalid buffer handle [10:42:53] [PASSED] No pixel format [10:42:53] [PASSED] ABGR8888 Width 0 [10:42:53] [PASSED] ABGR8888 Height 0 [10:42:53] [PASSED] ABGR8888 Out of bound height * pitch combination [10:42:53] [PASSED] ABGR8888 Large buffer offset [10:42:53] [PASSED] ABGR8888 Buffer offset for inexistent plane [10:42:53] [PASSED] ABGR8888 Invalid flag [10:42:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [10:42:53] [PASSED] ABGR8888 Valid buffer modifier [10:42:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [10:42:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] NV12 Normal sizes [10:42:53] [PASSED] NV12 Max sizes [10:42:53] [PASSED] NV12 Invalid pitch [10:42:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [10:42:53] [PASSED] NV12 different modifier per-plane [10:42:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [10:42:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] NV12 Modifier for inexistent plane [10:42:53] [PASSED] NV12 Handle for inexistent plane [10:42:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [10:42:53] [PASSED] YVU420 Normal sizes [10:42:53] [PASSED] YVU420 Max sizes [10:42:53] [PASSED] YVU420 Invalid pitch [10:42:53] [PASSED] YVU420 Different pitches [10:42:53] [PASSED] YVU420 Different buffer offsets/pitches [10:42:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [10:42:53] [PASSED] YVU420 Valid modifier [10:42:53] [PASSED] YVU420 Different modifiers per plane [10:42:53] [PASSED] YVU420 Modifier for inexistent plane [10:42:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [10:42:53] [PASSED] X0L2 Normal sizes [10:42:53] [PASSED] X0L2 Max sizes [10:42:53] [PASSED] X0L2 Invalid pitch [10:42:53] [PASSED] X0L2 Pitch greater than minimum required [10:42:53] [PASSED] X0L2 Handle for inexistent plane [10:42:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [10:42:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [10:42:53] [PASSED] X0L2 Valid modifier [10:42:53] [PASSED] X0L2 Modifier for inexistent plane [10:42:53] =========== [PASSED] drm_test_framebuffer_create =========== [10:42:53] [PASSED] drm_test_framebuffer_free [10:42:53] [PASSED] drm_test_framebuffer_init [10:42:53] [PASSED] drm_test_framebuffer_init_bad_format [10:42:53] [PASSED] drm_test_framebuffer_init_dev_mismatch [10:42:53] [PASSED] drm_test_framebuffer_lookup [10:42:53] [PASSED] drm_test_framebuffer_lookup_inexistent [10:42:53] [PASSED] drm_test_framebuffer_modifiers_not_supported [10:42:53] ================= [PASSED] drm_framebuffer ================= [10:42:53] ================ drm_gem_shmem (8 subtests) ================ [10:42:53] [PASSED] drm_gem_shmem_test_obj_create [10:42:53] [PASSED] drm_gem_shmem_test_obj_create_private [10:42:53] [PASSED] drm_gem_shmem_test_pin_pages [10:42:53] [PASSED] drm_gem_shmem_test_vmap [10:42:53] [PASSED] drm_gem_shmem_test_get_sg_table [10:42:53] [PASSED] drm_gem_shmem_test_get_pages_sgt [10:42:53] [PASSED] drm_gem_shmem_test_madvise [10:42:53] [PASSED] drm_gem_shmem_test_purge [10:42:53] ================== [PASSED] drm_gem_shmem ================== [10:42:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [10:42:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [10:42:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [10:42:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [10:42:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [10:42:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [10:42:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [10:42:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [10:42:53] [PASSED] Automatic [10:42:53] [PASSED] Full [10:42:53] [PASSED] Limited 16:235 [10:42:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [10:42:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [10:42:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [10:42:53] [PASSED] drm_test_check_disable_connector [10:42:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate [10:42:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [10:42:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [10:42:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [10:42:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [10:42:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [10:42:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [10:42:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [10:42:53] [PASSED] drm_test_check_output_bpc_dvi [10:42:53] [PASSED] drm_test_check_output_bpc_format_vic_1 [10:42:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [10:42:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [10:42:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [10:42:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [10:42:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [10:42:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [10:42:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [10:42:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [10:42:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [10:42:53] [PASSED] drm_test_check_broadcast_rgb_value [10:42:53] [PASSED] drm_test_check_bpc_8_value [10:42:53] [PASSED] drm_test_check_bpc_10_value [10:42:53] [PASSED] drm_test_check_bpc_12_value [10:42:53] [PASSED] drm_test_check_format_value [10:42:53] [PASSED] drm_test_check_tmds_char_value [10:42:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [10:42:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [10:42:53] [PASSED] drm_test_check_mode_valid [10:42:53] [PASSED] drm_test_check_mode_valid_reject [10:42:53] [PASSED] drm_test_check_mode_valid_reject_rate [10:42:53] [PASSED] drm_test_check_mode_valid_reject_max_clock [10:42:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [10:42:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [10:42:53] [PASSED] drm_test_check_infoframes [10:42:53] [PASSED] drm_test_check_reject_avi_infoframe [10:42:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [10:42:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [10:42:53] [PASSED] drm_test_check_reject_audio_infoframe [10:42:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [10:42:53] ================= drm_managed (2 subtests) ================= [10:42:53] [PASSED] drm_test_managed_release_action [10:42:53] [PASSED] drm_test_managed_run_action [10:42:53] =================== [PASSED] drm_managed =================== [10:42:53] =================== drm_mm (6 subtests) ==================== [10:42:53] [PASSED] drm_test_mm_init [10:42:53] [PASSED] drm_test_mm_debug [10:42:53] [PASSED] drm_test_mm_align32 [10:42:53] [PASSED] drm_test_mm_align64 [10:42:53] [PASSED] drm_test_mm_lowest [10:42:53] [PASSED] drm_test_mm_highest [10:42:53] ===================== [PASSED] drm_mm ====================== [10:42:53] ============= drm_modes_analog_tv (5 subtests) ============= [10:42:53] [PASSED] drm_test_modes_analog_tv_mono_576i [10:42:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i [10:42:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [10:42:53] [PASSED] drm_test_modes_analog_tv_pal_576i [10:42:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [10:42:53] =============== [PASSED] drm_modes_analog_tv =============== [10:42:53] ============== drm_plane_helper (2 subtests) =============== [10:42:53] =============== drm_test_check_plane_state ================ [10:42:53] [PASSED] clipping_simple [10:42:53] [PASSED] clipping_rotate_reflect [10:42:53] [PASSED] positioning_simple [10:42:53] [PASSED] upscaling [10:42:53] [PASSED] downscaling [10:42:53] [PASSED] rounding1 [10:42:53] [PASSED] rounding2 [10:42:53] [PASSED] rounding3 [10:42:53] [PASSED] rounding4 [10:42:53] =========== [PASSED] drm_test_check_plane_state ============ [10:42:53] =========== drm_test_check_invalid_plane_state ============ [10:42:53] [PASSED] positioning_invalid [10:42:53] [PASSED] upscaling_invalid [10:42:53] [PASSED] downscaling_invalid [10:42:53] ======= [PASSED] drm_test_check_invalid_plane_state ======== [10:42:53] ================ [PASSED] drm_plane_helper ================= [10:42:53] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [10:42:53] ====== drm_test_connector_helper_tv_get_modes_check ======= [10:42:53] [PASSED] None [10:42:53] [PASSED] PAL [10:42:53] [PASSED] NTSC [10:42:53] [PASSED] Both, NTSC Default [10:42:53] [PASSED] Both, PAL Default [10:42:53] [PASSED] Both, NTSC Default, with PAL on command-line [10:42:53] [PASSED] Both, PAL Default, with NTSC on command-line [10:42:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [10:42:53] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [10:42:53] ================== drm_rect (9 subtests) =================== [10:42:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero [10:42:53] [PASSED] drm_test_rect_clip_scaled_not_clipped [10:42:53] [PASSED] drm_test_rect_clip_scaled_clipped [10:42:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [10:42:53] ================= drm_test_rect_intersect ================= [10:42:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [10:42:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [10:42:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [10:42:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [10:42:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [10:42:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [10:42:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [10:42:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [10:42:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [10:42:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [10:42:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [10:42:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [10:42:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [10:42:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [10:42:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [10:42:53] ============= [PASSED] drm_test_rect_intersect ============= [10:42:53] ================ drm_test_rect_calc_hscale ================ [10:42:53] [PASSED] normal use [10:42:53] [PASSED] out of max range [10:42:53] [PASSED] out of min range [10:42:53] [PASSED] zero dst [10:42:53] [PASSED] negative src [10:42:53] [PASSED] negative dst [10:42:53] ============ [PASSED] drm_test_rect_calc_hscale ============ [10:42:53] ================ drm_test_rect_calc_vscale ================ [10:42:53] [PASSED] normal use [10:42:53] [PASSED] out of max range [10:42:53] [PASSED] out of min range [10:42:53] [PASSED] zero dst [10:42:53] [PASSED] negative src [10:42:53] [PASSED] negative dst [10:42:53] ============ [PASSED] drm_test_rect_calc_vscale ============ [10:42:53] ================== drm_test_rect_rotate =================== [10:42:53] [PASSED] reflect-x [10:42:53] [PASSED] reflect-y [10:42:53] [PASSED] rotate-0 [10:42:53] [PASSED] rotate-90 [10:42:53] [PASSED] rotate-180 [10:42:53] [PASSED] rotate-270 [10:42:53] ============== [PASSED] drm_test_rect_rotate =============== [10:42:53] ================ drm_test_rect_rotate_inv ================= [10:42:53] [PASSED] reflect-x [10:42:53] [PASSED] reflect-y [10:42:53] [PASSED] rotate-0 [10:42:53] [PASSED] rotate-90 [10:42:53] [PASSED] rotate-180 [10:42:53] [PASSED] rotate-270 [10:42:53] ============ [PASSED] drm_test_rect_rotate_inv ============= [10:42:53] ==================== [PASSED] drm_rect ===================== [10:42:53] ============ drm_sysfb_modeset_test (1 subtest) ============ [10:42:53] ============ drm_test_sysfb_build_fourcc_list ============= [10:42:53] [PASSED] no native formats [10:42:53] [PASSED] XRGB8888 as native format [10:42:53] [PASSED] remove duplicates [10:42:53] [PASSED] convert alpha formats [10:42:53] [PASSED] random formats [10:42:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [10:42:53] ============= [PASSED] drm_sysfb_modeset_test ============== [10:42:53] ================== drm_fixp (2 subtests) =================== [10:42:53] [PASSED] drm_test_int2fixp [10:42:53] [PASSED] drm_test_sm2fixp [10:42:53] ==================== [PASSED] drm_fixp ===================== [10:42:53] ============================================================ [10:42:53] Testing complete. Ran 621 tests: passed: 621 [10:42:53] Elapsed time: 26.333s total, 1.778s configuring, 24.386s building, 0.139s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [10:42:54] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [10:42:55] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:43:05] Starting KUnit Kernel (1/1)... [10:43:05] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:43:05] ================= ttm_device (5 subtests) ================== [10:43:05] [PASSED] ttm_device_init_basic [10:43:05] [PASSED] ttm_device_init_multiple [10:43:05] [PASSED] ttm_device_fini_basic [10:43:05] [PASSED] ttm_device_init_no_vma_man [10:43:05] ================== ttm_device_init_pools ================== [10:43:05] [PASSED] No DMA allocations, no DMA32 required [10:43:05] [PASSED] DMA allocations, DMA32 required [10:43:05] [PASSED] No DMA allocations, DMA32 required [10:43:05] [PASSED] DMA allocations, no DMA32 required [10:43:05] ============== [PASSED] ttm_device_init_pools ============== [10:43:05] =================== [PASSED] ttm_device ==================== [10:43:05] ================== ttm_pool (8 subtests) =================== [10:43:05] ================== ttm_pool_alloc_basic =================== [10:43:05] [PASSED] One page [10:43:05] [PASSED] More than one page [10:43:05] [PASSED] Above the allocation limit [10:43:05] [PASSED] One page, with coherent DMA mappings enabled [10:43:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [10:43:05] ============== [PASSED] ttm_pool_alloc_basic =============== [10:43:05] ============== ttm_pool_alloc_basic_dma_addr ============== [10:43:05] [PASSED] One page [10:43:05] [PASSED] More than one page [10:43:05] [PASSED] Above the allocation limit [10:43:05] [PASSED] One page, with coherent DMA mappings enabled [10:43:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [10:43:05] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [10:43:05] [PASSED] ttm_pool_alloc_order_caching_match [10:43:05] [PASSED] ttm_pool_alloc_caching_mismatch [10:43:05] [PASSED] ttm_pool_alloc_order_mismatch [10:43:05] [PASSED] ttm_pool_free_dma_alloc [10:43:05] [PASSED] ttm_pool_free_no_dma_alloc [10:43:05] [PASSED] ttm_pool_fini_basic [10:43:05] ==================== [PASSED] ttm_pool ===================== [10:43:05] ================ ttm_resource (8 subtests) ================= [10:43:05] ================= ttm_resource_init_basic ================= [10:43:05] [PASSED] Init resource in TTM_PL_SYSTEM [10:43:05] [PASSED] Init resource in TTM_PL_VRAM [10:43:05] [PASSED] Init resource in a private placement [10:43:05] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [10:43:05] ============= [PASSED] ttm_resource_init_basic ============= [10:43:05] [PASSED] ttm_resource_init_pinned [10:43:05] [PASSED] ttm_resource_fini_basic [10:43:05] [PASSED] ttm_resource_manager_init_basic [10:43:05] [PASSED] ttm_resource_manager_usage_basic [10:43:05] [PASSED] ttm_resource_manager_set_used_basic [10:43:05] [PASSED] ttm_sys_man_alloc_basic [10:43:05] [PASSED] ttm_sys_man_free_basic [10:43:05] ================== [PASSED] ttm_resource =================== [10:43:05] =================== ttm_tt (15 subtests) =================== [10:43:05] ==================== ttm_tt_init_basic ==================== [10:43:05] [PASSED] Page-aligned size [10:43:05] [PASSED] Extra pages requested [10:43:05] ================ [PASSED] ttm_tt_init_basic ================ [10:43:05] [PASSED] ttm_tt_init_misaligned [10:43:05] [PASSED] ttm_tt_fini_basic [10:43:05] [PASSED] ttm_tt_fini_sg [10:43:05] [PASSED] ttm_tt_fini_shmem [10:43:05] [PASSED] ttm_tt_create_basic [10:43:05] [PASSED] ttm_tt_create_invalid_bo_type [10:43:05] [PASSED] ttm_tt_create_ttm_exists [10:43:05] [PASSED] ttm_tt_create_failed [10:43:05] [PASSED] ttm_tt_destroy_basic [10:43:05] [PASSED] ttm_tt_populate_null_ttm [10:43:05] [PASSED] ttm_tt_populate_populated_ttm [10:43:05] [PASSED] ttm_tt_unpopulate_basic [10:43:05] [PASSED] ttm_tt_unpopulate_empty_ttm [10:43:05] [PASSED] ttm_tt_swapin_basic [10:43:05] ===================== [PASSED] ttm_tt ====================== [10:43:05] =================== ttm_bo (14 subtests) =================== [10:43:05] =========== ttm_bo_reserve_optimistic_no_ticket =========== [10:43:05] [PASSED] Cannot be interrupted and sleeps [10:43:05] [PASSED] Cannot be interrupted, locks straight away [10:43:05] [PASSED] Can be interrupted, sleeps [10:43:05] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [10:43:05] [PASSED] ttm_bo_reserve_locked_no_sleep [10:43:05] [PASSED] ttm_bo_reserve_no_wait_ticket [10:43:05] [PASSED] ttm_bo_reserve_double_resv [10:43:05] [PASSED] ttm_bo_reserve_interrupted [10:43:05] [PASSED] ttm_bo_reserve_deadlock [10:43:05] [PASSED] ttm_bo_unreserve_basic [10:43:05] [PASSED] ttm_bo_unreserve_pinned [10:43:05] [PASSED] ttm_bo_unreserve_bulk [10:43:05] [PASSED] ttm_bo_fini_basic [10:43:05] [PASSED] ttm_bo_fini_shared_resv [10:43:05] [PASSED] ttm_bo_pin_basic [10:43:05] [PASSED] ttm_bo_pin_unpin_resource [10:43:05] [PASSED] ttm_bo_multiple_pin_one_unpin [10:43:05] ===================== [PASSED] ttm_bo ====================== [10:43:05] ============== ttm_bo_validate (22 subtests) =============== [10:43:05] ============== ttm_bo_init_reserved_sys_man =============== [10:43:05] [PASSED] Buffer object for userspace [10:43:05] [PASSED] Kernel buffer object [10:43:05] [PASSED] Shared buffer object [10:43:05] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [10:43:05] ============== ttm_bo_init_reserved_mock_man ============== [10:43:05] [PASSED] Buffer object for userspace [10:43:05] [PASSED] Kernel buffer object [10:43:05] [PASSED] Shared buffer object [10:43:05] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [10:43:05] [PASSED] ttm_bo_init_reserved_resv [10:43:05] ================== ttm_bo_validate_basic ================== [10:43:05] [PASSED] Buffer object for userspace [10:43:05] [PASSED] Kernel buffer object [10:43:05] [PASSED] Shared buffer object [10:43:05] ============== [PASSED] ttm_bo_validate_basic ============== [10:43:05] [PASSED] ttm_bo_validate_invalid_placement [10:43:05] ============= ttm_bo_validate_same_placement ============== [10:43:05] [PASSED] System manager [10:43:05] [PASSED] VRAM manager [10:43:05] ========= [PASSED] ttm_bo_validate_same_placement ========== [10:43:05] [PASSED] ttm_bo_validate_failed_alloc [10:43:05] [PASSED] ttm_bo_validate_pinned [10:43:05] [PASSED] ttm_bo_validate_busy_placement [10:43:05] ================ ttm_bo_validate_multihop ================= [10:43:05] [PASSED] Buffer object for userspace [10:43:05] [PASSED] Kernel buffer object [10:43:05] [PASSED] Shared buffer object [10:43:05] ============ [PASSED] ttm_bo_validate_multihop ============= [10:43:05] ========== ttm_bo_validate_no_placement_signaled ========== [10:43:05] [PASSED] Buffer object in system domain, no page vector [10:43:05] [PASSED] Buffer object in system domain with an existing page vector [10:43:05] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [10:43:05] ======== ttm_bo_validate_no_placement_not_signaled ======== [10:43:05] [PASSED] Buffer object for userspace [10:43:05] [PASSED] Kernel buffer object [10:43:05] [PASSED] Shared buffer object [10:43:05] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [10:43:05] [PASSED] ttm_bo_validate_move_fence_signaled [10:43:05] ========= ttm_bo_validate_move_fence_not_signaled ========= [10:43:05] [PASSED] Waits for GPU [10:43:05] [PASSED] Tries to lock straight away [10:43:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [10:43:05] [PASSED] ttm_bo_validate_swapout [10:43:05] [PASSED] ttm_bo_validate_happy_evict [10:43:05] [PASSED] ttm_bo_validate_all_pinned_evict [10:43:05] [PASSED] ttm_bo_validate_allowed_only_evict [10:43:05] [PASSED] ttm_bo_validate_deleted_evict [10:43:05] [PASSED] ttm_bo_validate_busy_domain_evict [10:43:05] [PASSED] ttm_bo_validate_evict_gutting [10:43:05] [PASSED] ttm_bo_validate_recrusive_evict [10:43:05] ================= [PASSED] ttm_bo_validate ================= [10:43:05] ============================================================ [10:43:05] Testing complete. Ran 102 tests: passed: 102 [10:43:05] Elapsed time: 11.491s total, 1.731s configuring, 9.545s building, 0.176s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola ` (4 preceding siblings ...) 2026-05-18 10:43 ` ✓ CI.KUnit: success for drm/i915/display: Switch DG2 MPLLB handling to the " Patchwork @ 2026-05-18 11:20 ` Patchwork 2026-05-18 14:00 ` ✗ Xe.CI.FULL: failure " Patchwork ` (2 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2026-05-18 11:20 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 979 bytes --] == Series Details == Series: drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework URL : https://patchwork.freedesktop.org/series/166763/ State : success == Summary == CI Bug Log - changes from xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6_BAT -> xe-pw-166763v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (13 -> 13) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * Linux: xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6 -> xe-pw-166763v1 IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6: 7f24c6c468e833a3ca3d839267e3730b6fa999d6 xe-pw-166763v1: 166763v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/index.html [-- Attachment #2: Type: text/html, Size: 1527 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola ` (5 preceding siblings ...) 2026-05-18 11:20 ` ✓ Xe.CI.BAT: " Patchwork @ 2026-05-18 14:00 ` Patchwork 2026-05-18 14:08 ` ✓ i915.CI.BAT: success " Patchwork 2026-05-18 22:58 ` ✓ i915.CI.Full: " Patchwork 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2026-05-18 14:00 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 27465 bytes --] == Series Details == Series: drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework URL : https://patchwork.freedesktop.org/series/166763/ State : failure == Summary == CI Bug Log - changes from xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6_FULL -> xe-pw-166763v1_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-166763v1_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-166763v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (2 -> 2) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-166763v1_FULL: ### IGT changes ### #### Possible regressions #### * igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset: - shard-bmg: NOTRUN -> [ABORT][1] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html Known issues ------------ Here are the changes found in xe-pw-166763v1_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_big_fb@y-tiled-16bpp-rotate-180: - shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#1124]) [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html * igt@kms_chamelium_color@ctm-0-25: - shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2325] / [Intel XE#7358]) [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_chamelium_color@ctm-0-25.html - shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#306] / [Intel XE#7358]) [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_chamelium_color@ctm-0-25.html * igt@kms_chamelium_hpd@hdmi-hpd: - shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2252]) [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_chamelium_hpd@hdmi-hpd.html * igt@kms_cursor_crc@cursor-random-max-size: - shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#1424]) [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_cursor_crc@cursor-random-max-size.html - shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2320]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_cursor_crc@cursor-random-max-size.html * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size: - shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#309] / [Intel XE#7343]) [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html * igt@kms_flip@flip-vs-expired-vblank@b-edp1: - shard-lnl: [PASS][9] -> [FAIL][10] ([Intel XE#301]) +1 other test fail [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling: - shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#7178] / [Intel XE#7351]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html * igt@kms_frontbuffer_tracking@drrs-slowdraw: - shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#6312] / [Intel XE#651]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-slowdraw.html * igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-pri-indfb-draw-blt: - shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#7905]) [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#4141]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#7061] / [Intel XE#7356]) [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt: - shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2311]) +6 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt: - shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#7865]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-cur-indfb-move: - shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2313]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-cur-indfb-move.html * igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010: - shard-bmg: [PASS][19] -> [SKIP][20] ([Intel XE#7915]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf: - shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html - shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#1489]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#4608]) [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1.html * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#4608] / [Intel XE#7304]) [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1.html * igt@xe_eudebug_online@stopped-thread: - shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#7636]) [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@xe_eudebug_online@stopped-thread.html - shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#7636]) [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@xe_eudebug_online@stopped-thread.html * igt@xe_evict@evict-large-external: - shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#6540] / [Intel XE#688]) [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@xe_evict@evict-large-external.html * igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-close-fd: - shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#6874]) [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-close-fd.html * igt@xe_vm@overcommit-nonfault-vram-no-lr: - shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#7892]) [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-5/igt@xe_vm@overcommit-nonfault-vram-no-lr.html #### Possible fixes #### * igt@fbdev@unaligned-write: - shard-bmg: [FAIL][30] ([Intel XE#7950]) -> [PASS][31] [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@fbdev@unaligned-write.html [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@fbdev@unaligned-write.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-bmg: [FAIL][32] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][33] [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip.html [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html - shard-lnl: [FAIL][34] ([Intel XE#3718] / [Intel XE#7265]) -> [PASS][35] +1 other test pass [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-lnl-4/igt@kms_async_flips@alternate-sync-async-flip.html [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-lnl-1/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2: - shard-bmg: [FAIL][36] ([Intel XE#6078]) -> [PASS][37] [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html * igt@kms_cursor_legacy@cursor-vs-flip-toggle: - shard-bmg: [SKIP][38] ([Intel XE#6703] / [Intel XE#7935]) -> [PASS][39] [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-dp2: - shard-bmg: [DMESG-FAIL][40] ([Intel XE#7774]) -> [PASS][41] +1 other test pass [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-dp2.html [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-dp2.html * igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f: - shard-bmg: [SKIP][42] ([Intel XE#7915]) -> [PASS][43] +3 other tests pass [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-3/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-10/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html * igt@xe_exec_system_allocator@many-stride-mmap-prefetch: - shard-bmg: [SKIP][44] ([Intel XE#6557] / [Intel XE#6703]) -> [PASS][45] [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_exec_system_allocator@many-stride-mmap-prefetch.html [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_exec_system_allocator@many-stride-mmap-prefetch.html * igt@xe_exec_system_allocator@once-large-mmap-huge-nomemset: - shard-bmg: [INCOMPLETE][46] -> [PASS][47] [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-5/igt@xe_exec_system_allocator@once-large-mmap-huge-nomemset.html [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-1/igt@xe_exec_system_allocator@once-large-mmap-huge-nomemset.html * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early: - shard-bmg: [SKIP][48] ([Intel XE#6703]) -> [PASS][49] +81 other tests pass [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html * igt@xe_wedged@wedged-mode-toggle: - shard-bmg: [ABORT][50] ([Intel XE#7914]) -> [PASS][51] [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-9/igt@xe_wedged@wedged-mode-toggle.html [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-2/igt@xe_wedged@wedged-mode-toggle.html #### Warnings #### * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-bmg: [SKIP][52] ([Intel XE#6703]) -> [SKIP][53] ([Intel XE#1124]) +1 other test skip [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc: - shard-bmg: [SKIP][54] ([Intel XE#6703]) -> [SKIP][55] ([Intel XE#2887]) +2 other tests skip [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc.html [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc.html * igt@kms_chamelium_hpd@dp-hpd-after-suspend: - shard-bmg: [SKIP][56] ([Intel XE#6703]) -> [SKIP][57] ([Intel XE#2252]) [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html * igt@kms_cursor_crc@cursor-onscreen-512x170: - shard-bmg: [SKIP][58] ([Intel XE#6703]) -> [SKIP][59] ([Intel XE#2321] / [Intel XE#7355]) [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-bmg: [SKIP][60] ([Intel XE#6703]) -> [SKIP][61] ([Intel XE#2286] / [Intel XE#6035]) [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt: - shard-bmg: [SKIP][62] ([Intel XE#6703]) -> [SKIP][63] ([Intel XE#4141]) +1 other test skip [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt: - shard-bmg: [SKIP][64] ([Intel XE#6703]) -> [SKIP][65] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt.html [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt: - shard-bmg: [SKIP][66] ([Intel XE#6703]) -> [SKIP][67] ([Intel XE#2311]) +3 other tests skip [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt.html [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-rgb565-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-bmg: [SKIP][68] ([Intel XE#6703]) -> [SKIP][69] ([Intel XE#2313]) +6 other tests skip [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y: - shard-bmg: [SKIP][70] ([Intel XE#6703]) -> [SKIP][71] ([Intel XE#7399]) [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-bmg: [SKIP][72] ([Intel XE#6703]) -> [SKIP][73] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_psr@pr-primary-blt: - shard-bmg: [SKIP][74] ([Intel XE#6703]) -> [SKIP][75] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_psr@pr-primary-blt.html [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@kms_psr@pr-primary-blt.html * igt@kms_tiled_display@basic-test-pattern: - shard-bmg: [FAIL][76] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][77] ([Intel XE#2426] / [Intel XE#5848]) [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-bmg: [SKIP][78] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][79] ([Intel XE#2426] / [Intel XE#5848]) [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@xe_eudebug_online@pagefault-read: - shard-bmg: [SKIP][80] ([Intel XE#6703]) -> [SKIP][81] ([Intel XE#7636]) +1 other test skip [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_eudebug_online@pagefault-read.html [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_eudebug_online@pagefault-read.html * igt@xe_exec_basic@multigpu-once-userptr-invalidate: - shard-bmg: [SKIP][82] ([Intel XE#6703]) -> [SKIP][83] ([Intel XE#2322] / [Intel XE#7372]) [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_exec_basic@multigpu-once-userptr-invalidate.html [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_exec_basic@multigpu-once-userptr-invalidate.html * igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-prefetch: - shard-bmg: [SKIP][84] ([Intel XE#6703]) -> [SKIP][85] ([Intel XE#7136]) [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-prefetch.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-prefetch.html * igt@xe_exec_multi_queue@many-execs-dyn-priority-smem: - shard-bmg: [SKIP][86] ([Intel XE#6703]) -> [SKIP][87] ([Intel XE#6874]) +2 other tests skip [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_exec_multi_queue@many-execs-dyn-priority-smem.html [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_exec_multi_queue@many-execs-dyn-priority-smem.html * igt@xe_page_reclaim@pat-index-xd: - shard-bmg: [SKIP][88] ([Intel XE#6703]) -> [SKIP][89] ([Intel XE#7793]) [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6/shard-bmg-2/igt@xe_page_reclaim@pat-index-xd.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/shard-bmg-6/igt@xe_page_reclaim@pat-index-xd.html [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325 [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426 [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608 [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848 [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035 [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078 [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540 [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557 [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703 [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061 [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136 [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178 [Intel XE#7265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7265 [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304 [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343 [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351 [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355 [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356 [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358 [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372 [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383 [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399 [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424 [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437 [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636 [Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774 [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793 [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865 [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892 [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905 [Intel XE#7914]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7914 [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915 [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935 [Intel XE#7950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7950 [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836 Build changes ------------- * Linux: xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6 -> xe-pw-166763v1 IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5078-7f24c6c468e833a3ca3d839267e3730b6fa999d6: 7f24c6c468e833a3ca3d839267e3730b6fa999d6 xe-pw-166763v1: 166763v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166763v1/index.html [-- Attachment #2: Type: text/html, Size: 31748 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola ` (6 preceding siblings ...) 2026-05-18 14:00 ` ✗ Xe.CI.FULL: failure " Patchwork @ 2026-05-18 14:08 ` Patchwork 2026-05-18 22:58 ` ✓ i915.CI.Full: " Patchwork 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2026-05-18 14:08 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 2495 bytes --] == Series Details == Series: drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework URL : https://patchwork.freedesktop.org/series/166764/ State : success == Summary == CI Bug Log - changes from CI_DRM_18505 -> Patchwork_166764v1 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/index.html Participating hosts (42 -> 31) ------------------------------ Missing (11): fi-kbl-7567u bat-kbl-2 fi-bsw-n3050 fi-ilk-650 fi-snb-2520m bat-jsl-5 fi-hsw-4770 fi-ivb-3770 fi-elk-e7500 fi-pnv-d510 bat-dg2-13 Known issues ------------ Here are the changes found in Patchwork_166764v1 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@workarounds: - bat-dg2-9: [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-dg2-9/igt@i915_selftest@live@workarounds.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/bat-dg2-9/igt@i915_selftest@live@workarounds.html #### Possible fixes #### * igt@i915_selftest@live@workarounds: - bat-arlh-3: [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-arlh-3/igt@i915_selftest@live@workarounds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html - bat-dg2-14: [DMESG-FAIL][5] ([i915#12061]) -> [PASS][6] +1 other test pass [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/bat-dg2-14/igt@i915_selftest@live@workarounds.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/bat-dg2-14/igt@i915_selftest@live@workarounds.html [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 Build changes ------------- * Linux: CI_DRM_18505 -> Patchwork_166764v1 CI-20190529: 20190529 CI_DRM_18505: 4a64e92e2b244c93c99832a0850204ed2ddca5b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_166764v1: 4a64e92e2b244c93c99832a0850204ed2ddca5b2 @ git://anongit.freedesktop.org/gfx-ci/linux == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/index.html [-- Attachment #2: Type: text/html, Size: 3265 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ i915.CI.Full: success for drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola ` (7 preceding siblings ...) 2026-05-18 14:08 ` ✓ i915.CI.BAT: success " Patchwork @ 2026-05-18 22:58 ` Patchwork 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2026-05-18 22:58 UTC (permalink / raw) To: Mika Kahola; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 119824 bytes --] == Series Details == Series: drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework URL : https://patchwork.freedesktop.org/series/166764/ State : success == Summary == CI Bug Log - changes from CI_DRM_18505_full -> Patchwork_166764v1_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_166764v1_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_sseu@invalid-sseu: - shard-tglu-1: NOTRUN -> [SKIP][1] ([i915#280]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@gem_ctx_sseu@invalid-sseu.html * igt@gem_exec_balancer@parallel-balancer: - shard-rkl: NOTRUN -> [SKIP][2] ([i915#4525]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_exec_balancer@parallel-balancer.html - shard-tglu: NOTRUN -> [SKIP][3] ([i915#4525]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@gem_exec_balancer@parallel-balancer.html * igt@gem_exec_balancer@parallel-dmabuf-import-out-fence: - shard-tglu-1: NOTRUN -> [SKIP][4] ([i915#4525]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@gem_exec_balancer@parallel-dmabuf-import-out-fence.html * igt@gem_exec_reloc@basic-cpu-gtt: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#3281]) +5 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@gem_exec_reloc@basic-cpu-gtt.html * igt@gem_exec_reloc@basic-softpin: - shard-rkl: NOTRUN -> [SKIP][6] ([i915#3281]) +6 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@gem_exec_reloc@basic-softpin.html * igt@gem_lmem_evict@dontneed-evict-race: - shard-tglu: NOTRUN -> [SKIP][7] ([i915#4613] / [i915#7582]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@gem_lmem_evict@dontneed-evict-race.html * igt@gem_lmem_swapping@heavy-verify-multi-ccs: - shard-rkl: NOTRUN -> [SKIP][8] ([i915#4613]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html - shard-tglu-1: NOTRUN -> [SKIP][9] ([i915#4613]) +2 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html * igt@gem_lmem_swapping@verify-random: - shard-tglu: NOTRUN -> [SKIP][10] ([i915#4613]) +1 other test skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@gem_lmem_swapping@verify-random.html * igt@gem_lmem_swapping@verify-random-ccs: - shard-glk: NOTRUN -> [SKIP][11] ([i915#4613]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk3/igt@gem_lmem_swapping@verify-random-ccs.html * igt@gem_madvise@dontneed-before-pwrite: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#3282]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@gem_madvise@dontneed-before-pwrite.html * igt@gem_mmap_gtt@bad-object: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#4077]) +4 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@gem_mmap_gtt@bad-object.html * igt@gem_mmap_wc@write-gtt-read-wc: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#4083]) +3 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@gem_mmap_wc@write-gtt-read-wc.html * igt@gem_partial_pwrite_pread@reads-display: - shard-rkl: NOTRUN -> [SKIP][15] ([i915#3282]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@gem_partial_pwrite_pread@reads-display.html * igt@gem_pread@exhaustion: - shard-tglu-1: NOTRUN -> [WARN][16] ([i915#2658]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@gem_pread@exhaustion.html * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-yf-tiled: - shard-dg2: NOTRUN -> [SKIP][17] ([i915#5190] / [i915#8428]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-yf-tiled.html * igt@gem_softpin@evict-snoop-interruptible: - shard-dg2: NOTRUN -> [SKIP][18] ([i915#4885]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@gem_softpin@evict-snoop-interruptible.html * igt@gem_userptr_blits@dmabuf-unsync: - shard-dg2: NOTRUN -> [SKIP][19] ([i915#3297]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@gem_userptr_blits@dmabuf-unsync.html - shard-tglu: NOTRUN -> [SKIP][20] ([i915#3297]) +1 other test skip [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@gem_userptr_blits@dmabuf-unsync.html * igt@gem_userptr_blits@forbidden-operations: - shard-rkl: NOTRUN -> [SKIP][21] ([i915#3282] / [i915#3297]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@gem_userptr_blits@forbidden-operations.html * igt@gem_workarounds@suspend-resume-context: - shard-glk: [PASS][22] -> [INCOMPLETE][23] ([i915#13356]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk2/igt@gem_workarounds@suspend-resume-context.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk8/igt@gem_workarounds@suspend-resume-context.html * igt@gem_workarounds@suspend-resume-fd: - shard-glk11: NOTRUN -> [INCOMPLETE][24] ([i915#13356] / [i915#14586]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk11/igt@gem_workarounds@suspend-resume-fd.html * igt@gen9_exec_parse@allowed-all: - shard-tglu-1: NOTRUN -> [SKIP][25] ([i915#2527] / [i915#2856]) +1 other test skip [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@gen9_exec_parse@allowed-all.html * igt@gen9_exec_parse@basic-rejected: - shard-rkl: NOTRUN -> [SKIP][26] ([i915#2527]) +2 other tests skip [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@gen9_exec_parse@basic-rejected.html * igt@gen9_exec_parse@batch-zero-length: - shard-tglu: NOTRUN -> [SKIP][27] ([i915#2527] / [i915#2856]) +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@gen9_exec_parse@batch-zero-length.html * igt@gen9_exec_parse@valid-registers: - shard-dg2: NOTRUN -> [SKIP][28] ([i915#2856]) +1 other test skip [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@gen9_exec_parse@valid-registers.html * igt@i915_module_load@fault-injection@intel_connector_register: - shard-glk: NOTRUN -> [ABORT][29] ([i915#15342]) +1 other test abort [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk2/igt@i915_module_load@fault-injection@intel_connector_register.html * igt@i915_pm_freq_api@freq-basic-api: - shard-rkl: NOTRUN -> [SKIP][30] ([i915#8399]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@i915_pm_freq_api@freq-basic-api.html - shard-tglu: NOTRUN -> [SKIP][31] ([i915#8399]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@i915_pm_freq_api@freq-basic-api.html * igt@i915_pm_freq_api@freq-suspend: - shard-tglu-1: NOTRUN -> [SKIP][32] ([i915#8399]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@i915_pm_freq_api@freq-suspend.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-tglu: NOTRUN -> [WARN][33] ([i915#13790] / [i915#2681]) +1 other test warn [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@i915_pm_rc6_residency@rc6-fence.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-tglu: NOTRUN -> [SKIP][34] ([i915#14498]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-idle.html - shard-rkl: NOTRUN -> [SKIP][35] ([i915#14498]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@i915_pm_rc6_residency@rc6-idle.html * igt@i915_pm_rps@basic-api: - shard-dg2: NOTRUN -> [SKIP][36] ([i915#11681] / [i915#6621]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@i915_pm_rps@basic-api.html * igt@i915_query@query-topology-coherent-slice-mask: - shard-dg2: NOTRUN -> [SKIP][37] ([i915#6188]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@i915_query@query-topology-coherent-slice-mask.html * igt@i915_selftest@live: - shard-mtlp: [PASS][38] -> [DMESG-FAIL][39] ([i915#12061] / [i915#15560]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-4/igt@i915_selftest@live.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-2/igt@i915_selftest@live.html * igt@i915_selftest@live@workarounds: - shard-mtlp: [PASS][40] -> [DMESG-FAIL][41] ([i915#12061]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-4/igt@i915_selftest@live@workarounds.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-2/igt@i915_selftest@live@workarounds.html * igt@i915_suspend@basic-s3-without-i915: - shard-tglu: NOTRUN -> [INCOMPLETE][42] ([i915#4817] / [i915#7443]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@i915_suspend@basic-s3-without-i915.html * igt@i915_suspend@forcewake: - shard-glk: NOTRUN -> [INCOMPLETE][43] ([i915#4817]) +1 other test incomplete [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk3/igt@i915_suspend@forcewake.html * igt@intel_hwmon@hwmon-write: - shard-tglu-1: NOTRUN -> [SKIP][44] ([i915#7707]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@intel_hwmon@hwmon-write.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - shard-dg2: NOTRUN -> [SKIP][45] ([i915#4212]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@invalid-smem-bo-on-discrete: - shard-rkl: NOTRUN -> [SKIP][46] ([i915#12454] / [i915#12712]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html * igt@kms_async_flips@async-flip-suspend-resume: - shard-rkl: [PASS][47] -> [INCOMPLETE][48] ([i915#12761]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_async_flips@async-flip-suspend-resume.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_async_flips@async-flip-suspend-resume.html * igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [INCOMPLETE][49] ([i915#12761]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-2.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-tglu-1: NOTRUN -> [SKIP][50] ([i915#1769] / [i915#3555]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-addfb-size-overflow: - shard-rkl: NOTRUN -> [SKIP][51] ([i915#5286]) +3 other tests skip [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_big_fb@4-tiled-addfb-size-overflow.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-tglu: NOTRUN -> [SKIP][52] ([i915#5286]) +3 other tests skip [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-tglu-1: NOTRUN -> [SKIP][53] ([i915#5286]) +1 other test skip [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-mtlp: [PASS][54] -> [FAIL][55] ([i915#15733] / [i915#5138]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_big_fb@linear-32bpp-rotate-270: - shard-rkl: NOTRUN -> [SKIP][56] ([i915#3638]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_big_fb@linear-32bpp-rotate-270.html * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip: - shard-dg2: NOTRUN -> [SKIP][57] ([i915#3828]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_big_fb@y-tiled-64bpp-rotate-180: - shard-dg2: NOTRUN -> [SKIP][58] ([i915#4538] / [i915#5190]) +2 other tests skip [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-addfb: - shard-dg2: NOTRUN -> [SKIP][59] ([i915#5190]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][60] ([i915#6095]) +195 other tests skip [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-19/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2: - shard-glk11: NOTRUN -> [SKIP][61] +144 other tests skip [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk11/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-3: - shard-dg2: NOTRUN -> [SKIP][62] ([i915#10307] / [i915#6095]) +74 other tests skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-3.html * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs: - shard-tglu: NOTRUN -> [SKIP][63] ([i915#12313]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc: - shard-glk: NOTRUN -> [SKIP][64] +165 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk2/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][65] ([i915#6095]) +80 other tests skip [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs: - shard-dg2: NOTRUN -> [SKIP][66] ([i915#12805]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][67] ([i915#6095]) +44 other tests skip [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1.html * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2: - shard-glk: NOTRUN -> [INCOMPLETE][68] ([i915#15582]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk6/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-2.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][69] ([i915#14544] / [i915#6095]) +4 other tests skip [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-2.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][70] ([i915#14098] / [i915#14544] / [i915#6095]) +2 other tests skip [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html * igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1: - shard-tglu-1: NOTRUN -> [SKIP][71] ([i915#6095]) +39 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][72] ([i915#14098] / [i915#6095]) +49 other tests skip [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs: - shard-dg2: NOTRUN -> [SKIP][73] ([i915#12313]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html * igt@kms_cdclk@mode-transition: - shard-rkl: NOTRUN -> [SKIP][74] ([i915#3742]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_cdclk@mode-transition.html - shard-tglu-1: NOTRUN -> [SKIP][75] ([i915#3742]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_cdclk@mode-transition.html * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][76] ([i915#13781]) +3 other tests skip [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-4/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html * igt@kms_chamelium_color@ctm-0-50: - shard-dg2: NOTRUN -> [SKIP][77] +4 other tests skip [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_chamelium_color@ctm-0-50.html * igt@kms_chamelium_edid@hdmi-mode-timings: - shard-dg2: NOTRUN -> [SKIP][78] ([i915#11151] / [i915#7828]) +3 other tests skip [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_chamelium_edid@hdmi-mode-timings.html * igt@kms_chamelium_hpd@dp-hpd-storm-disable: - shard-tglu: NOTRUN -> [SKIP][79] ([i915#11151] / [i915#7828]) +3 other tests skip [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe: - shard-rkl: NOTRUN -> [SKIP][80] ([i915#11151] / [i915#7828]) +4 other tests skip [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html - shard-tglu-1: NOTRUN -> [SKIP][81] ([i915#11151] / [i915#7828]) +3 other tests skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html * igt@kms_color@deep-color: - shard-tglu: NOTRUN -> [SKIP][82] ([i915#3555] / [i915#9979]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_color@deep-color.html * igt@kms_content_protection@atomic: - shard-tglu: NOTRUN -> [SKIP][83] ([i915#15865]) +2 other tests skip [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_content_protection@atomic.html * igt@kms_content_protection@dp-mst-lic-type-0-hdcp14: - shard-dg2: NOTRUN -> [SKIP][84] ([i915#15330]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html * igt@kms_content_protection@dp-mst-type-1: - shard-tglu-1: NOTRUN -> [SKIP][85] ([i915#15330] / [i915#3116] / [i915#3299]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_content_protection@dp-mst-type-1-suspend-resume: - shard-tglu-1: NOTRUN -> [SKIP][86] ([i915#15330]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html * igt@kms_content_protection@suspend-resume: - shard-rkl: NOTRUN -> [SKIP][87] ([i915#15865]) +1 other test skip [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_content_protection@suspend-resume.html * igt@kms_cursor_crc@cursor-random-128x42: - shard-rkl: [PASS][88] -> [FAIL][89] ([i915#13566]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-5/igt@kms_cursor_crc@cursor-random-128x42.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_cursor_crc@cursor-random-128x42.html * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [FAIL][90] ([i915#13566]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-2.html * igt@kms_cursor_crc@cursor-rapid-movement-512x170: - shard-dg2: NOTRUN -> [SKIP][91] ([i915#13049]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html * igt@kms_cursor_crc@cursor-sliding-512x512: - shard-rkl: NOTRUN -> [SKIP][92] ([i915#13049]) [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_cursor_crc@cursor-sliding-512x512.html - shard-tglu: NOTRUN -> [SKIP][93] ([i915#13049]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_cursor_crc@cursor-sliding-512x512.html * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [INCOMPLETE][94] ([i915#12358] / [i915#14152]) +1 other test incomplete [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-rkl: NOTRUN -> [SKIP][95] ([i915#4103]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions: - shard-dg2: NOTRUN -> [SKIP][96] ([i915#13046] / [i915#5354]) +1 other test skip [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-glk10: NOTRUN -> [FAIL][97] ([i915#15768]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-dg2: NOTRUN -> [SKIP][98] ([i915#9833]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html - shard-tglu: NOTRUN -> [SKIP][99] ([i915#9723]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_dp_link_training@non-uhbr-mst: - shard-tglu: NOTRUN -> [SKIP][100] ([i915#13749]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_dp_link_training@non-uhbr-mst.html * igt@kms_dp_link_training@uhbr-mst: - shard-dg2: NOTRUN -> [SKIP][101] ([i915#13748]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_dp_link_training@uhbr-mst.html * igt@kms_dp_linktrain_fallback@dsc-fallback: - shard-tglu: NOTRUN -> [SKIP][102] ([i915#13707]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-rkl: [PASS][103] -> [INCOMPLETE][104] ([i915#9878]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_fbcon_fbt@fbc-suspend.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_fbcon_fbt@psr-suspend: - shard-tglu: NOTRUN -> [SKIP][105] ([i915#3469]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@chamelium: - shard-tglu-1: NOTRUN -> [SKIP][106] ([i915#2065]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_feature_discovery@chamelium.html * igt@kms_feature_discovery@psr1: - shard-rkl: NOTRUN -> [SKIP][107] ([i915#658]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_feature_discovery@psr1.html * igt@kms_feature_discovery@psr2: - shard-dg2: NOTRUN -> [SKIP][108] ([i915#658]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_feature_discovery@psr2.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2: - shard-glk: [PASS][109] -> [FAIL][110] ([i915#13027]) +1 other test fail [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1: - shard-snb: [PASS][111] -> [FAIL][112] ([i915#13027]) +1 other test fail [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-snb7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-snb4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1.html * igt@kms_flip@2x-flip-vs-panning: - shard-dg2: NOTRUN -> [SKIP][113] ([i915#9934]) +2 other tests skip [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_flip@2x-flip-vs-panning.html * igt@kms_flip@2x-flip-vs-suspend: - shard-glk: NOTRUN -> [INCOMPLETE][114] ([i915#12745] / [i915#4839]) [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk9/igt@kms_flip@2x-flip-vs-suspend.html * igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2: - shard-glk: NOTRUN -> [INCOMPLETE][115] ([i915#12745]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk9/igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible: - shard-rkl: NOTRUN -> [SKIP][116] ([i915#9934]) +4 other tests skip [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible: - shard-tglu-1: NOTRUN -> [SKIP][117] ([i915#3637] / [i915#9934]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html * igt@kms_flip@2x-plain-flip: - shard-tglu: NOTRUN -> [SKIP][118] ([i915#3637] / [i915#9934]) +6 other tests skip [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-dg1: [PASS][119] -> [FAIL][120] ([i915#13027]) +1 other test fail [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-18/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-18/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@d-edp1: - shard-mtlp: [PASS][121] -> [FAIL][122] ([i915#13027]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-edp1.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-edp1.html * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a3: - shard-dg2: NOTRUN -> [FAIL][123] ([i915#13027]) +1 other test fail [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a3.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling: - shard-rkl: NOTRUN -> [SKIP][124] ([i915#15643]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html - shard-tglu-1: NOTRUN -> [SKIP][125] ([i915#15643]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling: - shard-dg2: NOTRUN -> [SKIP][126] ([i915#15643]) [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling: - shard-tglu: NOTRUN -> [SKIP][127] ([i915#15643]) +1 other test skip [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][128] ([i915#15104] / [i915#15990]) [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt: - shard-dg2: NOTRUN -> [SKIP][129] ([i915#15991] / [i915#5354]) +8 other tests skip [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][130] ([i915#15990] / [i915#8708]) +10 other tests skip [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-tiling-4: - shard-tglu: NOTRUN -> [SKIP][131] ([i915#5439]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_frontbuffer_tracking@fbc-tiling-4.html * igt@kms_frontbuffer_tracking@fbchdr-1p-indfb-fliptrack-mmap-gtt: - shard-tglu-1: NOTRUN -> [SKIP][132] ([i915#15989]) +11 other tests skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbchdr-1p-indfb-fliptrack-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt: - shard-rkl: NOTRUN -> [SKIP][133] ([i915#15989]) +6 other tests skip [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-render: - shard-dg2: NOTRUN -> [SKIP][134] ([i915#15989]) +2 other tests skip [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-indfb-plflip-blt: - shard-tglu: NOTRUN -> [SKIP][135] ([i915#15989]) +14 other tests skip [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-onoff: - shard-rkl: [PASS][136] -> [SKIP][137] ([i915#15989]) +20 other tests skip [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-onoff.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-pgflip-blt: - shard-rkl: NOTRUN -> [SKIP][138] +44 other tests skip [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][139] ([i915#15990]) +11 other tests skip [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-shrfb-pgflip-blt: - shard-tglu-1: NOTRUN -> [SKIP][140] +48 other tests skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt: - shard-rkl: NOTRUN -> [SKIP][141] ([i915#15102] / [i915#3023]) +10 other tests skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move: - shard-tglu-1: NOTRUN -> [SKIP][142] ([i915#15102]) +23 other tests skip [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt: - shard-rkl: NOTRUN -> [SKIP][143] ([i915#15102]) +19 other tests skip [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-spr-indfb-draw-blt: - shard-tglu: NOTRUN -> [SKIP][144] +69 other tests skip [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-move: - shard-dg2: [PASS][145] -> [SKIP][146] ([i915#15989]) +2 other tests skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg2-10/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-move.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-4/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-move.html * igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc: - shard-glk: [PASS][147] -> [SKIP][148] +7 other tests skip [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk8/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk5/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@hdr-suspend: - shard-glk10: NOTRUN -> [INCOMPLETE][149] ([i915#16056]) [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk10/igt@kms_frontbuffer_tracking@hdr-suspend.html * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render: - shard-tglu: NOTRUN -> [SKIP][150] ([i915#15102]) +30 other tests skip [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-gtt: - shard-rkl: NOTRUN -> [SKIP][151] ([i915#1825]) +2 other tests skip [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psrhdr-2p-pri-indfb-multidraw: - shard-dg2: NOTRUN -> [SKIP][152] ([i915#15991]) +14 other tests skip [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_frontbuffer_tracking@psrhdr-2p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-spr-indfb-draw-mmap-cpu: - shard-glk10: NOTRUN -> [SKIP][153] +49 other tests skip [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk10/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-spr-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@psrhdr-slowdraw: - shard-dg2: NOTRUN -> [SKIP][154] ([i915#15102]) +15 other tests skip [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_frontbuffer_tracking@psrhdr-slowdraw.html * igt@kms_hdr@bpc-switch-dpms: - shard-rkl: [PASS][155] -> [SKIP][156] ([i915#16012] / [i915#3555] / [i915#8228]) [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-1/igt@kms_hdr@bpc-switch-dpms.html [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_hdr@bpc-switch-dpms.html - shard-tglu: NOTRUN -> [SKIP][157] ([i915#16012] / [i915#3555] / [i915#8228]) [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_hdr@bpc-switch-dpms@pipe-a-hdmi-a-1-xrgb2101010: - shard-tglu: NOTRUN -> [SKIP][158] ([i915#16012]) +1 other test skip [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_hdr@bpc-switch-dpms@pipe-a-hdmi-a-1-xrgb2101010.html * igt@kms_hdr@bpc-switch-dpms@pipe-a-hdmi-a-2-xrgb2101010: - shard-rkl: [PASS][159] -> [SKIP][160] ([i915#16012]) +1 other test skip [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-1/igt@kms_hdr@bpc-switch-dpms@pipe-a-hdmi-a-2-xrgb2101010.html [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_hdr@bpc-switch-dpms@pipe-a-hdmi-a-2-xrgb2101010.html * igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f: - shard-dg1: NOTRUN -> [SKIP][161] ([i915#16012]) +3 other tests skip [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-12/igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html * igt@kms_hdr@bpc-switch@pipe-a-hdmi-a-1-xrgb2101010: - shard-rkl: NOTRUN -> [SKIP][162] ([i915#16012]) +1 other test skip [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-8/igt@kms_hdr@bpc-switch@pipe-a-hdmi-a-1-xrgb2101010.html * igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb16161616f: - shard-dg2: NOTRUN -> [SKIP][163] ([i915#16012]) +1 other test skip [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-3/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html * igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-2-xrgb2101010: - shard-rkl: NOTRUN -> [SKIP][164] ([i915#16011]) +3 other tests skip [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-2-xrgb2101010.html * igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f: - shard-dg2: NOTRUN -> [SKIP][165] ([i915#16011]) +1 other test skip [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html * igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-2-xrgb16161616f: - shard-rkl: NOTRUN -> [ABORT][166] ([i915#15132]) [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-1/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-2-xrgb16161616f.html * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010: - shard-dg1: NOTRUN -> [SKIP][167] ([i915#16011]) +7 other tests skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-12/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010.html * igt@kms_joiner@basic-max-non-joiner: - shard-rkl: NOTRUN -> [SKIP][168] ([i915#13688]) [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_joiner@basic-max-non-joiner.html - shard-tglu-1: NOTRUN -> [SKIP][169] ([i915#13688]) [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_joiner@basic-max-non-joiner.html * igt@kms_joiner@invalid-modeset-force-ultra-joiner: - shard-rkl: NOTRUN -> [SKIP][170] ([i915#15458]) [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1: - shard-glk11: NOTRUN -> [INCOMPLETE][171] ([i915#12756] / [i915#13409] / [i915#13476]) +1 other test incomplete [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping: - shard-tglu-1: NOTRUN -> [SKIP][172] ([i915#15709]) +1 other test skip [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping.html * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping: - shard-rkl: NOTRUN -> [SKIP][173] ([i915#15709]) +2 other tests skip [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping: - shard-tglu: NOTRUN -> [SKIP][174] ([i915#15709]) +1 other test skip [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-5/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping: - shard-dg2: NOTRUN -> [SKIP][175] ([i915#15709]) +1 other test skip [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-b-plane-7: - shard-tglu-1: NOTRUN -> [SKIP][176] ([i915#15608]) +1 other test skip [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-b-plane-7.html * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-a-plane-7: - shard-tglu: NOTRUN -> [SKIP][177] ([i915#15608]) +1 other test skip [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-a-plane-7.html * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-b-plane-5: - shard-rkl: NOTRUN -> [SKIP][178] ([i915#15608]) +1 other test skip [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-b-plane-5.html * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a: - shard-glk: [PASS][179] -> [INCOMPLETE][180] ([i915#13026]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk9/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk8/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html * igt@kms_plane_alpha_blend@alpha-transparent-fb: - shard-glk10: NOTRUN -> [FAIL][181] ([i915#10647] / [i915#12177]) [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb.html * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1: - shard-glk10: NOTRUN -> [FAIL][182] ([i915#10647]) +1 other test fail [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html * igt@kms_plane_cursor@viewport@pipe-a-hdmi-a-1-size-128: - shard-rkl: NOTRUN -> [FAIL][183] ([i915#15913]) +1 other test fail [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-8/igt@kms_plane_cursor@viewport@pipe-a-hdmi-a-1-size-128.html * igt@kms_plane_cursor@viewport@pipe-a-hdmi-a-1-size-64: - shard-rkl: NOTRUN -> [FAIL][184] ([i915#15912]) [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-8/igt@kms_plane_cursor@viewport@pipe-a-hdmi-a-1-size-64.html * igt@kms_plane_multiple@2x-tiling-none: - shard-dg2: NOTRUN -> [SKIP][185] ([i915#13958]) [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_plane_multiple@2x-tiling-none.html * igt@kms_plane_multiple@tiling-yf: - shard-rkl: NOTRUN -> [SKIP][186] ([i915#14259]) [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html - shard-tglu: NOTRUN -> [SKIP][187] ([i915#14259]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_plane_multiple@tiling-yf.html * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d: - shard-tglu-1: NOTRUN -> [SKIP][188] ([i915#15329]) +4 other tests skip [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html * igt@kms_pm_backlight@basic-brightness: - shard-dg2: NOTRUN -> [SKIP][189] ([i915#12343] / [i915#5354]) [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_pm_backlight@basic-brightness.html * igt@kms_pm_dc@dc9-dpms: - shard-rkl: NOTRUN -> [SKIP][190] ([i915#15739]) [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_pm_dc@dc9-dpms.html * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp: - shard-rkl: [PASS][191] -> [SKIP][192] ([i915#15073]) [191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-3/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-dg1: [PASS][193] -> [SKIP][194] ([i915#15073]) +3 other tests skip [193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-13/igt@kms_pm_rpm@modeset-non-lpsp-stress.html [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-15/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_prime@basic-crc-hybrid: - shard-rkl: NOTRUN -> [SKIP][195] ([i915#6524]) [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_prime@basic-crc-hybrid.html - shard-tglu-1: NOTRUN -> [SKIP][196] ([i915#6524]) [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_prime@basic-crc-hybrid.html * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area: - shard-glk: NOTRUN -> [SKIP][197] ([i915#11520]) +3 other tests skip [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk3/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf: - shard-rkl: NOTRUN -> [SKIP][198] ([i915#11520]) +3 other tests skip [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html - shard-tglu-1: NOTRUN -> [SKIP][199] ([i915#11520]) +3 other tests skip [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@pr-cursor-plane-update-sf: - shard-tglu: NOTRUN -> [SKIP][200] ([i915#11520]) +3 other tests skip [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf: - shard-glk10: NOTRUN -> [SKIP][201] ([i915#11520]) [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf: - shard-dg2: NOTRUN -> [SKIP][202] ([i915#11520]) +3 other tests skip [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area: - shard-glk11: NOTRUN -> [SKIP][203] ([i915#11520]) +3 other tests skip [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk11/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html * igt@kms_psr2_su@page_flip-nv12: - shard-rkl: NOTRUN -> [SKIP][204] ([i915#9683]) +1 other test skip [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_psr2_su@page_flip-nv12.html - shard-tglu-1: NOTRUN -> [SKIP][205] ([i915#9683]) [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_psr2_su@page_flip-p010: - shard-tglu: NOTRUN -> [SKIP][206] ([i915#9683]) [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr@fbc-psr-basic: - shard-rkl: NOTRUN -> [SKIP][207] ([i915#1072] / [i915#9732]) +6 other tests skip [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_psr@fbc-psr-basic.html * igt@kms_psr@fbc-psr-cursor-plane-onoff: - shard-tglu: NOTRUN -> [SKIP][208] ([i915#9732]) +13 other tests skip [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_psr@fbc-psr-cursor-plane-onoff.html * igt@kms_psr@psr2-primary-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][209] ([i915#1072] / [i915#9732]) +7 other tests skip [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_psr@psr2-primary-mmap-gtt.html * igt@kms_psr@psr2-sprite-mmap-gtt: - shard-tglu-1: NOTRUN -> [SKIP][210] ([i915#9732]) +8 other tests skip [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_psr@psr2-sprite-mmap-gtt.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-dg2: NOTRUN -> [SKIP][211] ([i915#15949]) [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_rotation_crc@multiplane-rotation: - shard-glk11: NOTRUN -> [INCOMPLETE][212] ([i915#15492]) [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk11/igt@kms_rotation_crc@multiplane-rotation.html * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180: - shard-tglu: NOTRUN -> [SKIP][213] ([i915#5289]) [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-rotation-90: - shard-dg2: NOTRUN -> [SKIP][214] ([i915#12755] / [i915#15867]) [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_rotation_crc@primary-rotation-90.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-rkl: NOTRUN -> [SKIP][215] ([i915#5289]) +1 other test skip [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_setmode@basic: - shard-mtlp: [PASS][216] -> [FAIL][217] ([i915#15106]) +1 other test fail [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-6/igt@kms_setmode@basic.html [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-8/igt@kms_setmode@basic.html * igt@kms_setmode@clone-exclusive-crtc: - shard-rkl: NOTRUN -> [SKIP][218] ([i915#3555]) +1 other test skip [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_setmode@clone-exclusive-crtc.html - shard-tglu-1: NOTRUN -> [SKIP][219] ([i915#3555]) +4 other tests skip [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-rkl: NOTRUN -> [SKIP][220] ([i915#8623]) [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html - shard-tglu: NOTRUN -> [SKIP][221] ([i915#8623]) [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@kms_vblank@ts-continuation-dpms-suspend: - shard-rkl: [PASS][222] -> [INCOMPLETE][223] ([i915#12276]) +1 other test incomplete [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_vblank@ts-continuation-dpms-suspend.html [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_vblank@ts-continuation-dpms-suspend.html * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-2: - shard-glk: NOTRUN -> [INCOMPLETE][224] ([i915#12276]) [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk5/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-2.html * igt@kms_vrr@flip-suspend: - shard-dg2: NOTRUN -> [SKIP][225] ([i915#15243] / [i915#3555]) [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-6/igt@kms_vrr@flip-suspend.html * igt@kms_vrr@lobf: - shard-rkl: NOTRUN -> [SKIP][226] ([i915#11920]) [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_vrr@lobf.html - shard-tglu-1: NOTRUN -> [SKIP][227] ([i915#11920]) [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@kms_vrr@lobf.html * igt@kms_vrr@seamless-rr-switch-vrr: - shard-tglu: NOTRUN -> [SKIP][228] ([i915#9906]) [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@kms_vrr@seamless-rr-switch-vrr.html * igt@perf@gen12-group-concurrent-oa-buffer-read: - shard-mtlp: [PASS][229] -> [FAIL][230] ([i915#10538]) [229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-5/igt@perf@gen12-group-concurrent-oa-buffer-read.html [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-4/igt@perf@gen12-group-concurrent-oa-buffer-read.html * igt@perf@global-sseu-config-invalid: - shard-dg2: NOTRUN -> [SKIP][231] ([i915#7387]) [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@perf@global-sseu-config-invalid.html * igt@perf_pmu@busy-double-start@rcs0: - shard-mtlp: [PASS][232] -> [FAIL][233] ([i915#4349]) [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-3/igt@perf_pmu@busy-double-start@rcs0.html [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-6/igt@perf_pmu@busy-double-start@rcs0.html * igt@perf_pmu@rc6-all-gts: - shard-rkl: NOTRUN -> [SKIP][234] ([i915#8516]) [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@perf_pmu@rc6-all-gts.html - shard-tglu: NOTRUN -> [SKIP][235] ([i915#8516]) [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@perf_pmu@rc6-all-gts.html * igt@perf_pmu@rc6-suspend: - shard-dg1: [PASS][236] -> [DMESG-WARN][237] ([i915#4391] / [i915#4423]) +1 other test dmesg-warn [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-16/igt@perf_pmu@rc6-suspend.html [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-16/igt@perf_pmu@rc6-suspend.html * igt@prime_vgem@basic-read: - shard-rkl: NOTRUN -> [SKIP][238] ([i915#3291] / [i915#3708]) [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@prime_vgem@basic-read.html * igt@sriov_basic@enable-vfs-bind-unbind-each: - shard-rkl: NOTRUN -> [SKIP][239] ([i915#9917]) [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@sriov_basic@enable-vfs-bind-unbind-each.html * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all: - shard-tglu: NOTRUN -> [SKIP][240] ([i915#16066]) [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-6/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html * igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-2: - shard-tglu-1: NOTRUN -> [SKIP][241] ([i915#16066]) +8 other tests skip [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-1/igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-2.html #### Possible fixes #### * igt@gem_exec_big@single: - shard-mtlp: [FAIL][242] ([i915#15871]) -> [PASS][243] [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-7/igt@gem_exec_big@single.html [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-3/igt@gem_exec_big@single.html * igt@gem_softpin@noreloc-s3: - shard-rkl: [ABORT][244] ([i915#15131]) -> [PASS][245] [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-1/igt@gem_softpin@noreloc-s3.html [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_softpin@noreloc-s3.html * igt@gem_workarounds@suspend-resume-context: - shard-rkl: [INCOMPLETE][246] ([i915#13356]) -> [PASS][247] [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_workarounds@suspend-resume-context.html [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@gem_workarounds@suspend-resume-context.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-rkl: [ABORT][248] ([i915#15140]) -> [PASS][249] [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-1/igt@i915_suspend@fence-restore-tiled2untiled.html [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc: - shard-dg2: [ABORT][250] ([i915#15132]) -> [PASS][251] +1 other test pass [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg2-10/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-10/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1: - shard-glk: [INCOMPLETE][252] ([i915#15582]) -> [PASS][253] [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk6/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-mtlp: [FAIL][254] ([i915#13027]) -> [PASS][255] [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-mtlp-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-mtlp-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt: - shard-glk: [DMESG-WARN][256] ([i915#118]) -> [PASS][257] [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbchdr-tiling-linear: - shard-rkl: [SKIP][258] ([i915#15989]) -> [PASS][259] +15 other tests pass [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_frontbuffer_tracking@fbchdr-tiling-linear.html [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-tiling-linear.html * igt@kms_frontbuffer_tracking@hdr-rgb565-draw-pwrite: - shard-glk: [SKIP][260] -> [PASS][261] +13 other tests pass [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk2/igt@kms_frontbuffer_tracking@hdr-rgb565-draw-pwrite.html [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk8/igt@kms_frontbuffer_tracking@hdr-rgb565-draw-pwrite.html * igt@kms_hdr@static-toggle: - shard-rkl: [SKIP][262] ([i915#16011] / [i915#3555] / [i915#8228]) -> [PASS][263] [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_hdr@static-toggle.html [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_hdr@static-toggle.html * igt@kms_pm_rpm@i2c: - shard-dg1: [DMESG-WARN][264] ([i915#4423]) -> [PASS][265] [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-16/igt@kms_pm_rpm@i2c.html [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-16/igt@kms_pm_rpm@i2c.html * igt@kms_pm_rpm@modeset-non-lpsp: - shard-dg1: [SKIP][266] ([i915#15073]) -> [PASS][267] [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-15/igt@kms_pm_rpm@modeset-non-lpsp.html [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-13/igt@kms_pm_rpm@modeset-non-lpsp.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-rkl: [SKIP][268] ([i915#15073]) -> [PASS][269] +1 other test pass [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress.html [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1: - shard-glk: [INCOMPLETE][270] ([i915#12276]) -> [PASS][271] [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-glk8/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1.html [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-glk5/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1.html #### Warnings #### * igt@device_reset@unbind-cold-reset-rebind: - shard-rkl: [SKIP][272] ([i915#11078]) -> [SKIP][273] ([i915#11078] / [i915#14544]) [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@device_reset@unbind-cold-reset-rebind.html [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@device_reset@unbind-cold-reset-rebind.html * igt@gem_ccs@block-multicopy-inplace: - shard-rkl: [SKIP][274] ([i915#14544] / [i915#3555] / [i915#9323]) -> [SKIP][275] ([i915#3555] / [i915#9323]) [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_ccs@block-multicopy-inplace.html [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@gem_ccs@block-multicopy-inplace.html * igt@gem_create@create-ext-cpu-access-sanity-check: - shard-rkl: [SKIP][276] ([i915#14544] / [i915#6335]) -> [SKIP][277] ([i915#6335]) [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_create@create-ext-cpu-access-sanity-check.html [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_create@create-ext-cpu-access-sanity-check.html * igt@gem_ctx_sseu@invalid-args: - shard-rkl: [SKIP][278] ([i915#280]) -> [SKIP][279] ([i915#14544] / [i915#280]) [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@gem_ctx_sseu@invalid-args.html [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_ctx_sseu@invalid-args.html * igt@gem_exec_balancer@parallel-ordering: - shard-rkl: [SKIP][280] ([i915#14544] / [i915#4525]) -> [SKIP][281] ([i915#4525]) [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_exec_balancer@parallel-ordering.html [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_exec_balancer@parallel-out-fence: - shard-rkl: [SKIP][282] ([i915#4525]) -> [SKIP][283] ([i915#14544] / [i915#4525]) [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@gem_exec_balancer@parallel-out-fence.html [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_exec_balancer@parallel-out-fence.html * igt@gem_exec_reloc@basic-gtt-cpu: - shard-rkl: [SKIP][284] ([i915#3281]) -> [SKIP][285] ([i915#14544] / [i915#3281]) +4 other tests skip [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-cpu.html [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-cpu.html * igt@gem_exec_reloc@basic-gtt-read: - shard-rkl: [SKIP][286] ([i915#14544] / [i915#3281]) -> [SKIP][287] ([i915#3281]) +6 other tests skip [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-read.html [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_exec_reloc@basic-gtt-read.html * igt@gem_exec_schedule@semaphore-power: - shard-rkl: [SKIP][288] ([i915#14544] / [i915#7276]) -> [SKIP][289] ([i915#7276]) [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_exec_schedule@semaphore-power.html [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@gem_exec_schedule@semaphore-power.html * igt@gem_lmem_evict@dontneed-evict-race: - shard-rkl: [SKIP][290] ([i915#4613] / [i915#7582]) -> [SKIP][291] ([i915#14544] / [i915#4613] / [i915#7582]) [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@gem_lmem_evict@dontneed-evict-race.html [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_lmem_evict@dontneed-evict-race.html * igt@gem_lmem_swapping@random: - shard-rkl: [SKIP][292] ([i915#14544] / [i915#4613]) -> [SKIP][293] ([i915#4613]) [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_lmem_swapping@random.html [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_lmem_swapping@random.html * igt@gem_lmem_swapping@verify-ccs: - shard-rkl: [SKIP][294] ([i915#4613]) -> [SKIP][295] ([i915#14544] / [i915#4613]) +1 other test skip [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@gem_lmem_swapping@verify-ccs.html [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_lmem_swapping@verify-ccs.html * igt@gem_media_vme: - shard-rkl: [SKIP][296] ([i915#14544] / [i915#284]) -> [SKIP][297] ([i915#284]) [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_media_vme.html [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@gem_media_vme.html * igt@gem_partial_pwrite_pread@write-snoop: - shard-rkl: [SKIP][298] ([i915#3282]) -> [SKIP][299] ([i915#14544] / [i915#3282]) +2 other tests skip [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@gem_partial_pwrite_pread@write-snoop.html [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_partial_pwrite_pread@write-snoop.html * igt@gem_partial_pwrite_pread@writes-after-reads-uncached: - shard-rkl: [SKIP][300] ([i915#14544] / [i915#3282]) -> [SKIP][301] ([i915#3282]) +4 other tests skip [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html * igt@gem_set_tiling_vs_blt@tiled-to-untiled: - shard-rkl: [SKIP][302] ([i915#14544] / [i915#8411]) -> [SKIP][303] ([i915#8411]) +1 other test skip [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html * igt@gem_set_tiling_vs_blt@untiled-to-tiled: - shard-rkl: [SKIP][304] ([i915#8411]) -> [SKIP][305] ([i915#14544] / [i915#8411]) +1 other test skip [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html * igt@gem_tiled_pread_basic@basic: - shard-rkl: [SKIP][306] ([i915#15656]) -> [SKIP][307] ([i915#14544] / [i915#15656]) [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@gem_tiled_pread_basic@basic.html [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_tiled_pread_basic@basic.html * igt@gem_userptr_blits@coherency-sync: - shard-rkl: [SKIP][308] ([i915#14544] / [i915#3297]) -> [SKIP][309] ([i915#3297]) +1 other test skip [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gem_userptr_blits@coherency-sync.html [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@gem_userptr_blits@coherency-sync.html * igt@gem_userptr_blits@invalid-mmap-offset-unsync: - shard-rkl: [SKIP][310] ([i915#3297]) -> [SKIP][311] ([i915#14544] / [i915#3297]) [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html * igt@gen9_exec_parse@bb-start-out: - shard-rkl: [SKIP][312] ([i915#2527]) -> [SKIP][313] ([i915#14544] / [i915#2527]) [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@gen9_exec_parse@bb-start-out.html [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@gen9_exec_parse@bb-start-out.html * igt@gen9_exec_parse@bb-start-param: - shard-rkl: [SKIP][314] ([i915#14544] / [i915#2527]) -> [SKIP][315] ([i915#2527]) +1 other test skip [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@gen9_exec_parse@bb-start-param.html [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@gen9_exec_parse@bb-start-param.html * igt@i915_pm_freq_api@freq-reset-multiple: - shard-rkl: [SKIP][316] ([i915#14544] / [i915#8399]) -> [SKIP][317] ([i915#8399]) [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@i915_pm_freq_api@freq-reset-multiple.html [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@i915_pm_freq_api@freq-reset-multiple.html * igt@i915_query@hwconfig_table: - shard-rkl: [SKIP][318] ([i915#14544] / [i915#6245]) -> [SKIP][319] ([i915#6245]) [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@i915_query@hwconfig_table.html [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@i915_query@hwconfig_table.html * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling: - shard-dg1: [SKIP][320] ([i915#4212]) -> [SKIP][321] ([i915#4212] / [i915#4423]) [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-17/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-17/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html * igt@kms_big_fb@4-tiled-16bpp-rotate-90: - shard-rkl: [SKIP][322] ([i915#5286]) -> [SKIP][323] ([i915#14544] / [i915#5286]) [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-rkl: [SKIP][324] ([i915#14544] / [i915#5286]) -> [SKIP][325] ([i915#5286]) +2 other tests skip [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@linear-8bpp-rotate-90: - shard-dg1: [SKIP][326] ([i915#3638] / [i915#4423]) -> [SKIP][327] ([i915#3638]) [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-16/igt@kms_big_fb@linear-8bpp-rotate-90.html [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-17/igt@kms_big_fb@linear-8bpp-rotate-90.html * igt@kms_big_fb@x-tiled-32bpp-rotate-270: - shard-rkl: [SKIP][328] ([i915#14544] / [i915#3638]) -> [SKIP][329] ([i915#3638]) +1 other test skip [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html * igt@kms_big_fb@x-tiled-32bpp-rotate-90: - shard-rkl: [SKIP][330] ([i915#3638]) -> [SKIP][331] ([i915#14544] / [i915#3638]) [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-2: - shard-rkl: [SKIP][332] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][333] ([i915#14098] / [i915#6095]) +11 other tests skip [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-2.html [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-2.html * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2: - shard-rkl: [SKIP][334] ([i915#6095]) -> [SKIP][335] ([i915#14544] / [i915#6095]) +7 other tests skip [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2.html [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2.html * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2: - shard-rkl: [SKIP][336] ([i915#14098] / [i915#6095]) -> [SKIP][337] ([i915#14098] / [i915#14544] / [i915#6095]) +10 other tests skip [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs: - shard-rkl: [SKIP][338] ([i915#12313]) -> [SKIP][339] ([i915#12313] / [i915#14544]) +2 other tests skip [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html * igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2: - shard-rkl: [SKIP][340] ([i915#14544] / [i915#6095]) -> [SKIP][341] ([i915#6095]) +11 other tests skip [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2.html [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2.html * igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs: - shard-rkl: [ABORT][342] -> [SKIP][343] ([i915#14098] / [i915#6095]) +1 other test skip [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-8/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html * igt@kms_chamelium_frames@dp-crc-fast: - shard-rkl: [SKIP][344] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][345] ([i915#11151] / [i915#7828]) +3 other tests skip [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_chamelium_frames@dp-crc-fast.html [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_chamelium_frames@dp-crc-fast.html * igt@kms_chamelium_hpd@vga-hpd-after-suspend: - shard-rkl: [SKIP][346] ([i915#11151] / [i915#7828]) -> [SKIP][347] ([i915#11151] / [i915#14544] / [i915#7828]) +3 other tests skip [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html * igt@kms_content_protection@dp-mst-type-0-hdcp14: - shard-rkl: [SKIP][348] ([i915#15330]) -> [SKIP][349] ([i915#14544] / [i915#15330]) [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0-hdcp14.html * igt@kms_content_protection@legacy: - shard-rkl: [SKIP][350] ([i915#14544] / [i915#15865]) -> [SKIP][351] ([i915#15865]) [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_content_protection@legacy.html [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_content_protection@legacy.html * igt@kms_content_protection@mei-interface: - shard-dg1: [SKIP][352] ([i915#15865]) -> [SKIP][353] ([i915#9433]) [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-19/igt@kms_content_protection@mei-interface.html [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-12/igt@kms_content_protection@mei-interface.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-rkl: [SKIP][354] ([i915#13049]) -> [SKIP][355] ([i915#13049] / [i915#14544]) +2 other tests skip [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_cursor_crc@cursor-random-512x170.html [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_crc@cursor-rapid-movement-32x10: - shard-rkl: [SKIP][356] ([i915#14544] / [i915#3555]) -> [SKIP][357] ([i915#3555]) +4 other tests skip [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc: - shard-rkl: [SKIP][358] ([i915#14544] / [i915#3555] / [i915#3804]) -> [SKIP][359] ([i915#3555] / [i915#3804]) [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2: - shard-rkl: [SKIP][360] ([i915#14544] / [i915#3804]) -> [SKIP][361] ([i915#3804]) [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html * igt@kms_dp_link_training@uhbr-sst: - shard-rkl: [SKIP][362] ([i915#13748]) -> [SKIP][363] ([i915#13748] / [i915#14544]) [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_dp_link_training@uhbr-sst.html [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_dp_link_training@uhbr-sst.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-rkl: [SKIP][364] ([i915#13707] / [i915#14544]) -> [SKIP][365] ([i915#13707]) [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_dp_linktrain_fallback@dp-fallback.html [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_dp_linktrain_fallback@dsc-fallback: - shard-rkl: [SKIP][366] ([i915#13707]) -> [SKIP][367] ([i915#13707] / [i915#14544]) [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_dp_linktrain_fallback@dsc-fallback.html [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html * igt@kms_dsc@dsc-basic: - shard-rkl: [SKIP][368] ([i915#14544] / [i915#3555] / [i915#3840]) -> [SKIP][369] ([i915#3555] / [i915#3840]) [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_dsc@dsc-basic.html [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_dsc@dsc-basic.html * igt@kms_dsc@dsc-with-output-formats: - shard-rkl: [SKIP][370] ([i915#3555] / [i915#3840]) -> [SKIP][371] ([i915#14544] / [i915#3555] / [i915#3840]) [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_dsc@dsc-with-output-formats.html [371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats.html * igt@kms_fbcon_fbt@psr-suspend: - shard-rkl: [SKIP][372] ([i915#3955]) -> [SKIP][373] ([i915#14544] / [i915#3955]) [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_fbcon_fbt@psr-suspend.html [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@display-2x: - shard-rkl: [SKIP][374] ([i915#14544] / [i915#16081]) -> [SKIP][375] ([i915#16081]) [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_feature_discovery@display-2x.html [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_feature_discovery@display-2x.html * igt@kms_feature_discovery@dp-mst: - shard-rkl: [SKIP][376] ([i915#9337]) -> [SKIP][377] ([i915#14544] / [i915#9337]) [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_feature_discovery@dp-mst.html [377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_feature_discovery@dp-mst.html * igt@kms_flip@2x-plain-flip: - shard-rkl: [SKIP][378] ([i915#9934]) -> [SKIP][379] ([i915#14544] / [i915#9934]) +3 other tests skip [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_flip@2x-plain-flip.html [379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@2x-plain-flip-ts-check: - shard-rkl: [SKIP][380] ([i915#14544] / [i915#9934]) -> [SKIP][381] ([i915#9934]) +4 other tests skip [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_flip@2x-plain-flip-ts-check.html [381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_flip@2x-plain-flip-ts-check.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling: - shard-rkl: [SKIP][382] ([i915#15643]) -> [SKIP][383] ([i915#14544] / [i915#15643]) +1 other test skip [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html [383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling: - shard-rkl: [SKIP][384] ([i915#14544] / [i915#15643]) -> [SKIP][385] ([i915#15643]) [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html [385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt: - shard-rkl: [SKIP][386] ([i915#14544] / [i915#1825]) -> [SKIP][387] ([i915#1825]) +5 other tests skip [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html [387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt: - shard-rkl: [SKIP][388] ([i915#1825]) -> [SKIP][389] ([i915#14544] / [i915#1825]) +3 other tests skip [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt.html [389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt: - shard-rkl: [SKIP][390] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][391] ([i915#15102] / [i915#3023]) +6 other tests skip [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html [391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render: - shard-dg2: [SKIP][392] ([i915#10433] / [i915#15102]) -> [SKIP][393] ([i915#15102]) [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html [393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-suspend: - shard-dg2: [SKIP][394] ([i915#15102]) -> [SKIP][395] ([i915#10433] / [i915#15102]) [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html [395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-pri-indfb-multidraw: - shard-rkl: [SKIP][396] ([i915#15102]) -> [SKIP][397] ([i915#14544] / [i915#15102]) +8 other tests skip [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-pri-indfb-multidraw.html [397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-render: - shard-rkl: [SKIP][398] ([i915#14544]) -> [SKIP][399] +50 other tests skip [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-render.html [399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb101010-draw-mmap-cpu: - shard-rkl: [SKIP][400] ([i915#14544] / [i915#15102]) -> [SKIP][401] ([i915#15102]) +14 other tests skip [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb101010-draw-mmap-cpu.html [401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb101010-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@hdr-suspend: - shard-rkl: [SKIP][402] ([i915#15989]) -> [ABORT][403] ([i915#15132]) [402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_frontbuffer_tracking@hdr-suspend.html [403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-1/igt@kms_frontbuffer_tracking@hdr-suspend.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite: - shard-rkl: [SKIP][404] ([i915#15102] / [i915#3023]) -> [SKIP][405] ([i915#14544] / [i915#15102] / [i915#3023]) +6 other tests skip [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html [405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt: - shard-rkl: [SKIP][406] -> [SKIP][407] ([i915#14544]) +43 other tests skip [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html [407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html * igt@kms_hdr@invalid-hdr: - shard-rkl: [SKIP][408] ([i915#16012] / [i915#3555] / [i915#8228]) -> [SKIP][409] ([i915#14544] / [i915#3555] / [i915#8228]) [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_hdr@invalid-hdr.html [409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_hdr@invalid-hdr.html * igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-2-xrgb2101010: - shard-rkl: [SKIP][410] ([i915#16012]) -> [SKIP][411] ([i915#14544] / [i915#16025]) +1 other test skip [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-2-xrgb2101010.html [411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-2-xrgb2101010.html * igt@kms_hdr@static-toggle-suspend: - shard-rkl: [SKIP][412] ([i915#16011] / [i915#3555] / [i915#8228]) -> [ABORT][413] ([i915#15132]) [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-8/igt@kms_hdr@static-toggle-suspend.html [413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-1/igt@kms_hdr@static-toggle-suspend.html * igt@kms_joiner@basic-big-joiner: - shard-rkl: [SKIP][414] ([i915#15460]) -> [SKIP][415] ([i915#14544] / [i915#15460]) +1 other test skip [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@kms_joiner@basic-big-joiner.html [415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_joiner@basic-big-joiner.html * igt@kms_joiner@basic-force-ultra-joiner: - shard-rkl: [SKIP][416] ([i915#14544] / [i915#15458]) -> [SKIP][417] ([i915#15458]) [416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_joiner@basic-force-ultra-joiner.html [417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_joiner@basic-force-ultra-joiner.html * igt@kms_joiner@invalid-modeset-force-big-joiner: - shard-rkl: [SKIP][418] ([i915#14544] / [i915#15459]) -> [SKIP][419] ([i915#15459]) [418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html [419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_joiner@invalid-modeset-force-big-joiner.html * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping: - shard-rkl: [SKIP][420] ([i915#15709]) -> [SKIP][421] ([i915#14544] / [i915#15709]) +2 other tests skip [420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html [421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier: - shard-rkl: [SKIP][422] ([i915#14544] / [i915#15709]) -> [SKIP][423] ([i915#15709]) [422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html [423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html * igt@kms_plane_multiple@2x-tiling-4: - shard-rkl: [SKIP][424] ([i915#13958] / [i915#14544]) -> [SKIP][425] ([i915#13958]) +1 other test skip [424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-4.html [425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_plane_multiple@2x-tiling-4.html * igt@kms_plane_multiple@2x-tiling-yf: - shard-rkl: [SKIP][426] ([i915#13958]) -> [SKIP][427] ([i915#13958] / [i915#14544]) [426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_plane_multiple@2x-tiling-yf.html [427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-yf.html * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a: - shard-rkl: [SKIP][428] ([i915#14544] / [i915#15329]) -> [SKIP][429] ([i915#15329]) +3 other tests skip [428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html [429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html * igt@kms_pm_lpsp@kms-lpsp: - shard-dg1: [SKIP][430] ([i915#3828]) -> [SKIP][431] ([i915#9340]) [430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg1-14/igt@kms_pm_lpsp@kms-lpsp.html [431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg1-13/igt@kms_pm_lpsp@kms-lpsp.html * igt@kms_pm_rpm@cursor-dpms: - shard-dg2: [SKIP][432] -> [SKIP][433] ([i915#4077]) [432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-dg2-5/igt@kms_pm_rpm@cursor-dpms.html [433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-dg2-4/igt@kms_pm_rpm@cursor-dpms.html * igt@kms_pm_rpm@modeset-lpsp: - shard-rkl: [SKIP][434] ([i915#14544] / [i915#15073]) -> [SKIP][435] ([i915#15073]) [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp.html [435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-rkl: [SKIP][436] ([i915#15073]) -> [SKIP][437] ([i915#14544] / [i915#15073]) [436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html [437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_prime@d3hot: - shard-rkl: [SKIP][438] ([i915#14544] / [i915#6524]) -> [SKIP][439] ([i915#6524]) [438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_prime@d3hot.html [439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_prime@d3hot.html * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area: - shard-rkl: [SKIP][440] ([i915#11520]) -> [SKIP][441] ([i915#11520] / [i915#14544]) +3 other tests skip [440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html [441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf: - shard-rkl: [SKIP][442] ([i915#11520] / [i915#14544]) -> [SKIP][443] ([i915#11520]) +3 other tests skip [442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html [443]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-rkl: [SKIP][444] ([i915#14544] / [i915#9683]) -> [SKIP][445] ([i915#9683]) [444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_psr2_su@page_flip-xrgb8888.html [445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_psr@fbc-psr2-sprite-render: - shard-rkl: [SKIP][446] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][447] ([i915#1072] / [i915#9732]) +12 other tests skip [446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_psr@fbc-psr2-sprite-render.html [447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_psr@fbc-psr2-sprite-render.html * igt@kms_psr@psr2-sprite-mmap-cpu: - shard-rkl: [SKIP][448] ([i915#1072] / [i915#9732]) -> [SKIP][449] ([i915#1072] / [i915#14544] / [i915#9732]) +10 other tests skip [448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_psr@psr2-sprite-mmap-cpu.html [449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_psr@psr2-sprite-mmap-cpu.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0: - shard-rkl: [SKIP][450] ([i915#14544] / [i915#5289]) -> [SKIP][451] ([i915#5289]) [450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html [451]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html * igt@kms_vrr@flip-dpms: - shard-rkl: [SKIP][452] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][453] ([i915#15243] / [i915#3555]) [452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_vrr@flip-dpms.html [453]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-3/igt@kms_vrr@flip-dpms.html * igt@kms_vrr@negative-basic: - shard-rkl: [SKIP][454] ([i915#14544] / [i915#3555] / [i915#9906]) -> [SKIP][455] ([i915#3555] / [i915#9906]) [454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_vrr@negative-basic.html [455]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-7/igt@kms_vrr@negative-basic.html * igt@kms_vrr@seamless-rr-switch-virtual: - shard-rkl: [SKIP][456] ([i915#14544] / [i915#9906]) -> [SKIP][457] ([i915#9906]) [456]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-virtual.html [457]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@kms_vrr@seamless-rr-switch-virtual.html * igt@kms_vrr@seamless-rr-switch-vrr: - shard-rkl: [SKIP][458] ([i915#9906]) -> [SKIP][459] ([i915#14544] / [i915#9906]) +1 other test skip [458]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@kms_vrr@seamless-rr-switch-vrr.html [459]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-vrr.html * igt@perf@gen8-unprivileged-single-ctx-counters: - shard-rkl: [SKIP][460] ([i915#2436]) -> [SKIP][461] ([i915#14544] / [i915#2436]) [460]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@perf@gen8-unprivileged-single-ctx-counters.html [461]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@perf@gen8-unprivileged-single-ctx-counters.html * igt@perf_pmu@module-unload: - shard-tglu: [ABORT][462] ([i915#15778]) -> [INCOMPLETE][463] ([i915#13520]) [462]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-tglu-10/igt@perf_pmu@module-unload.html [463]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-tglu-4/igt@perf_pmu@module-unload.html * igt@prime_vgem@basic-write: - shard-rkl: [SKIP][464] ([i915#14544] / [i915#3291] / [i915#3708]) -> [SKIP][465] ([i915#3291] / [i915#3708]) [464]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-6/igt@prime_vgem@basic-write.html [465]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-4/igt@prime_vgem@basic-write.html * igt@prime_vgem@coherency-gtt: - shard-rkl: [SKIP][466] ([i915#3708]) -> [SKIP][467] ([i915#14544] / [i915#3708]) [466]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-7/igt@prime_vgem@coherency-gtt.html [467]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@prime_vgem@coherency-gtt.html * igt@sriov_basic@bind-unbind-vf: - shard-rkl: [SKIP][468] ([i915#9917]) -> [SKIP][469] ([i915#14544] / [i915#9917]) +1 other test skip [468]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18505/shard-rkl-2/igt@sriov_basic@bind-unbind-vf.html [469]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/shard-rkl-6/igt@sriov_basic@bind-unbind-vf.html [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307 [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433 [i915#10538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10538 [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647 [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072 [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078 [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151 [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520 [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681 [i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118 [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920 [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#12177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12177 [i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276 [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313 [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343 [i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358 [i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454 [i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712 [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745 [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755 [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756 [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761 [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805 [i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026 [i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027 [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046 [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049 [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356 [i915#13409]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13409 [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476 [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520 [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566 [i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688 [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707 [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748 [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749 [i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781 [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790 [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958 [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098 [i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152 [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259 [i915#14498]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14498 [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544 [i915#14586]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14586 [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073 [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102 [i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104 [i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106 [i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131 [i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132 [i915#15140]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15140 [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243 [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329 [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330 [i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342 [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458 [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459 [i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460 [i915#15492]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15492 [i915#15560]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15560 [i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582 [i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608 [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643 [i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656 [i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709 [i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733 [i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739 [i915#15768]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15768 [i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778 [i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865 [i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867 [i915#15871]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15871 [i915#15912]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15912 [i915#15913]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15913 [i915#15949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15949 [i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989 [i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990 [i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991 [i915#16011]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16011 [i915#16012]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16012 [i915#16025]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16025 [i915#16056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16056 [i915#16066]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16066 [i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081 [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825 [i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065 [i915#2436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2436 [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527 [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658 [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681 [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284 [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023 [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299 [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469 [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555 [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638 [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708 [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742 [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804 [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828 [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840 [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955 [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077 [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083 [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212 [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349 [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391 [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423 [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525 [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613 [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817 [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839 [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885 [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138 [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190 [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286 [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289 [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354 [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439 [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095 [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188 [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245 [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335 [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524 [i915#658]: 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https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623 [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708 [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323 [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337 [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340 [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433 [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683 [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723 [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732 [i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833 [i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878 [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906 [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917 [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934 [i915#9979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9979 Build changes ------------- * Linux: CI_DRM_18505 -> Patchwork_166764v1 CI-20190529: 20190529 CI_DRM_18505: 4a64e92e2b244c93c99832a0850204ed2ddca5b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_166764v1: 4a64e92e2b244c93c99832a0850204ed2ddca5b2 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_166764v1/index.html [-- Attachment #2: Type: text/html, Size: 159776 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2026-06-19 13:58 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-05-18 10:36 [PATCH 0/4] drm/i915/display: Switch DG2 MPLLB handling to the DPLL framework Mika Kahola 2026-05-18 10:36 ` [PATCH 1/4] drm/i915/display: Split out DG2 MPLLB enable helper Mika Kahola 2026-06-19 13:05 ` Michał Grzelak 2026-05-18 10:36 ` [PATCH 2/4] drm/i915/display: Add DG2 MPLLB DPLL manager support Mika Kahola 2026-06-19 13:18 ` Michał Grzelak 2026-06-19 13:57 ` Imre Deak 2026-05-18 10:36 ` [PATCH 3/4] drm/i915/display: Prepare DG2 DDI and compute paths for DPLL framework Mika Kahola 2026-06-19 13:18 ` Michał Grzelak 2026-05-18 10:36 ` [PATCH 4/4] drm/i915/display: Switch DG2 to use " Mika Kahola 2026-06-19 13:19 ` Michał Grzelak 2026-05-18 10:43 ` ✓ CI.KUnit: success for drm/i915/display: Switch DG2 MPLLB handling to the " Patchwork 2026-05-18 11:20 ` ✓ Xe.CI.BAT: " Patchwork 2026-05-18 14:00 ` ✗ Xe.CI.FULL: failure " Patchwork 2026-05-18 14:08 ` ✓ i915.CI.BAT: success " Patchwork 2026-05-18 22:58 ` ✓ i915.CI.Full: " Patchwork
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