Re: [PATCH 3/3] iommu/vt-d: Add debugfs support to show scalable mode DMAR table internals

[Lu Baolu <baolu.lu@linux.intel.com>]

Hi,

On 5/10/19 2:42 AM, Sai Praneeth Prakhya wrote:
> From: Sai Praneeth <sai.praneeth.prakhya@intel.com>
> 
> A DMAR table walk would typically follow the below process.
> 1. Bus number is used to index into root table which points to a context
>     table.
> 2. Device number and Function number are used together to index into
>     context table which then points to a pasid directory.
> 3. PASID[19:6] is used to index into PASID directory which points to a
>     PASID table.
> 4. PASID[5:0] is used to index into PASID table which points to all levels
>     of page tables.
> 
> Whenever a user opens the file
> "/sys/kernel/debug/iommu/intel/dmar_translation_struct", the above
> described DMAR table walk is performed and the contents of the table are
> dumped into the file. The dump could be handy while dealing with devices
> that use PASID.
> 
> Example of such dump:
> cat /sys/kernel/debug/iommu/intel/dmar_translation_struct
> 
> (Please note that because of 80 char limit, entries that should have been
> in the same line are broken into different lines)
> 
> IOMMU dmar0: Root Table Address: 0x436f7c000
> B.D.F	Root_entry				Context_entry
> PASID	PASID_table_entry
> 00:0a.0	0x0000000000000000:0x000000044dd3f001	0x0000000000100000:0x0000000435460e1d
> 0	0x000000044d6e1089:0x0000000000000003:0x0000000000000001
> 00:0a.0	0x0000000000000000:0x000000044dd3f001	0x0000000000100000:0x0000000435460e1d
> 1	0x0000000000000049:0x0000000000000001:0x0000000003c0e001
> 
> Note that the above format is followed even for legacy DMAR table dump
> which doesn't support PASID and hence in such cases PASID is defaulted to
> -1 indicating that PASID and it's related fields are invalid.
> 
> Cc: Joerg Roedel <joro@8bytes.org>
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: Sohil Mehta <sohil.mehta@intel.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
> ---
>   drivers/iommu/intel-iommu-debugfs.c | 75 +++++++++++++++++++++++++++++++++++--
>   1 file changed, 71 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/iommu/intel-iommu-debugfs.c b/drivers/iommu/intel-iommu-debugfs.c
> index 3f5399b5e6c0..8982e93a50d7 100644
> --- a/drivers/iommu/intel-iommu-debugfs.c
> +++ b/drivers/iommu/intel-iommu-debugfs.c
> @@ -14,11 +14,15 @@
>   
>   #include <asm/irq_remapping.h>
>   
> +#include "intel-pasid.h"
> +
>   struct tbl_walk {
>   	u16 bus;
>   	u16 devfn;
> +	u32 pasid;
>   	struct root_entry *rt_entry;
>   	struct context_entry *ctx_entry;
> +	struct pasid_entry *pasid_tbl_entry;
>   };
>   
>   struct iommu_regset {
> @@ -142,21 +146,77 @@ static inline void print_tbl_walk(struct seq_file *m)
>   {
>   	struct tbl_walk *tbl_wlk = m->private;
>   
> -	seq_printf(m, "%02x:%02x.%x\t0x%016llx:0x%016llx\t0x%016llx:0x%016llx\n",
> +	seq_printf(m, "%02x:%02x.%x\t0x%016llx:0x%016llx\t0x%016llx:0x%016llx\t",
>   		   tbl_wlk->bus, PCI_SLOT(tbl_wlk->devfn),
>   		   PCI_FUNC(tbl_wlk->devfn), tbl_wlk->rt_entry->hi,
>   		   tbl_wlk->rt_entry->lo, tbl_wlk->ctx_entry->hi,
>   		   tbl_wlk->ctx_entry->lo);
> +
> +	/*
> +	 * A legacy mode DMAR doesn't support PASID, hence default it to -1
> +	 * indicating that it's invalid. Also, default all PASID related fields
> +	 * to 0.
> +	 */
> +	if (!tbl_wlk->pasid_tbl_entry)
> +		seq_printf(m, "%-6d\t0x%016llx:0x%016llx:0x%016llx\n", -1,
> +			   (u64)0, (u64)0, (u64)0);
> +	else
> +		seq_printf(m, "%-6d\t0x%016llx:0x%016llx:0x%016llx\n",
> +			   tbl_wlk->pasid, tbl_wlk->pasid_tbl_entry->val[0],
> +			   tbl_wlk->pasid_tbl_entry->val[1],
> +			   tbl_wlk->pasid_tbl_entry->val[2]);
> +}
> +
> +static void pasid_tbl_walk(struct seq_file *m, struct pasid_entry *tbl_entry,
> +			   u16 dir_idx)
> +{
> +	struct tbl_walk *tbl_wlk = m->private;
> +	u8 tbl_idx;
> +
> +	for (tbl_idx = 0; tbl_idx < PASID_TBL_ENTRIES; tbl_idx++) {
> +		if (pasid_pte_is_present(tbl_entry)) {
> +			tbl_wlk->pasid_tbl_entry = tbl_entry;
> +			tbl_wlk->pasid = (dir_idx << PASID_PDE_SHIFT) + tbl_idx;
> +			print_tbl_walk(m);
> +		}
> +
> +		tbl_entry++;
> +	}
> +}
> +
> +static void pasid_dir_walk(struct seq_file *m, u64 pasid_dir_ptr,
> +			   u16 pasid_dir_size)
> +{
> +	struct pasid_dir_entry *dir_entry = phys_to_virt(pasid_dir_ptr);
> +	struct pasid_entry *pasid_tbl;
> +	u16 dir_idx;
> +
> +	for (dir_idx = 0; dir_idx < pasid_dir_size; dir_idx++) {
> +		pasid_tbl = get_pasid_table_from_pde(dir_entry);
> +		if (pasid_tbl)
> +			pasid_tbl_walk(m, pasid_tbl, dir_idx);
> +
> +		dir_entry++;
> +	}
>   }
>   
>   static void ctx_tbl_walk(struct seq_file *m, struct intel_iommu *iommu, u16 bus)
>   {
>   	struct context_entry *context;
> -	u16 devfn;
> +	u16 devfn, pasid_dir_size;
> +	u64 pasid_dir_ptr;
>   
>   	for (devfn = 0; devfn < 256; devfn++) {
>   		struct tbl_walk tbl_wlk = {0};
>   
> +		/*
> +		 * Scalable mode root entry points to upper context table and
> +		 * lower context table. Each scalable mode context table has
> +		 * 128 context entries where as legacy mode context table has
> +		 * 256 context entries. So for scalable mode, devfn > 127 is
> +		 * invalid. But, iommu_context_addr() inherently handles this by

This comment is a bit misleading. :-)

devfn > 127 is also valid for scalable mode. The context entries for
former 128 devices are in the lower scalable-mode context-table,
while the latter 128 devices in upper scalable-mode context-table.
This has been handled in iommu_context_addr(), so the caller don't
need to worry about this.

Other looks good to me.

Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>

Best regards,
Lu Baolu

> +		 * walking upper context table if devfn > 127.
> +		 */
>   		context = iommu_context_addr(iommu, bus, devfn, 0);
>   		if (!context)
>   			return;
> @@ -170,7 +230,14 @@ static void ctx_tbl_walk(struct seq_file *m, struct intel_iommu *iommu, u16 bus)
>   		tbl_wlk.ctx_entry = context;
>   		m->private = &tbl_wlk;
>   
> -		print_tbl_walk(m);
> +		if (!is_pasid_enabled(context)) {
> +			print_tbl_walk(m);
> +			continue;
> +		}
> +
> +		pasid_dir_ptr = context->lo & VTD_PAGE_MASK;
> +		pasid_dir_size = get_pasid_dir_size(context);
> +		pasid_dir_walk(m, pasid_dir_ptr, pasid_dir_size);
>   	}
>   }
>   
> @@ -182,7 +249,7 @@ static void root_tbl_walk(struct seq_file *m, struct intel_iommu *iommu)
>   	spin_lock_irqsave(&iommu->lock, flags);
>   	seq_printf(m, "IOMMU %s: Root Table Address: 0x%llx\n", iommu->name,
>   		   (u64)virt_to_phys(iommu->root_entry));
> -	seq_puts(m, "B.D.F\tRoot_entry\t\t\t\tContext_entry\n");
> +	seq_puts(m, "B.D.F\tRoot_entry\t\t\t\tContext_entry\t\t\t\tPASID\tPASID_table_entry\n");
>   
>   	/*
>   	 * No need to check if the root entry is present or not because
> 
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