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From: Heiko Stuebner <heiko@sntech.de>
To: mturquette@baylibre.com, Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: [GIT PULL] Rockchip clock changes for 6.17 #1
Date: Fri, 18 Jul 2025 23:08:17 +0200	[thread overview]
Message-ID: <6515302.QJadu78ljV@phil> (raw)

Hi Mike, Stephen,

please find below a pull-request with Rockchip clock change for 6.17
Just a single new PLL rate for rk3588 this time.


Please pull.

Thanks
Heiko


The following changes since commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494:

  Linux 6.16-rc1 (2025-06-08 13:44:43 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.17-rockchip-clk1

for you to fetch changes up to 132b62280a9dbe38c627183ae7f1611de3ee0d9a:

  clk: rockchip: rk3568: Add PLL rate for 132MHz (2025-07-10 13:47:36 +0200)

----------------------------------------------------------------
Just a 132MHz PLL rate for rk3588.

----------------------------------------------------------------
Andy Yan (1):
      clk: rockchip: rk3568: Add PLL rate for 132MHz

 drivers/clk/rockchip/clk-rk3568.c | 1 +
 1 file changed, 1 insertion(+)




WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: mturquette@baylibre.com, Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: [GIT PULL] Rockchip clock changes for 6.17 #1
Date: Fri, 18 Jul 2025 23:08:17 +0200	[thread overview]
Message-ID: <6515302.QJadu78ljV@phil> (raw)

Hi Mike, Stephen,

please find below a pull-request with Rockchip clock change for 6.17
Just a single new PLL rate for rk3588 this time.


Please pull.

Thanks
Heiko


The following changes since commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494:

  Linux 6.16-rc1 (2025-06-08 13:44:43 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.17-rockchip-clk1

for you to fetch changes up to 132b62280a9dbe38c627183ae7f1611de3ee0d9a:

  clk: rockchip: rk3568: Add PLL rate for 132MHz (2025-07-10 13:47:36 +0200)

----------------------------------------------------------------
Just a 132MHz PLL rate for rk3588.

----------------------------------------------------------------
Andy Yan (1):
      clk: rockchip: rk3568: Add PLL rate for 132MHz

 drivers/clk/rockchip/clk-rk3568.c | 1 +
 1 file changed, 1 insertion(+)




_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

             reply	other threads:[~2025-07-18 21:08 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-18 21:08 Heiko Stuebner [this message]
2025-07-18 21:08 ` [GIT PULL] Rockchip clock changes for 6.17 #1 Heiko Stuebner
2025-07-22  0:21 ` Stephen Boyd
2025-07-22  0:21   ` Stephen Boyd

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