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From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nikula, Jani" <jani.nikula@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"Varide, Nischal" <nischal.varide@intel.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers
Date: Mon, 22 Feb 2021 05:25:13 +0000	[thread overview]
Message-ID: <654da974ec114977895af83eafed811f@intel.com> (raw)
In-Reply-To: <ab57627f373ec4a80494bb51ea51080810d9bfb0.1613054234.git.jani.nikula@intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Varide, Nischal
> <nischal.varide@intel.com>; dri-devel@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers
> 
> Add DPCD register definitions for eDP 1.4 Multi-SST Operation.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Nischal Varide <nischal.varide@intel.com>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index
> edffd1dcca3e..632ad7faa006 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1016,6 +1016,11 @@ struct drm_device;
>  #define DP_EDP_REGIONAL_BACKLIGHT_BASE      0x740    /* eDP 1.4 */
>  #define DP_EDP_REGIONAL_BACKLIGHT_0	    0x741    /* eDP 1.4 */
> 
> +#define DP_EDP_MSO_LINK_CAPABILITIES        0x7a4    /* eDP 1.4 */
> +# define DP_EDP_MSO_NUMBER_OF_LINKS_MASK    (7 << 0)
> +# define DP_EDP_MSO_NUMBER_OF_LINKS_SHIFT   0
> +# define DP_EDP_MSO_INDEPENDENT_LINK_BIT    (1 << 3)
> +
>  /* Sideband MSG Buffers */
>  #define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
>  #define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
> --
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nikula, Jani" <jani.nikula@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
	"Varide, Nischal" <nischal.varide@intel.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: RE: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers
Date: Mon, 22 Feb 2021 05:25:13 +0000	[thread overview]
Message-ID: <654da974ec114977895af83eafed811f@intel.com> (raw)
In-Reply-To: <ab57627f373ec4a80494bb51ea51080810d9bfb0.1613054234.git.jani.nikula@intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Varide, Nischal
> <nischal.varide@intel.com>; dri-devel@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers
> 
> Add DPCD register definitions for eDP 1.4 Multi-SST Operation.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Nischal Varide <nischal.varide@intel.com>
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  include/drm/drm_dp_helper.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index
> edffd1dcca3e..632ad7faa006 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1016,6 +1016,11 @@ struct drm_device;
>  #define DP_EDP_REGIONAL_BACKLIGHT_BASE      0x740    /* eDP 1.4 */
>  #define DP_EDP_REGIONAL_BACKLIGHT_0	    0x741    /* eDP 1.4 */
> 
> +#define DP_EDP_MSO_LINK_CAPABILITIES        0x7a4    /* eDP 1.4 */
> +# define DP_EDP_MSO_NUMBER_OF_LINKS_MASK    (7 << 0)
> +# define DP_EDP_MSO_NUMBER_OF_LINKS_SHIFT   0
> +# define DP_EDP_MSO_INDEPENDENT_LINK_BIT    (1 << 3)
> +
>  /* Sideband MSG Buffers */
>  #define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
>  #define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
> --
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2021-02-22  5:25 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-11 14:52 [Intel-gfx] [PATCH v3 0/9] drm/i915/edp: enable eDP Multi-SST Operation (MSO) Jani Nikula
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers Jani Nikula
2021-02-11 14:52   ` Jani Nikula
2021-02-22  5:25   ` Shankar, Uma [this message]
2021-02-22  5:25     ` [Intel-gfx] " Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode Jani Nikula
2021-02-22  5:36   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes() Jani Nikula
2021-02-22  5:50   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+ Jani Nikula
2021-02-22  5:57   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter configuration definitions Jani Nikula
2021-02-22  5:58   ` Shankar, Uma
2021-02-22 16:31     ` Jani Nikula
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it Jani Nikula
2021-02-22  9:09   ` Shankar, Uma
2021-02-22 16:55     ` Jani Nikula
2021-02-22 18:11       ` Shankar, Uma
2021-03-02 10:25       ` Jani Nikula
2021-03-02 10:29         ` Shankar, Uma
2021-03-02 14:57         ` Ville Syrjälä
2021-03-02 17:20           ` Jani Nikula
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check Jani Nikula
2021-02-22  9:13   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 8/9] drm/i915/edp: modify fixed and downclock modes for MSO Jani Nikula
2021-02-22  9:21   ` Shankar, Uma
2021-02-11 14:52 ` [Intel-gfx] [PATCH v3 9/9] drm/i915/edp: enable eDP MSO during link training Jani Nikula
2021-02-22 10:06   ` Shankar, Uma
2021-02-11 15:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/edp: enable eDP Multi-SST Operation (MSO) Patchwork
2021-02-11 16:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-11 17:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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