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* RE: 8270 performance
@ 2003-12-08 21:11 Jean-Denis Boyer
  2003-12-09  0:02 ` Re[2]: " Ricardo Scop
  2003-12-09  7:35 ` Jaap-Jan Boor
  0 siblings, 2 replies; 3+ messages in thread
From: Jean-Denis Boyer @ 2003-12-08 21:11 UTC (permalink / raw)
  To: Ricardo Scop, Jaap-Jan Boor; +Cc: linuxppc-embedded


Ricardo,
Jaap-Jan,

> > I would expect the bogomips number
> > to be somewhere near the core clock
> > (like 8xx).
>
> Well, I think the numbers are pretty fair, assuming that the
> bogomips number
> reflect a certain amount of external memory accesses at 66
> MHz external bus
> clock.

It has more to do with pipelining!
Hopefully, there ain't any memory access during calibration...
(except, of course, when the instruction cache is disabled!)

I didn't look at the documentation, but the execution of a branch probably occurs later in the pipeline of a 8260 than for the 860. It probably looses one more cycle. The calibration relies on the execution speed of function __delay (arch/ppc/kernel/misc.S), which loops on a branch instruction 'bdnz'.

Fortunately, the number of bogomips will increase linearly with the core clock.
(These are approximations)

For 8260:
 200MHz => 66M bdnz per second => 133BogoMips
 266    => 88M                 => 176
 400    => 133M                => 266

For 860:
 50MHz => 25M bdnz per second => 50BogoMips


Regards,
--------------------------------------------
 Jean-Denis Boyer, Eng.
 M5T Centre d'Excellence en Télécoms Inc.
 4283 Garlock Street
 Sherbrooke (Québec)
 J1L 2C8  CANADA
 (819)829-3972 x241
--------------------------------------------

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re[2]: 8270 performance
  2003-12-08 21:11 8270 performance Jean-Denis Boyer
@ 2003-12-09  0:02 ` Ricardo Scop
  2003-12-09  7:35 ` Jaap-Jan Boor
  1 sibling, 0 replies; 3+ messages in thread
From: Ricardo Scop @ 2003-12-09  0:02 UTC (permalink / raw)
  To: linuxppc-embedded


Hello Jean-Denis,

Monday, December 08, 2003, 6:11:30 PM, you wrote:


JDB> Ricardo,
JDB> Jaap-Jan,

>> > I would expect the bogomips number
>> > to be somewhere near the core clock
>> > (like 8xx).
>>
>> Well, I think the numbers are pretty fair, assuming that the
>> bogomips number
>> reflect a certain amount of external memory accesses at 66
>> MHz external bus
>> clock.

JDB> It has more to do with pipelining!
JDB> Hopefully, there ain't any memory access during calibration...
JDB> (except, of course, when the instruction cache is disabled!)

JDB> I didn't look at the documentation, but the execution of a branch probably occurs later in the pipeline of a 8260 than for the 860. It probably looses one more cycle. The calibration relies on
JDB> the execution speed of function __delay (arch/ppc/kernel/misc.S), which loops on a branch instruction 'bdnz'.

Ooops, I should learn to read the source code before making any
assumptions. Sorry for the mistake, and many thanks for the lesson!

-Scop.

JDB> Regards,
JDB> --------------------------------------------
JDB>  Jean-Denis Boyer, Eng.
JDB>  M5T Centre d'Excellence en Télécoms Inc.
JDB>  4283 Garlock Street
JDB>  Sherbrooke (Québec)
JDB>  J1L 2C8  CANADA
JDB>  (819)829-3972 x241
JDB> --------------------------------------------


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: 8270 performance
  2003-12-08 21:11 8270 performance Jean-Denis Boyer
  2003-12-09  0:02 ` Re[2]: " Ricardo Scop
@ 2003-12-09  7:35 ` Jaap-Jan Boor
  1 sibling, 0 replies; 3+ messages in thread
From: Jaap-Jan Boor @ 2003-12-09  7:35 UTC (permalink / raw)
  To: Jean-Denis Boyer; +Cc: linuxppc-embedded, Ricardo Scop


On 8-dec-03, at 22:11, Jean-Denis Boyer wrote:

>
> Ricardo,
> Jaap-Jan,
>
>>> I would expect the bogomips number
>>> to be somewhere near the core clock
>>> (like 8xx).
>>
>> Well, I think the numbers are pretty fair, assuming that the
>> bogomips number
>> reflect a certain amount of external memory accesses at 66
>> MHz external bus
>> clock.
>
> It has more to do with pipelining!
> Hopefully, there ain't any memory access during calibration...
> (except, of course, when the instruction cache is disabled!)
>
> I didn't look at the documentation, but the execution of a branch
> probably occurs later in the pipeline of a 8260 than for the 860. It
> probably looses one more cycle. The calibration relies on the
> execution speed of function __delay (arch/ppc/kernel/misc.S), which
> loops on a branch instruction 'bdnz'.
>
> Fortunately, the number of bogomips will increase linearly with the
> core clock.
> (These are approximations)
>
> For 8260:
>  200MHz => 66M bdnz per second => 133BogoMips
>  266    => 88M                 => 176
>  400    => 133M                => 266
>
> For 860:
>  50MHz => 25M bdnz per second => 50BogoMips

Ok, that's a nice explanation, thanks!

Jaap-Jan

>
>
> Regards,
> --------------------------------------------
>  Jean-Denis Boyer, Eng.
>  M5T Centre d'Excellence en Télécoms Inc.
>  4283 Garlock Street
>  Sherbrooke (Québec)
>  J1L 2C8  CANADA
>  (819)829-3972 x241
> --------------------------------------------


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2003-12-08 21:11 8270 performance Jean-Denis Boyer
2003-12-09  0:02 ` Re[2]: " Ricardo Scop
2003-12-09  7:35 ` Jaap-Jan Boor

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