[PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Mason Chang]

Add the LVTS commands for Mediatek Filogic 880/MT7988.

This series fixes severely abnormal and inaccurate LVTS temperature
readings when using the default commands.

Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>

Mason Chang (3):
  thermal/drivers/mediatek/lvts_thermal: change lvts commands array to
    static const
  thermal/drivers/mediatek/lvts_thermal: add lvts commands and their
    sizes to driver data
  thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

 drivers/thermal/mediatek/lvts_thermal.c | 74 ++++++++++++++++++++-----
 1 file changed, 61 insertions(+), 13 deletions(-)

-- 
2.45.2

[PATCH 1/3] thermal/drivers/mediatek/lvts_thermal: change lvts commands array to static const

[Mason Chang]

Change the LVTS commands array to static const in preparation for
adding different commands.

Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
---
 drivers/thermal/mediatek/lvts_thermal.c | 29 +++++++++++++------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 985925147..7e4f56831 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -96,6 +96,17 @@
 
 #define LVTS_MINIMUM_THRESHOLD		20000
 
+static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
+/*
+ * Write device mask: 0xC1030000
+ */
+static const u32 default_init_cmds[] = {
+	0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
+	0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
+	0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
+	0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
+};
+
 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
 static int golden_temp_offset;
 
@@ -902,7 +913,7 @@ static void lvts_ctrl_monitor_enable(struct device *dev, struct lvts_ctrl *lvts_
  * each write in the configuration register must be separated by a
  * delay of 2 us.
  */
-static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, u32 *cmds, int nr_cmds)
+static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, const u32 *cmds, int nr_cmds)
 {
 	int i;
 
@@ -985,9 +996,9 @@ static int lvts_ctrl_set_enable(struct lvts_ctrl *lvts_ctrl, int enable)
 
 static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 {
-	u32 id, cmds[] = { 0xC103FFFF, 0xC502FF55 };
+	u32 id;
 
-	lvts_write_config(lvts_ctrl, cmds, ARRAY_SIZE(cmds));
+	lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
 
 	/*
 	 * LVTS_ID : Get ID and status of the thermal controller
@@ -1006,17 +1017,7 @@ static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 
 static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 {
-	/*
-	 * Write device mask: 0xC1030000
-	 */
-	u32 cmds[] = {
-		0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
-		0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
-		0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
-		0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
-	};
-
-	lvts_write_config(lvts_ctrl, cmds, ARRAY_SIZE(cmds));
+	lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
 
 	return 0;
 }
-- 
2.45.2

[PATCH 2/3] thermal/drivers/mediatek/lvts_thermal: add lvts commands and their sizes to driver data

[Mason Chang]

Add LVTS commands and their sizes to driver data in preparation for
adding different commands.

Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
---
 drivers/thermal/mediatek/lvts_thermal.c | 65 ++++++++++++++++++++-----
 1 file changed, 52 insertions(+), 13 deletions(-)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 7e4f56831..5b7bf29a7 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -96,17 +96,6 @@
 
 #define LVTS_MINIMUM_THRESHOLD		20000
 
-static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
-/*
- * Write device mask: 0xC1030000
- */
-static const u32 default_init_cmds[] = {
-	0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
-	0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
-	0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
-	0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
-};
-
 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
 static int golden_temp_offset;
 
@@ -136,7 +125,11 @@ struct lvts_ctrl_data {
 
 struct lvts_data {
 	const struct lvts_ctrl_data *lvts_ctrl;
+	const u32 *conn_cmd;
+	const u32 *init_cmd;
 	int num_lvts_ctrl;
+	int num_conn_cmd;
+	int num_init_cmd;
 	int temp_factor;
 	int temp_offset;
 	int gt_calib_bit_offset;
@@ -996,9 +989,10 @@ static int lvts_ctrl_set_enable(struct lvts_ctrl *lvts_ctrl, int enable)
 
 static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 {
+	const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
 	u32 id;
 
-	lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
+	lvts_write_config(lvts_ctrl, lvts_data->conn_cmd, lvts_data->num_conn_cmd);
 
 	/*
 	 * LVTS_ID : Get ID and status of the thermal controller
@@ -1017,7 +1011,9 @@ static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 
 static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 {
-	lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
+	const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
+
+	lvts_write_config(lvts_ctrl, lvts_data->init_cmd, lvts_data->num_init_cmd);
 
 	return 0;
 }
@@ -1446,6 +1442,17 @@ static int lvts_resume(struct device *dev)
 	return 0;
 }
 
+static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
+/*
+ * Write device mask: 0xC1030000
+ */
+static const u32 default_init_cmds[] = {
+	0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
+	0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
+	0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
+	0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
+};
+
 /*
  * The MT8186 calibration data is stored as packed 3-byte little-endian
  * values using a weird layout that makes sense only when viewed as a 32-bit
@@ -1740,7 +1747,11 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
 
 static const struct lvts_data mt7988_lvts_ap_data = {
 	.lvts_ctrl	= mt7988_lvts_ap_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT7988,
 	.temp_offset	= LVTS_COEFF_B_MT7988,
 	.gt_calib_bit_offset = 24,
@@ -1748,7 +1759,11 @@ static const struct lvts_data mt7988_lvts_ap_data = {
 
 static const struct lvts_data mt8186_lvts_data = {
 	.lvts_ctrl	= mt8186_lvts_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8186_lvts_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT7988,
 	.temp_offset	= LVTS_COEFF_B_MT7988,
 	.gt_calib_bit_offset = 24,
@@ -1757,7 +1772,11 @@ static const struct lvts_data mt8186_lvts_data = {
 
 static const struct lvts_data mt8188_lvts_mcu_data = {
 	.lvts_ctrl	= mt8188_lvts_mcu_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT8195,
 	.temp_offset	= LVTS_COEFF_B_MT8195,
 	.gt_calib_bit_offset = 20,
@@ -1766,7 +1785,11 @@ static const struct lvts_data mt8188_lvts_mcu_data = {
 
 static const struct lvts_data mt8188_lvts_ap_data = {
 	.lvts_ctrl	= mt8188_lvts_ap_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT8195,
 	.temp_offset	= LVTS_COEFF_B_MT8195,
 	.gt_calib_bit_offset = 20,
@@ -1775,7 +1798,11 @@ static const struct lvts_data mt8188_lvts_ap_data = {
 
 static const struct lvts_data mt8192_lvts_mcu_data = {
 	.lvts_ctrl	= mt8192_lvts_mcu_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT8195,
 	.temp_offset	= LVTS_COEFF_B_MT8195,
 	.gt_calib_bit_offset = 24,
@@ -1784,7 +1811,11 @@ static const struct lvts_data mt8192_lvts_mcu_data = {
 
 static const struct lvts_data mt8192_lvts_ap_data = {
 	.lvts_ctrl	= mt8192_lvts_ap_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT8195,
 	.temp_offset	= LVTS_COEFF_B_MT8195,
 	.gt_calib_bit_offset = 24,
@@ -1793,7 +1824,11 @@ static const struct lvts_data mt8192_lvts_ap_data = {
 
 static const struct lvts_data mt8195_lvts_mcu_data = {
 	.lvts_ctrl	= mt8195_lvts_mcu_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT8195,
 	.temp_offset	= LVTS_COEFF_B_MT8195,
 	.gt_calib_bit_offset = 24,
@@ -1802,7 +1837,11 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
 
 static const struct lvts_data mt8195_lvts_ap_data = {
 	.lvts_ctrl	= mt8195_lvts_ap_data_ctrl,
+	.conn_cmd	= default_conn_cmds,
+	.init_cmd	= default_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
+	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT8195,
 	.temp_offset	= LVTS_COEFF_B_MT8195,
 	.gt_calib_bit_offset = 24,
-- 
2.45.2

Aw: [PATCH 2/3] thermal/drivers/mediatek/lvts_thermal: add lvts commands and their sizes to driver data

[Frank Wunderlich]

Hi Mason,

thank you for working on this.

I have not yet tested the series, but did not have the issue (which should be solved by it) reported [1].

So just my thoughts when looking through changes

> Gesendet: Montag, 26. Mai 2025 um 12:26
> Von: "Mason Chang" <mason-cw.chang@mediatek.com>
> Betreff: [PATCH 2/3] thermal/drivers/mediatek/lvts_thermal: add lvts commands and their sizes to driver data
>
> Add LVTS commands and their sizes to driver data in preparation for
> adding different commands.
> 
> Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
> ---
>  drivers/thermal/mediatek/lvts_thermal.c | 65 ++++++++++++++++++++-----
>  1 file changed, 52 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
> index 7e4f56831..5b7bf29a7 100644
> --- a/drivers/thermal/mediatek/lvts_thermal.c
> +++ b/drivers/thermal/mediatek/lvts_thermal.c
> @@ -96,17 +96,6 @@
>  
>  #define LVTS_MINIMUM_THRESHOLD		20000
>  
> -static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
> -/*
> - * Write device mask: 0xC1030000
> - */
> -static const u32 default_init_cmds[] = {
> -	0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
> -	0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
> -	0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
> -	0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
> -};

could you please move this block in part 1 to the position used here in v2 to avoid deletion/adding again here?

Maybe magic numbers can be described a bit?

>  static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
>  static int golden_temp_offset;
>  
...
> @@ -1446,6 +1442,17 @@ static int lvts_resume(struct device *dev)
>  	return 0;
>  }
>  
> +static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
> +/*
> + * Write device mask: 0xC1030000
> + */
> +static const u32 default_init_cmds[] = {
> +	0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
> +	0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
> +	0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
> +	0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
> +};
> +
>  /*
>   * The MT8186 calibration data is stored as packed 3-byte little-endian
>   * values using a weird layout that makes sense only when viewed as a 32-bit
> @@ -1740,7 +1747,11 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {

regards Frank

[1] https://github.com/openwrt/openwrt/pull/18750#issuecomment-2877554514

Re: Aw: [PATCH 2/3] thermal/drivers/mediatek/lvts_thermal: add lvts commands and their sizes to driver data

[Mason Chang]

Hi Frank,

First of all, thank you for providing the link to the actual issue
case. This issue does not affect all MT7988 ICs. Based on the
information collected from users and production lines, we have found
that about 2% of the ICs show severe temperature anomalies without this
patch.

> Hi Mason,
> 
> thank you for working on this.
> 
> I have not yet tested the series, but did not have the issue (which
> should be solved by it) reported [1].
> 
> So just my thoughts when looking through changes
> 
> > Gesendet: Montag, 26. Mai 2025 um 12:26
> > Von: "Mason Chang" <mason-cw.chang@mediatek.com>
> > Betreff: [PATCH 2/3] thermal/drivers/mediatek/lvts_thermal: add
> > lvts commands and their sizes to driver data
> > 
> > Add LVTS commands and their sizes to driver data in preparation for
> > adding different commands.
> > 
> > Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
> > ---
> >  drivers/thermal/mediatek/lvts_thermal.c | 65 ++++++++++++++++++++-
> > ----
> >  1 file changed, 52 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/thermal/mediatek/lvts_thermal.c
> > b/drivers/thermal/mediatek/lvts_thermal.c
> > index 7e4f56831..5b7bf29a7 100644
> > --- a/drivers/thermal/mediatek/lvts_thermal.c
> > +++ b/drivers/thermal/mediatek/lvts_thermal.c
> > @@ -96,17 +96,6 @@
> > 
> >  #define LVTS_MINIMUM_THRESHOLD               20000
> > 
> > -static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
> > -/*
> > - * Write device mask: 0xC1030000
> > - */
> > -static const u32 default_init_cmds[] = {
> > -     0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
> > -     0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
> > -     0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
> > -     0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
> > -};
> 
> could you please move this block in part 1 to the position used here
> in v2 to avoid deletion/adding again here?

To clearly separate changes and maintain the principle of minimal
modifications, you can see that in patch [1/3], the functions
lvts_ctrl_connect and lvts_ctrl_initialize call the commands.
Therefore, the commands cannot be moved to the part in patch [2/3].

> Maybe magic numbers can be described a bit?

This is just an initialization sequence, it cannot be adjusted.

> >  static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
> >  static int golden_temp_offset;
> > 
> ...
> > @@ -1446,6 +1442,17 @@ static int lvts_resume(struct device *dev)
> >       return 0;
> >  }
> > 
> > +static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
> > +/*
> > + * Write device mask: 0xC1030000
> > + */
> > +static const u32 default_init_cmds[] = {
> > +     0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
> > +     0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
> > +     0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
> > +     0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
> > +};
> > +
> >  /*
> >   * The MT8186 calibration data is stored as packed 3-byte little-
> > endian
> >   * values using a weird layout that makes sense only when viewed
> > as a 32-bit
> > @@ -1740,7 +1747,11 @@ static const struct lvts_ctrl_data
> > mt8195_lvts_ap_data_ctrl[] = {
>                                                                      
> regards Frank
> 
> [1]
> https://urldefense.com/v3/__https://github.com/openwrt/openwrt/pull/18750*issuecomment-2877554514__;Iw!!CTRNKA9wMg0ARbw!lVkeuQXjfQ1pWGSvoDCEmf0FEFQqqQDEb0ovZ5cSsNiXi7hud5epYUyl9xFjO6U7vukgfBY1Ue_-xJ78F5Qe7rw4UzwJyA$

Thank you for focusing on this issue!

Sincerely
Mason

[PATCH 3/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Mason Chang]

These commands are necessary to avoid severely abnormal and inaccurate
temperature readings that are caused by using the default commands.

Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
---
 drivers/thermal/mediatek/lvts_thermal.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 5b7bf29a7..4d49482f0 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -1443,6 +1443,8 @@ static int lvts_resume(struct device *dev)
 }
 
 static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
+static const u32 mt7988_conn_cmds[] = { 0xC103FFFF, 0xC502FC55 };
+
 /*
  * Write device mask: 0xC1030000
  */
@@ -1453,6 +1455,12 @@ static const u32 default_init_cmds[] = {
 	0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
 };
 
+static const u32 mt7988_init_cmds[] = {
+	0xC1030300, 0xC1030420, 0xC1030500, 0xC10307A6, 0xC1030CFC,
+	0xC1030A8C, 0xC103098D, 0xC10308F1, 0xC1030B04, 0xC1030E01,
+	0xC10306B8
+};
+
 /*
  * The MT8186 calibration data is stored as packed 3-byte little-endian
  * values using a weird layout that makes sense only when viewed as a 32-bit
@@ -1747,11 +1755,11 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
 
 static const struct lvts_data mt7988_lvts_ap_data = {
 	.lvts_ctrl	= mt7988_lvts_ap_data_ctrl,
-	.conn_cmd	= default_conn_cmds,
-	.init_cmd	= default_init_cmds,
+	.conn_cmd	= mt7988_conn_cmds,
+	.init_cmd	= mt7988_init_cmds,
 	.num_lvts_ctrl	= ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
-	.num_conn_cmd	= ARRAY_SIZE(default_conn_cmds),
-	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
+	.num_conn_cmd	= ARRAY_SIZE(mt7988_conn_cmds),
+	.num_init_cmd	= ARRAY_SIZE(mt7988_init_cmds),
 	.temp_factor	= LVTS_COEFF_A_MT7988,
 	.temp_offset	= LVTS_COEFF_B_MT7988,
 	.gt_calib_bit_offset = 24,
-- 
2.45.2

Aw: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Frank Wunderlich]

> Gesendet: Montag, 26. Mai 2025 um 12:26
> Von: "Mason Chang" <mason-cw.chang@mediatek.com>
> Betreff: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands
>
> Add the LVTS commands for Mediatek Filogic 880/MT7988.
> 
> This series fixes severely abnormal and inaccurate LVTS temperature
> readings when using the default commands.
> 
> Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>

Hi

just a friedly reminder for maintainers, is the patch series ok or does it need any changes?

regards Frank

Re: Aw: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Mason Chang]

On Mon, 2025-06-16 at 07:01 +0000, Frank Wunderlich wrote:
> 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> > Gesendet: Montag, 26. Mai 2025 um 12:26
> > Von: "Mason Chang" <mason-cw.chang@mediatek.com>
> > Betreff: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add
> > mt7988 lvts commands
> > 
> > Add the LVTS commands for Mediatek Filogic 880/MT7988.
> > 
> > This series fixes severely abnormal and inaccurate LVTS temperature
> > readings when using the default commands.
> > 
> > Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
> 
> Hi
> 
> just a friedly reminder for maintainers, is the patch series ok or
> does it need any changes?
> 
> regards Frank

Hi all,

I submitted the patch a while ago, but haven't received any response
from the maintainer yet. I would really appreciate it if any maintainer
could take a look or provide some comments.

If there is a more appropriate maintainer or reviewer for this patch,
please kindly let me know or help forward it.

Thank you very much for your time and help!

Sincerely,
Mason

Re: Aw: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Frank Wunderlich]

Hi,

i finally found someone for testing this as it only affects ~2% the mt7988 users:

https://github.com/frank-w/BPI-Router-Images/issues/16#issuecomment-3061976373

so can you please review and add it to mainline?

regards Frank


Am 8. Juli 2025 um 13:56 schrieb "Mason Chang" <mason-cw.chang@mediatek.com>:

> 
> On Mon, 2025-06-16 at 07:01 +0000, Frank Wunderlich wrote:
> 
> > 
> > External email : Please do not click links or open attachments until
> > 
> >  you have verified the sender or the content.
> > 
> >  
> > 
> >  
> > 
> >  Gesendet: Montag, 26. Mai 2025 um 12:26
> > 
> >  Von: "Mason Chang" <mason-cw.chang@mediatek.com>
> > 
> >  Betreff: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add
> > 
> >  mt7988 lvts commands
> > 
> >  
> > 
> >  Add the LVTS commands for Mediatek Filogic 880/MT7988.
> > 
> >  
> > 
> >  This series fixes severely abnormal and inaccurate LVTS temperature
> > 
> >  readings when using the default commands.
> > 
> >  
> > 
> >  Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
> > 
> >  
> > 
> >  Hi
> > 
> >  
> > 
> >  just a friedly reminder for maintainers, is the patch series ok or
> > 
> >  does it need any changes?
> > 
> >  
> > 
> >  regards Frank
> > 
> 
> Hi all,
> 
> I submitted the patch a while ago, but haven't received any response
> 
> from the maintainer yet. I would really appreciate it if any maintainer
> 
> could take a look or provide some comments.
> 
> If there is a more appropriate maintainer or reviewer for this patch,
> 
> please kindly let me know or help forward it.
> 
> Thank you very much for your time and help!
> 
> Sincerely,
> 
> Mason
>

Re: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Daniel Lezcano]

On Mon, May 26, 2025 at 06:26:56PM +0800, Mason Chang wrote:
> Add the LVTS commands for Mediatek Filogic 880/MT7988.
> 
> This series fixes severely abnormal and inaccurate LVTS temperature
> readings when using the default commands.
> 
> Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
> 
> Mason Chang (3):
>   thermal/drivers/mediatek/lvts_thermal: change lvts commands array to
>     static const
>   thermal/drivers/mediatek/lvts_thermal: add lvts commands and their
>     sizes to driver data
>   thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands
> 
>  drivers/thermal/mediatek/lvts_thermal.c | 74 ++++++++++++++++++++-----
>  1 file changed, 61 insertions(+), 13 deletions(-)

Changes applied, thanks

-- 

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Re: [PATCH 0/3] thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands

[Daniel Lezcano]

On Mon, May 26, 2025 at 06:26:56PM +0800, Mason Chang wrote:
> Add the LVTS commands for Mediatek Filogic 880/MT7988.
> 
> This series fixes severely abnormal and inaccurate LVTS temperature
> readings when using the default commands.
> 
> Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
> 
> Mason Chang (3):
>   thermal/drivers/mediatek/lvts_thermal: change lvts commands array to
>     static const
>   thermal/drivers/mediatek/lvts_thermal: add lvts commands and their
>     sizes to driver data
>   thermal/drivers/mediatek/lvts_thermal: add mt7988 lvts commands
> 
>  drivers/thermal/mediatek/lvts_thermal.c | 74 ++++++++++++++++++++-----
>  1 file changed, 61 insertions(+), 13 deletions(-)

Changes applied, thanks

-- 

 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog