From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: "u-boot@lists.denx.de" <u-boot@lists.denx.de>,
"sbabic@denx.de" <sbabic@denx.de>,
"festevam@gmail.com" <festevam@gmail.com>,
"ariel.dalessandro@collabora.com"
<ariel.dalessandro@collabora.com>,
"michael@amarulasolutions.com" <michael@amarulasolutions.com>,
"tharvey@gateworks.com" <tharvey@gateworks.com>,
"sjg@chromium.org" <sjg@chromium.org>,
"marek.behun@nic.cz" <marek.behun@nic.cz>,
"pali@kernel.org" <pali@kernel.org>, "sr@denx.de" <sr@denx.de>,
Ricardo Salveti <ricardo@foundries.io>,
"patrick.delaunay@foss.st.com" <patrick.delaunay@foss.st.com>,
"trini@konsulko.com" <trini@konsulko.com>,
dl-uboot-imx <uboot-imx@nxp.com>
Subject: Re: [PATCH V4 2/8] arm: dts: imx8m: update binman ddr firmware node name
Date: Tue, 24 May 2022 00:11:46 +0300 [thread overview]
Message-ID: <6bf8cbbb-d668-bcee-8373-67ff3932ab3d@gmail.com> (raw)
In-Reply-To: <DU0PR04MB9417DC26640CBAC6B8EB59B688D49@DU0PR04MB9417.eurprd04.prod.outlook.com>
On 23/05/2022 10:01, Peng Fan (OSS) wrote:
>> Subject: Re: [PATCH V4 2/8] arm: dts: imx8m: update binman ddr firmware
>> node name
>>
>> On 20/05/2022 17:10, Peng Fan (OSS) wrote:
>>> From: Peng Fan <peng.fan@nxp.com>
>>>
>>> We are migrating to use BINMAN SYMBOLS, the current name is not a
>>> valid binman type, so update to use blob-ext@[1,2,3,4].
>>>
>>> Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
>>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
>>> ---
>>> arch/arm/dts/imx8mm-u-boot.dtsi | 8 ++++----
>>> arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 4 ++--
>>> arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi | 8 ++++----
>>> arch/arm/dts/imx8mn-venice-u-boot.dtsi | 8 ++++----
>>> arch/arm/dts/imx8mq-u-boot.dtsi | 8 ++++----
>>> 5 files changed, 18 insertions(+), 18 deletions(-)
>>
>> I think descriptive entry names are better in general, so I prefer the old names
>> to a bunch of 'blob-ext's. Symbol resolution is done using the entry names
>> anyway, I don't see why this change would be necessary.
>
> Binman understand blob-ext, it not understand 1d-imem. If keep id-imem, or else,
> need to add several new binman types which I would not prefer.
It would work as long as you set `type = "blob-ext";` in the entry block.
Please test this diff on top of your series:
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 19a2da30f512..8c48678625d9 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -39,25 +39,25 @@
filename = "u-boot-spl.bin";
};
- imem_1d: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
- dmem_1d: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
- imem_2d: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
- dmem_2d: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index 0f89c8f677fa..dc7afc05e8f9 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -143,24 +143,28 @@
align-end = <4>;
};
- blob_1: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
+ type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index 5a52b73d7e9c..dc4cec250efa 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -111,13 +111,13 @@
filename = "u-boot-spl.bin";
};
- imem_1d: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "ddr3_imem_1d.bin";
size = <0x8000>;
type = "blob-ext";
};
- dmem_1d: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "ddr3_dmem_1d.bin";
size = <0x4000>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 6f3d5cfe3c18..3f02b4aac135 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -151,24 +151,28 @@
align-end = <4>;
};
- blob_1: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "ddr4_imem_1d_201810.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d_201810.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "ddr4_imem_2d_201810.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "ddr4_dmem_2d_201810.bin";
align-end = <4>;
+ type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index 4f6dcf307b28..4d55905736d0 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -36,24 +36,28 @@
align-end = <4>;
};
- blob_1: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
+ type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index 32ef79292886..ed1ab10ded37 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -130,25 +130,25 @@
filename = "u-boot-spl.bin";
};
- blob_1: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "ddr4_imem_1d.bin";
align-end = <4>;
type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d.bin";
align-end = <4>;
type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "ddr4_imem_2d.bin";
align-end = <4>;
type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "ddr4_dmem_2d.bin";
align-end = <4>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index 03a9eb8516f9..6d6535fdbfeb 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -122,25 +122,25 @@
filename = "u-boot-spl.bin";
};
- imem_1d: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
- dmem_1d: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
- imem_2d: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
- dmem_2d: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 274515a010ee..6fd4de2c9615 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -61,24 +61,28 @@
align-end = <4>;
};
- blob_1: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem_202006.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem_202006.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
align-end = <4>;
+ type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
index 1b66e76ee1dc..81063083bd40 100644
--- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
@@ -20,24 +20,28 @@
align-end = <4>;
};
- blob_1: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_2: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_3: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
+ type = "blob-ext";
};
- blob_4: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
+ type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index e683e9184725..000ee545ee7f 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -22,25 +22,25 @@
filename = "u-boot-spl.bin";
};
- imem_1d: blob-ext@1 {
+ ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
- dmem_1d: blob-ext@2 {
+ ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin";
align-end = <4>;
type = "blob-ext";
};
- imem_2d: blob-ext@3 {
+ ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin";
align-end = <4>;
type = "blob-ext";
};
- dmem_2d: blob-ext@4 {
+ ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin";
align-end = <4>;
type = "blob-ext";
diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c
index b3bd57531b76..3764cffabc90 100644
--- a/drivers/ddr/imx/imx8m/helper.c
+++ b/drivers/ddr/imx/imx8m/helper.c
@@ -26,18 +26,18 @@ DECLARE_GLOBAL_DATA_PTR;
#define DMEM_OFFSET_ADDR 0x00054000
#define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
-binman_sym_declare(ulong, blob_ext_1, image_pos);
-binman_sym_declare(ulong, blob_ext_1, size);
+binman_sym_declare(ulong, ddr_1d_imem_fw, image_pos);
+binman_sym_declare(ulong, ddr_1d_imem_fw, size);
-binman_sym_declare(ulong, blob_ext_2, image_pos);
-binman_sym_declare(ulong, blob_ext_2, size);
+binman_sym_declare(ulong, ddr_1d_dmem_fw, image_pos);
+binman_sym_declare(ulong, ddr_1d_dmem_fw, size);
#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
-binman_sym_declare(ulong, blob_ext_3, image_pos);
-binman_sym_declare(ulong, blob_ext_3, size);
+binman_sym_declare(ulong, ddr_2d_imem_fw, image_pos);
+binman_sym_declare(ulong, ddr_2d_imem_fw, size);
-binman_sym_declare(ulong, blob_ext_4, image_pos);
-binman_sym_declare(ulong, blob_ext_4, size);
+binman_sym_declare(ulong, ddr_2d_dmem_fw, image_pos);
+binman_sym_declare(ulong, ddr_2d_dmem_fw, size);
#endif
/* We need PHY iMEM PHY is 32KB padded */
@@ -59,27 +59,27 @@ void ddr_load_train_firmware(enum fw_type type)
}
#endif
+ dmem_start = imem_start + imem_len;
+
if (CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) {
switch (type) {
case FW_1D_IMAGE:
- imem_start = binman_sym(ulong, blob_ext_1, image_pos);
- imem_len = binman_sym(ulong, blob_ext_1, size);
- dmem_start = binman_sym(ulong, blob_ext_2, image_pos);
- dmem_len = binman_sym(ulong, blob_ext_2, size);
+ imem_start = binman_sym(ulong, ddr_1d_imem_fw, image_pos);
+ imem_len = binman_sym(ulong, ddr_1d_imem_fw, size);
+ dmem_start = binman_sym(ulong, ddr_1d_dmem_fw, image_pos);
+ dmem_len = binman_sym(ulong, ddr_1d_dmem_fw, size);
break;
case FW_2D_IMAGE:
#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
- imem_start = binman_sym(ulong, blob_ext_3, image_pos);
- imem_len = binman_sym(ulong, blob_ext_3, size);
- dmem_start = binman_sym(ulong, blob_ext_4, image_pos);
- dmem_len = binman_sym(ulong, blob_ext_4, size);
+ imem_start = binman_sym(ulong, ddr_1d_dmem_fw, image_pos);
+ imem_len = binman_sym(ulong, ddr_1d_dmem_fw, size);
+ dmem_start = binman_sym(ulong, ddr_2d_dmem_fw, image_pos);
+ dmem_len = binman_sym(ulong, ddr_2d_dmem_fw, size);
#endif
break;
}
}
- dmem_start = imem_start + imem_len;
-
pr_from32 = imem_start;
pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR;
for (i = 0x0; i < imem_len; ) {
diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py
index e3f362b442b8..bd67238b9199 100644
--- a/tools/binman/etype/section.py
+++ b/tools/binman/etype/section.py
@@ -875,7 +875,7 @@ def _CollectEntries(self, entries, entries_by_name, add_entry):
entries[entry.GetPath()] = entry
for entry in to_add.values():
self._CollectEntries(entries, entries_by_name, entry)
- entries_by_name[add_entry.name.replace('@', '-')] = add_entry
+ entries_by_name[add_entry.name] = add_entry
def MissingArgs(self, entry, missing):
"""Report a missing argument, if enabled
next prev parent reply other threads:[~2022-05-23 21:13 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 14:10 [PATCH V4 0/8] arm64: binman: use binman symbols for imx Peng Fan (OSS)
2022-05-20 14:10 ` [PATCH V4 1/8] spl: guard u_boot_any with X86 Peng Fan (OSS)
2022-05-20 15:21 ` Tom Rini
2022-05-21 8:33 ` Peng Fan
2022-05-21 12:05 ` Tom Rini
2022-05-22 13:56 ` Alper Nebi Yasak
2022-05-22 14:50 ` Tom Rini
2022-05-23 21:10 ` Alper Nebi Yasak
2022-05-23 6:19 ` Peng Fan (OSS)
2022-05-23 6:28 ` Peng Fan (OSS)
2022-05-23 14:10 ` Tom Rini
2022-05-23 21:10 ` Alper Nebi Yasak
2022-05-22 13:55 ` Alper Nebi Yasak
2022-05-20 14:10 ` [PATCH V4 2/8] arm: dts: imx8m: update binman ddr firmware node name Peng Fan (OSS)
2022-05-22 13:56 ` Alper Nebi Yasak
2022-05-23 7:01 ` Peng Fan (OSS)
2022-05-23 21:11 ` Alper Nebi Yasak [this message]
2022-05-20 14:10 ` [PATCH V4 3/8] imx: imx8mm-icore: migrate to use BINMAN Peng Fan (OSS)
2022-05-22 13:56 ` Alper Nebi Yasak
2022-05-23 7:02 ` Peng Fan (OSS)
2022-05-20 14:10 ` [PATCH V4 4/8] armv8: u-boot-spl.lds: mark __image_copy_start as symbol Peng Fan (OSS)
2022-05-20 15:21 ` Tom Rini
2022-05-20 14:10 ` [PATCH V4 5/8] tools: binman: section: replace @ with - Peng Fan (OSS)
2022-05-22 13:57 ` Alper Nebi Yasak
2022-05-23 7:05 ` Peng Fan (OSS)
2022-05-20 14:10 ` [PATCH V4 6/8] ddr: imx8m: helper: load ddr firmware according to binman symbols Peng Fan (OSS)
2022-05-22 13:57 ` Alper Nebi Yasak
2022-05-23 7:08 ` Peng Fan (OSS)
2022-05-20 14:10 ` [PATCH V4 7/8] arm: dts: imx8m: shrink ddr firmware size to actual file size Peng Fan (OSS)
2022-05-23 21:12 ` Alper Nebi Yasak
2022-05-24 5:50 ` Michael Nazzareno Trimarchi
2022-05-20 14:10 ` [PATCH V4 8/8] binman_sym: guard with CONFIG_SPL_BINMAN_SYMBOLS Peng Fan (OSS)
2022-05-22 13:57 ` Alper Nebi Yasak
2022-05-23 7:10 ` Peng Fan (OSS)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=6bf8cbbb-d668-bcee-8373-67ff3932ab3d@gmail.com \
--to=alpernebiyasak@gmail.com \
--cc=ariel.dalessandro@collabora.com \
--cc=festevam@gmail.com \
--cc=marek.behun@nic.cz \
--cc=michael@amarulasolutions.com \
--cc=pali@kernel.org \
--cc=patrick.delaunay@foss.st.com \
--cc=peng.fan@oss.nxp.com \
--cc=ricardo@foundries.io \
--cc=sbabic@denx.de \
--cc=sjg@chromium.org \
--cc=sr@denx.de \
--cc=tharvey@gateworks.com \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
--cc=uboot-imx@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.