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From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Ivan Vecera <ivecera@redhat.com>, netdev@vger.kernel.org
Cc: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Jakub Kicinski <kuba@kernel.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net] dpll: fix clock quality level reporting
Date: Fri, 12 Sep 2025 20:37:55 +0100	[thread overview]
Message-ID: <6c98a19e-473a-4935-a3aa-51c53618b2a9@linux.dev> (raw)
In-Reply-To: <20250912093331.862333-1-ivecera@redhat.com>

On 12.09.2025 10:33, Ivan Vecera wrote:
> The DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRC is not reported via netlink
> due to bug in dpll_msg_add_clock_quality_level(). The usage of
> DPLL_CLOCK_QUALITY_LEVEL_MAX for both DECLARE_BITMAP() and
> for_each_set_bit() is not correct because these macros requires bitmap
> size and not the highest valid bit in the bitmap.
> 
> Use correct bitmap size to fix this issue.
> 
> Fixes: a1afb959add1 ("dpll: add clock quality level attribute and op")
> Signed-off-by: Ivan Vecera <ivecera@redhat.com>
> ---
>   drivers/dpll/dpll_netlink.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
> index 036f21cac0a9..0a852011653c 100644
> --- a/drivers/dpll/dpll_netlink.c
> +++ b/drivers/dpll/dpll_netlink.c
> @@ -211,8 +211,8 @@ static int
>   dpll_msg_add_clock_quality_level(struct sk_buff *msg, struct dpll_device *dpll,
>   				 struct netlink_ext_ack *extack)
>   {
> +	DECLARE_BITMAP(qls, DPLL_CLOCK_QUALITY_LEVEL_MAX + 1) = { 0 };
>   	const struct dpll_device_ops *ops = dpll_device_ops(dpll);
> -	DECLARE_BITMAP(qls, DPLL_CLOCK_QUALITY_LEVEL_MAX) = { 0 };

I believe __DPLL_CLOCK_QUALITY_LEVEL_MAX should be used in both places

>   	enum dpll_clock_quality_level ql;
>   	int ret;
>   
> @@ -221,7 +221,7 @@ dpll_msg_add_clock_quality_level(struct sk_buff *msg, struct dpll_device *dpll,
>   	ret = ops->clock_quality_level_get(dpll, dpll_priv(dpll), qls, extack);
>   	if (ret)
>   		return ret;
> -	for_each_set_bit(ql, qls, DPLL_CLOCK_QUALITY_LEVEL_MAX)
> +	for_each_set_bit(ql, qls, DPLL_CLOCK_QUALITY_LEVEL_MAX + 1)
>   		if (nla_put_u32(msg, DPLL_A_CLOCK_QUALITY_LEVEL, ql))
>   			return -EMSGSIZE;
>   


  parent reply	other threads:[~2025-09-12 19:37 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-12  9:33 [PATCH net] dpll: fix clock quality level reporting Ivan Vecera
2025-09-12 10:51 ` Kubalewski, Arkadiusz
2025-09-12 19:37 ` Vadim Fedorenko [this message]
2025-09-13 11:09   ` Ivan Vecera
2025-09-14 20:03     ` Jakub Kicinski
2025-09-14 20:10 ` patchwork-bot+netdevbpf

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