Re: [PATCH v3 5/5] i3c: dw: Add quirk to address OD/PP timing issue on AMD platform

From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
To: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Sanket.Goswami@amd.com, linux-i3c@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 5/5] i3c: dw: Add quirk to address OD/PP timing issue on AMD platform
Date: Thu, 14 Nov 2024 10:01:35 +0200	[thread overview]
Message-ID: <6d3f1fd0-1ead-4a01-bb2d-8482f8c1799f@linux.intel.com> (raw)
In-Reply-To: <20241108073323.523805-6-Shyam-sundar.S-k@amd.com>

On 11/8/24 9:33 AM, Shyam Sundar S K wrote:
> The AMD Legacy I3C is having a problem with its IP, specifically with the
> push-pull and open-drain pull-up registers. These registers need to be
> manually programmed for every CCC submission to align with the duty cycle.
> Therefore, add a quirk to address this issue.
> 
> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
>   drivers/i3c/master/dw-i3c-master.c | 29 ++++++++++++++++++++++++++++-
>   drivers/i3c/master/dw-i3c-master.h |  1 +
>   2 files changed, 29 insertions(+), 1 deletion(-)
> 
Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

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