All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jiping Ma <Jiping.Ma2@windriver.com>
To: Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: zhe.he@windriver.com, bruce.ashfield@gmail.com,
	yue.tao@windriver.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, paul.gortmaker@windriver.com,
	catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH][V3] arm64: perf: Get the wrong PC value in REGS_ABI_32 mode
Date: Wed, 27 May 2020 09:30:01 +0800	[thread overview]
Message-ID: <6ed68001-522c-14f6-d162-e68da4c10e43@windriver.com> (raw)
In-Reply-To: <20200526195419.GB2206@willie-the-truck>



On 05/27/2020 03:54 AM, Will Deacon wrote:
> On Tue, May 26, 2020 at 11:26:11AM +0100, Mark Rutland wrote:
>> On Mon, May 11, 2020 at 10:52:07AM +0800, Jiping Ma wrote:
>>> Modified the patch subject and the change description.
>>>
>>> PC value is get from regs[15] in REGS_ABI_32 mode, but correct PC
>>> is regs->pc(regs[PERF_REG_ARM64_PC]) in arm64 kernel, which caused
>>> that perf can not parser the backtrace of app with dwarf mode in the
>>> 32bit system and 64bit kernel.
>>>
>>> Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
>> Thanks for this.
>>
>>
>>> ---
>>>   arch/arm64/kernel/perf_regs.c | 4 ++++
>>>   1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c
>>> index 0bbac61..0ef2880 100644
>>> --- a/arch/arm64/kernel/perf_regs.c
>>> +++ b/arch/arm64/kernel/perf_regs.c
>>> @@ -32,6 +32,10 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
>>>   	if ((u32)idx == PERF_REG_ARM64_PC)
>>>   		return regs->pc;
>>>   
>>> +	if (perf_reg_abi(current) == PERF_SAMPLE_REGS_ABI_32
>>> +		&& idx == 15)
>>> +		return regs->pc;
>> I think there are some more issues here, and we may need a more
>> substantial rework. For a compat thread, we always expose
>> PERF_SAMPLE_REGS_ABI_32 via per_reg_abi(), but for some reason
>> perf_reg_value() also munges the compat SP/LR into their ARM64
>> equivalents, which don't exist in the 32-bit sample ABI. We also don't
>> zero the regs that don't exist in 32-bit (including the aliasing PC).
> I think this was for the case where you have a 64-bit perf profiling a
> 32-bit task, and it was passing the registers off to libunwind. Won't that
> break if we follow your suggestion?
Yes, it is for 64-bit perf profiling a 32-bit task, not for a compat thread.

>
> Will
>


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Jiping Ma <Jiping.Ma2@windriver.com>
To: Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: zhe.he@windriver.com, bruce.ashfield@gmail.com,
	yue.tao@windriver.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, paul.gortmaker@windriver.com,
	catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH][V3] arm64: perf: Get the wrong PC value in REGS_ABI_32 mode
Date: Wed, 27 May 2020 09:30:01 +0800	[thread overview]
Message-ID: <6ed68001-522c-14f6-d162-e68da4c10e43@windriver.com> (raw)
In-Reply-To: <20200526195419.GB2206@willie-the-truck>



On 05/27/2020 03:54 AM, Will Deacon wrote:
> On Tue, May 26, 2020 at 11:26:11AM +0100, Mark Rutland wrote:
>> On Mon, May 11, 2020 at 10:52:07AM +0800, Jiping Ma wrote:
>>> Modified the patch subject and the change description.
>>>
>>> PC value is get from regs[15] in REGS_ABI_32 mode, but correct PC
>>> is regs->pc(regs[PERF_REG_ARM64_PC]) in arm64 kernel, which caused
>>> that perf can not parser the backtrace of app with dwarf mode in the
>>> 32bit system and 64bit kernel.
>>>
>>> Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
>> Thanks for this.
>>
>>
>>> ---
>>>   arch/arm64/kernel/perf_regs.c | 4 ++++
>>>   1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c
>>> index 0bbac61..0ef2880 100644
>>> --- a/arch/arm64/kernel/perf_regs.c
>>> +++ b/arch/arm64/kernel/perf_regs.c
>>> @@ -32,6 +32,10 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
>>>   	if ((u32)idx == PERF_REG_ARM64_PC)
>>>   		return regs->pc;
>>>   
>>> +	if (perf_reg_abi(current) == PERF_SAMPLE_REGS_ABI_32
>>> +		&& idx == 15)
>>> +		return regs->pc;
>> I think there are some more issues here, and we may need a more
>> substantial rework. For a compat thread, we always expose
>> PERF_SAMPLE_REGS_ABI_32 via per_reg_abi(), but for some reason
>> perf_reg_value() also munges the compat SP/LR into their ARM64
>> equivalents, which don't exist in the 32-bit sample ABI. We also don't
>> zero the regs that don't exist in 32-bit (including the aliasing PC).
> I think this was for the case where you have a 64-bit perf profiling a
> 32-bit task, and it was passing the registers off to libunwind. Won't that
> break if we follow your suggestion?
Yes, it is for 64-bit perf profiling a 32-bit task, not for a compat thread.

>
> Will
>


  reply	other threads:[~2020-05-27  1:30 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-11  2:52 [PATCH][V3] arm64: perf: Get the wrong PC value in REGS_ABI_32 mode Jiping Ma
2020-05-26  2:46 ` Jiping Ma
2020-05-26  2:46   ` Jiping Ma
2020-05-26 10:26 ` Mark Rutland
2020-05-26 10:26   ` Mark Rutland
2020-05-26 19:54   ` Will Deacon
2020-05-26 19:54     ` Will Deacon
2020-05-27  1:30     ` Jiping Ma [this message]
2020-05-27  1:30       ` Jiping Ma
2020-05-27 15:03     ` Mark Rutland
2020-05-27 15:03       ` Mark Rutland
2020-05-27  1:33   ` Jiping Ma
2020-05-27  1:33     ` Jiping Ma
2020-05-27 15:19     ` Mark Rutland
2020-05-27 15:19       ` Mark Rutland
2020-05-28  1:06       ` Jiping Ma
2020-05-28  1:06         ` Jiping Ma
2020-05-28  7:54         ` Will Deacon
2020-05-28  7:54           ` Will Deacon
2020-05-29  5:57           ` Jiping Ma
2020-05-29  5:57             ` Jiping Ma
2020-06-18 13:03           ` Mark Rutland
2020-06-18 13:03             ` Mark Rutland
2020-06-23 17:19             ` Will Deacon
2020-06-23 17:19               ` Will Deacon
2020-06-23 17:44               ` Will Deacon
2020-06-23 17:44                 ` Will Deacon
2020-06-25 12:54                 ` Mark Rutland
2020-06-25 12:54                   ` Mark Rutland

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6ed68001-522c-14f6-d162-e68da4c10e43@windriver.com \
    --to=jiping.ma2@windriver.com \
    --cc=bruce.ashfield@gmail.com \
    --cc=catalin.marinas@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=paul.gortmaker@windriver.com \
    --cc=will.deacon@arm.com \
    --cc=will@kernel.org \
    --cc=yue.tao@windriver.com \
    --cc=zhe.he@windriver.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.