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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Sergiu Moga <sergiu.moga@microchip.com>
Cc: lee@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, nicolas.ferre@microchip.com,
	alexandre.belloni@bootlin.com, claudiu.beznea@microchip.com,
	richard.genoud@gmail.com, radu_nicolae.pirea@upb.ro,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	broonie@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	Jiri Slaby <jirislaby@kernel.org>,
	admin@hifiphile.com, kavyasree.kotagiri@microchip.com,
	tudor.ambarus@microchip.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	LKML <linux-kernel@vger.kernel.org>,
	linux-spi@vger.kernel.org,
	linux-serial <linux-serial@vger.kernel.org>,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 10/13] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
Date: Wed, 7 Sep 2022 12:23:55 +0300 (EEST)	[thread overview]
Message-ID: <6f7b4eb6-678a-dd4d-4927-31ae309ca49f@linux.intel.com> (raw)
In-Reply-To: <20220906135511.144725-11-sergiu.moga@microchip.com>

On Tue, 6 Sep 2022, Sergiu Moga wrote:

> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
> 
> 
> 
> 
>  drivers/tty/serial/atmel_serial.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index 7450d3853031..6aa01ca5489c 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -150,6 +150,7 @@ struct atmel_uart_port {
>  	u32			rts_low;
>  	bool			ms_irq_enabled;
>  	u32			rtor;	/* address of receiver timeout register if it exists */
> +	bool			is_usart;
>  	bool			has_frac_baudrate;
>  	bool			has_hw_timer;
>  	struct timer_list	uart_timer;
> @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port)
>  	 */
>  	atmel_port->has_frac_baudrate = false;
>  	atmel_port->has_hw_timer = false;
> +	atmel_port->is_usart = false;
>  
>  	if (name == new_uart) {
>  		dev_dbg(port->dev, "Uart with hw timer");
> @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port)
>  		dev_dbg(port->dev, "Usart\n");
>  		atmel_port->has_frac_baudrate = true;
>  		atmel_port->has_hw_timer = true;
> +		atmel_port->is_usart = true;
>  		atmel_port->rtor = ATMEL_US_RTOR;
>  		version = atmel_uart_readl(port, ATMEL_US_VERSION);
>  		switch (version) {
> @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port)
>  			dev_dbg(port->dev, "This version is usart\n");
>  			atmel_port->has_frac_baudrate = true;
>  			atmel_port->has_hw_timer = true;
> +			atmel_port->is_usart = true;
>  			atmel_port->rtor = ATMEL_US_RTOR;
>  			break;
>  		case 0x203:
> @@ -2282,10 +2286,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
>  		cd = uart_get_divisor(port, baud);
>  	}
>  
> -	if (cd > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
> +	/*
> +	 * BRGR is 16-bit, so switch to slower clock.
> +	 * Otherwise, keep the highest possible value for the clock divisor.
> +	 */
> +	if (atmel_port->is_usart && cd > 65535) {

Should this be cd > ATMEL_US_CD ?

>  		cd /= 8;
>  		mode |= ATMEL_US_USCLKS_MCK_DIV8;
> +	} else {
> +		cd &= 65535;

ATMEL_US_CD?

>  	}
> +
>  	quot = cd | fp << ATMEL_US_FP_OFFSET;
>  
>  	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
> 

-- 
 i.


WARNING: multiple messages have this Message-ID (diff)
From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Sergiu Moga <sergiu.moga@microchip.com>
Cc: alexandre.belloni@bootlin.com, mturquette@baylibre.com,
	LKML <linux-kernel@vger.kernel.org>,
	admin@hifiphile.com, krzysztof.kozlowski+dt@linaro.org,
	Jiri Slaby <jirislaby@kernel.org>,
	linux-clk@vger.kernel.org, lee@kernel.org,
	linux-serial <linux-serial@vger.kernel.org>,
	devicetree@vger.kernel.org, tudor.ambarus@microchip.com,
	radu_nicolae.pirea@upb.ro, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, richard.genoud@gmail.com,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-spi@vger.kernel.org, sboyd@kernel.org, broonie@kernel.org,
	kavyasree.kotagiri@microchip.com, claudiu.beznea@microchip.com
Subject: Re: [PATCH v2 10/13] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
Date: Wed, 7 Sep 2022 12:23:55 +0300 (EEST)	[thread overview]
Message-ID: <6f7b4eb6-678a-dd4d-4927-31ae309ca49f@linux.intel.com> (raw)
In-Reply-To: <20220906135511.144725-11-sergiu.moga@microchip.com>

On Tue, 6 Sep 2022, Sergiu Moga wrote:

> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
> 
> 
> 
> 
>  drivers/tty/serial/atmel_serial.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index 7450d3853031..6aa01ca5489c 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -150,6 +150,7 @@ struct atmel_uart_port {
>  	u32			rts_low;
>  	bool			ms_irq_enabled;
>  	u32			rtor;	/* address of receiver timeout register if it exists */
> +	bool			is_usart;
>  	bool			has_frac_baudrate;
>  	bool			has_hw_timer;
>  	struct timer_list	uart_timer;
> @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port)
>  	 */
>  	atmel_port->has_frac_baudrate = false;
>  	atmel_port->has_hw_timer = false;
> +	atmel_port->is_usart = false;
>  
>  	if (name == new_uart) {
>  		dev_dbg(port->dev, "Uart with hw timer");
> @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port)
>  		dev_dbg(port->dev, "Usart\n");
>  		atmel_port->has_frac_baudrate = true;
>  		atmel_port->has_hw_timer = true;
> +		atmel_port->is_usart = true;
>  		atmel_port->rtor = ATMEL_US_RTOR;
>  		version = atmel_uart_readl(port, ATMEL_US_VERSION);
>  		switch (version) {
> @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port)
>  			dev_dbg(port->dev, "This version is usart\n");
>  			atmel_port->has_frac_baudrate = true;
>  			atmel_port->has_hw_timer = true;
> +			atmel_port->is_usart = true;
>  			atmel_port->rtor = ATMEL_US_RTOR;
>  			break;
>  		case 0x203:
> @@ -2282,10 +2286,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
>  		cd = uart_get_divisor(port, baud);
>  	}
>  
> -	if (cd > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
> +	/*
> +	 * BRGR is 16-bit, so switch to slower clock.
> +	 * Otherwise, keep the highest possible value for the clock divisor.
> +	 */
> +	if (atmel_port->is_usart && cd > 65535) {

Should this be cd > ATMEL_US_CD ?

>  		cd /= 8;
>  		mode |= ATMEL_US_USCLKS_MCK_DIV8;
> +	} else {
> +		cd &= 65535;

ATMEL_US_CD?

>  	}
> +
>  	quot = cd | fp << ATMEL_US_FP_OFFSET;
>  
>  	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
> 

-- 
 i.


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-09-07  9:24 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-06 13:54 [PATCH v2 00/13] Make atmel serial driver aware of GCLK Sergiu Moga
2022-09-06 13:54 ` Sergiu Moga
2022-09-06 13:55 ` [PATCH v2 01/13] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-06 15:12   ` Mark Brown
2022-09-06 15:12     ` Mark Brown
2022-09-06 21:41   ` Rob Herring
2022-09-06 21:41     ` Rob Herring
2022-09-07  7:54     ` Sergiu.Moga
2022-09-07  7:54       ` Sergiu.Moga
2022-09-08 12:23   ` Krzysztof Kozlowski
2022-09-08 12:23     ` Krzysztof Kozlowski
2022-09-06 13:55 ` [PATCH v2 02/13] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-06 13:55 ` [PATCH v2 03/13] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-08 12:23   ` Krzysztof Kozlowski
2022-09-08 12:23     ` Krzysztof Kozlowski
2022-09-06 13:55 ` [PATCH v2 04/13] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-06 13:55 ` [PATCH v2 05/13] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-08 12:29   ` Krzysztof Kozlowski
2022-09-08 12:29     ` Krzysztof Kozlowski
2022-09-08 15:06     ` Sergiu.Moga
2022-09-08 15:06       ` Sergiu.Moga
2022-09-08 15:10       ` Krzysztof Kozlowski
2022-09-08 15:10         ` Krzysztof Kozlowski
2022-09-08 15:27         ` Sergiu.Moga
2022-09-08 15:27           ` Sergiu.Moga
2022-09-08 16:05           ` Krzysztof Kozlowski
2022-09-08 16:05             ` Krzysztof Kozlowski
2022-09-06 13:55 ` [PATCH v2 06/13] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9x60 Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-08 12:30   ` Krzysztof Kozlowski
2022-09-08 12:30     ` Krzysztof Kozlowski
2022-09-08 15:15     ` Sergiu.Moga
2022-09-08 15:15       ` Sergiu.Moga
2022-09-09  1:36       ` Rob Herring
2022-09-09  1:36         ` Rob Herring
2022-09-12  7:45         ` Sergiu.Moga
2022-09-12  7:45           ` Sergiu.Moga
2022-09-12 10:44           ` Krzysztof Kozlowski
2022-09-12 10:44             ` Krzysztof Kozlowski
2022-09-12 13:09             ` Sergiu.Moga
2022-09-12 13:09               ` Sergiu.Moga
2022-09-13  8:58               ` Krzysztof Kozlowski
2022-09-13  8:58                 ` Krzysztof Kozlowski
2022-09-13  9:19                 ` Sergiu.Moga
2022-09-13  9:19                   ` Sergiu.Moga
2022-09-13  9:30                   ` Krzysztof Kozlowski
2022-09-13  9:30                     ` Krzysztof Kozlowski
2022-09-13  9:35                     ` Sergiu.Moga
2022-09-13  9:35                       ` Sergiu.Moga
2022-09-06 13:55 ` [PATCH v2 07/13] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-08 12:33   ` Krzysztof Kozlowski
2022-09-08 12:33     ` Krzysztof Kozlowski
2022-09-06 13:55 ` [PATCH v2 08/13] tty: serial: atmel: Define GCLK as USART baudrate source clock Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-07  9:21   ` Ilpo Järvinen
2022-09-07  9:21     ` Ilpo Järvinen
2022-09-07  9:37     ` Sergiu.Moga
2022-09-07  9:37       ` Sergiu.Moga
2022-09-06 13:55 ` [PATCH v2 09/13] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-07  9:24   ` Ilpo Järvinen
2022-09-07  9:24     ` Ilpo Järvinen
2022-09-06 13:55 ` [PATCH v2 10/13] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-07  9:23   ` Ilpo Järvinen [this message]
2022-09-07  9:23     ` Ilpo Järvinen
2022-09-07  9:34     ` Sergiu.Moga
2022-09-07  9:34       ` Sergiu.Moga
2022-09-06 13:55 ` [PATCH v2 11/13] clk: at91: sama5d2: Add Generic Clocks for UART/USART Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-06 13:55 ` [PATCH v2 12/13] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-07  9:36   ` Ilpo Järvinen
2022-09-07  9:36     ` Ilpo Järvinen
2022-09-07 11:11     ` Sergiu.Moga
2022-09-07 11:11       ` Sergiu.Moga
2022-09-07 11:29       ` Ilpo Järvinen
2022-09-07 11:29         ` Ilpo Järvinen
2022-09-12  8:06   ` Claudiu.Beznea
2022-09-12  8:06     ` Claudiu.Beznea
2022-09-06 13:55 ` [PATCH v2 13/13] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga
2022-09-06 13:55   ` Sergiu Moga
2022-09-08 12:35   ` Krzysztof Kozlowski
2022-09-08 12:35     ` Krzysztof Kozlowski
2022-09-08 15:33     ` Sergiu.Moga
2022-09-08 15:33       ` Sergiu.Moga

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