From: "Christian König" <christian.koenig@amd.com>
To: Alex Deucher <alexander.deucher@amd.com>,
amd-gfx@lists.freedesktop.org, sasundar@amd.com
Subject: Re: [PATCH 06/33] drm/amdgpu: clean up jpeg reset functions
Date: Mon, 14 Jul 2025 15:36:11 +0200 [thread overview]
Message-ID: <6f876bd4-6b5e-448f-b2ef-bc7cc78a3f69@amd.com> (raw)
In-Reply-To: <20250711224024.410506-7-alexander.deucher@amd.com>
On 12.07.25 00:39, Alex Deucher wrote:
> Make them consistent and use the reset flags.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
I'm not very keen on spreading amdgpu_sriov_vf() around everywere.
But for now Acked-by: Christian König <christian.koenig@amd.com> for patches #6 and #7.
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 6 +++++-
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 6 +++++-
> drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 6 +++++-
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 7 ++++---
> 4 files changed, 19 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> index 5ba1c5ad9a5e1..0b56cb67e8f1d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> @@ -118,7 +118,8 @@ static int jpeg_v2_0_sw_init(struct amdgpu_ip_block *ip_block)
> if (r)
> return r;
>
> - adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> + if (!amdgpu_sriov_vf(adev))
> + adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
>
> return r;
> @@ -770,6 +771,9 @@ static int jpeg_v2_0_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> + if (!(ring->adev->jpeg.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> + return -EOPNOTSUPP;
> +
> drm_sched_wqueue_stop(&ring->sched);
> r = jpeg_v2_0_stop(ring->adev);
> if (r)
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> index 5be9cdcae32c1..3d0e61f9f2854 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> @@ -167,7 +167,8 @@ static int jpeg_v2_5_sw_init(struct amdgpu_ip_block *ip_block)
> if (r)
> return r;
>
> - adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> + if (!amdgpu_sriov_vf(adev))
> + adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
>
> return r;
> @@ -649,6 +650,9 @@ static int jpeg_v2_5_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> + if (!(ring->adev->jpeg.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> + return -EOPNOTSUPP;
> +
> drm_sched_wqueue_stop(&ring->sched);
> jpeg_v2_5_stop_inst(ring->adev, ring->me);
> jpeg_v2_5_start_inst(ring->adev, ring->me);
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> index 5428930eafa3e..5d54c882d889c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> @@ -132,7 +132,8 @@ static int jpeg_v3_0_sw_init(struct amdgpu_ip_block *ip_block)
> if (r)
> return r;
>
> - adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> + if (!amdgpu_sriov_vf(adev))
> + adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
>
> return r;
> @@ -561,6 +562,9 @@ static int jpeg_v3_0_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> + if (!(ring->adev->jpeg.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> + return -EOPNOTSUPP;
> +
> drm_sched_wqueue_stop(&ring->sched);
> r = jpeg_v3_0_stop(ring->adev);
> if (r)
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> index 78fe1924f3cb7..5485e983a089f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> @@ -143,7 +143,8 @@ static int jpeg_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
> if (r)
> return r;
>
> - adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> + if (!amdgpu_sriov_vf(adev))
> + adev->jpeg.supported_reset = AMDGPU_RESET_TYPE_PER_QUEUE;
> r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
>
> return r;
> @@ -726,8 +727,8 @@ static int jpeg_v4_0_ring_reset(struct amdgpu_ring *ring,
> {
> int r;
>
> - if (amdgpu_sriov_vf(ring->adev))
> - return -EINVAL;
> + if (!(ring->adev->jpeg.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
> + return -EOPNOTSUPP;
>
> drm_sched_wqueue_stop(&ring->sched);
> r = jpeg_v4_0_stop(ring->adev);
next prev parent reply other threads:[~2025-07-14 13:36 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-11 22:39 [PATCH V15 00/33] Reset improvements Alex Deucher
2025-07-11 22:39 ` [PATCH 01/33] drm/amdgpu: clean up sdma reset functions Alex Deucher
2025-07-14 13:27 ` Christian König
2025-07-14 14:00 ` Lazar, Lijo
2025-07-15 13:33 ` Alex Deucher
2025-07-11 22:39 ` [PATCH 02/33] drm/amdgpu/jpeg2: add additional ring reset error checking Alex Deucher
2025-07-14 2:58 ` Sundararaju, Sathishkumar
2025-07-14 13:29 ` Christian König
2025-07-11 22:39 ` [PATCH 03/33] drm/amdgpu/jpeg3: " Alex Deucher
2025-07-14 3:00 ` Sundararaju, Sathishkumar
2025-07-11 22:39 ` [PATCH 04/33] drm/amdgpu/jpeg4: " Alex Deucher
2025-07-14 3:02 ` Sundararaju, Sathishkumar
2025-07-11 22:39 ` [PATCH 05/33] drm/amdgpu/vcn: don't enable per queue resets on SR-IOV Alex Deucher
2025-07-14 13:30 ` Christian König
2025-07-11 22:39 ` [PATCH 06/33] drm/amdgpu: clean up jpeg reset functions Alex Deucher
2025-07-14 3:24 ` Sundararaju, Sathishkumar
2025-07-14 13:36 ` Christian König [this message]
2025-07-11 22:39 ` [PATCH 07/33] drm/amdgpu: clean up GC " Alex Deucher
2025-07-11 22:39 ` [PATCH 08/33] drm/amdgpu: track ring state associated with a fence Alex Deucher
2025-07-14 14:02 ` Christian König
2025-07-11 22:40 ` [PATCH 09/33] drm/amdgpu/gfx9: re-emit unprocessed state on kcq reset Alex Deucher
2025-07-11 22:40 ` [PATCH 10/33] drm/amdgpu/gfx9.4.3: " Alex Deucher
2025-07-15 16:12 ` Alex Deucher
2025-07-16 2:46 ` Zhang, Jesse(Jie)
2025-07-16 8:44 ` Christian König
2025-07-11 22:40 ` [PATCH 11/33] drm/amdgpu/gfx10: re-emit unprocessed state on ring reset Alex Deucher
2025-07-11 22:40 ` [PATCH 12/33] drm/amdgpu/gfx11: " Alex Deucher
2025-07-11 22:40 ` [PATCH 13/33] drm/amdgpu/gfx12: " Alex Deucher
2025-07-11 22:40 ` [PATCH 14/33] drm/amdgpu/sdma5: " Alex Deucher
2025-07-11 22:40 ` [PATCH 15/33] drm/amdgpu/sdma5.2: " Alex Deucher
2025-07-11 22:40 ` [PATCH 16/33] drm/amdgpu/sdma6: " Alex Deucher
2025-07-11 22:40 ` [PATCH 17/33] drm/amdgpu/sdma7: " Alex Deucher
2025-07-11 22:40 ` [PATCH 18/33] drm/amdgpu/jpeg2: " Alex Deucher
2025-07-11 22:40 ` [PATCH 19/33] drm/amdgpu/jpeg2.5: " Alex Deucher
2025-07-11 22:40 ` [PATCH 20/33] drm/amdgpu/jpeg3: " Alex Deucher
2025-07-11 22:40 ` [PATCH 21/33] drm/amdgpu/jpeg4: " Alex Deucher
2025-07-11 22:40 ` [PATCH 22/33] drm/amdgpu/jpeg4.0.3: " Alex Deucher
2025-07-11 22:40 ` [PATCH 23/33] drm/amdgpu/jpeg4.0.5: add queue reset Alex Deucher
2025-07-11 22:40 ` [PATCH 24/33] drm/amdgpu/jpeg5: " Alex Deucher
2025-07-11 22:40 ` [PATCH 25/33] drm/amdgpu/jpeg5.0.1: re-emit unprocessed state on ring reset Alex Deucher
2025-07-11 22:40 ` [PATCH 26/33] drm/amdgpu/vcn4: " Alex Deucher
2025-07-11 22:40 ` [PATCH 27/33] drm/amdgpu/vcn4.0.3: " Alex Deucher
2025-07-11 22:40 ` [PATCH 28/33] drm/amdgpu/vcn4.0.5: " Alex Deucher
2025-07-11 22:40 ` [PATCH 29/33] drm/amdgpu/vcn5: " Alex Deucher
2025-07-11 22:40 ` [PATCH 30/33] drm/amdgpu/vcn: add a helper framework for engine resets Alex Deucher
2025-07-11 22:40 ` [PATCH 31/33] drm/amdgpu/vcn2: implement ring reset Alex Deucher
2025-07-11 22:40 ` [PATCH 32/33] drm/amdgpu/vcn2.5: " Alex Deucher
2025-07-11 22:40 ` [PATCH 33/33] drm/amdgpu/vcn3: " Alex Deucher
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