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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Andy Gross <agross@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	coresight@lists.linaro.org,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sc7180: Add support to skip powering up of ETM
Date: Tue, 09 Jun 2020 19:24:34 +0530	[thread overview]
Message-ID: <70271f66ad792f7ab16a907ddf73e0f3@codeaurora.org> (raw)
In-Reply-To: <7599d58142dcefbcb08a2eaff71c7f411a1d52b1.1589539293.git.saiprakash.ranjan@codeaurora.org>

Hi Bjorn,

On 2020-05-15 16:21, Sai Prakash Ranjan wrote:
> Add "qcom,skip-power-up" property to skip powering up ETM
> on SC7180 SoC to workaround a hardware errata where CPU
> watchdog counter is stopped when ETM power up bit is set
> (i.e., when TRCPDCR.PU = 1).
> 
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> ---
> 
> Depends on ETM driver change here -
> https://lore.kernel.org/patchwork/cover/1242100/
> 
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 8b3707347547..de4bae4ec224 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1657,6 +1657,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1676,6 +1677,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1695,6 +1697,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1714,6 +1717,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1733,6 +1737,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1752,6 +1757,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1771,6 +1777,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1790,6 +1797,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {

I have sent this patch as a part of other coresight changes
to keep all coresight DT changes together[1], we can drop this
patch now.

[1] - https://lore.kernel.org/patchwork/cover/1253969/

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org,
	linux-kernel@vger.kernel.org, Stephen Boyd <swboyd@chromium.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Mike Leach <mike.leach@linaro.org>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sc7180: Add support to skip powering up of ETM
Date: Tue, 09 Jun 2020 19:24:34 +0530	[thread overview]
Message-ID: <70271f66ad792f7ab16a907ddf73e0f3@codeaurora.org> (raw)
In-Reply-To: <7599d58142dcefbcb08a2eaff71c7f411a1d52b1.1589539293.git.saiprakash.ranjan@codeaurora.org>

Hi Bjorn,

On 2020-05-15 16:21, Sai Prakash Ranjan wrote:
> Add "qcom,skip-power-up" property to skip powering up ETM
> on SC7180 SoC to workaround a hardware errata where CPU
> watchdog counter is stopped when ETM power up bit is set
> (i.e., when TRCPDCR.PU = 1).
> 
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> ---
> 
> Depends on ETM driver change here -
> https://lore.kernel.org/patchwork/cover/1242100/
> 
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 8b3707347547..de4bae4ec224 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1657,6 +1657,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1676,6 +1677,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1695,6 +1697,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1714,6 +1717,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1733,6 +1737,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1752,6 +1757,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1771,6 +1777,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1790,6 +1797,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {

I have sent this patch as a part of other coresight changes
to keep all coresight DT changes together[1], we can drop this
patch now.

[1] - https://lore.kernel.org/patchwork/cover/1253969/

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-06-09 13:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-15 10:51 [PATCH 0/2] arm64: dts: qcom: sc7180: Add support for ETMv4 PM and skipping power up Sai Prakash Ranjan
2020-05-15 10:51 ` Sai Prakash Ranjan
2020-05-15 10:51 ` [PATCH 1/2] arm64: dts: qcom: sc7180: Support ETMv4 power management Sai Prakash Ranjan
2020-05-15 10:51   ` Sai Prakash Ranjan
2020-05-15 10:55   ` Sai Prakash Ranjan
2020-05-15 10:55     ` Sai Prakash Ranjan
2020-05-18 18:51     ` Bjorn Andersson
2020-05-18 18:51       ` Bjorn Andersson
2020-05-18 19:08       ` Sai Prakash Ranjan
2020-05-18 19:08         ` Sai Prakash Ranjan
2020-05-18 22:35         ` Bjorn Andersson
2020-05-18 22:35           ` Bjorn Andersson
2020-05-15 10:51 ` [PATCH 2/2] arm64: dts: qcom: sc7180: Add support to skip powering up of ETM Sai Prakash Ranjan
2020-05-15 10:51   ` Sai Prakash Ranjan
2020-06-09 13:54   ` Sai Prakash Ranjan [this message]
2020-06-09 13:54     ` Sai Prakash Ranjan

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