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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
	intel-xe@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Subject: Re: [PATCH 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform
Date: Fri, 12 Sep 2025 11:19:50 +0300	[thread overview]
Message-ID: <70fc412b47d9972ad2d1b6eca13bbdd9da992552@intel.com> (raw)
In-Reply-To: <20250911210514.389014-2-dnyaneshwar.bhadane@intel.com>

On Fri, 12 Sep 2025, Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> wrote:
> To form the WCL platform as a subplatform of PTL in definition,
> WCL pci ids are splited into saparate group from PTL.
> So update the pciidlist struct to cover all the pci ids.

This stops wcl from being identified by display driver. You need to add
INTEL_WCL_IDS to intel_display_ids as well.

It's a good idea to use a code tagging tool such as cscope or gnu
global, and check the references to the symbols you're changing.

> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_pci.c | 1 +
>  include/drm/intel/pciids.h  | 4 +++-
>  2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 701ba9baa9d7..fc2ea9132804 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -375,6 +375,7 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc),
>  	INTEL_BMG_IDS(INTEL_VGA_DEVICE, &bmg_desc),
>  	INTEL_PTL_IDS(INTEL_VGA_DEVICE, &ptl_desc),
> +	INTEL_WCL_IDS(INTEL_VGA_DEVICE, &ptl_desc),
>  	{ }
>  };
>  MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/include/drm/intel/pciids.h b/include/drm/intel/pciids.h
> index da6301a6fcea..9d378c65be4b 100644
> --- a/include/drm/intel/pciids.h
> +++ b/include/drm/intel/pciids.h
> @@ -877,7 +877,9 @@
>  	MACRO__(0xB08F, ## __VA_ARGS__), \
>  	MACRO__(0xB090, ## __VA_ARGS__), \
>  	MACRO__(0xB0A0, ## __VA_ARGS__), \
> -	MACRO__(0xB0B0, ## __VA_ARGS__), \
> +	MACRO__(0xB0B0, ## __VA_ARGS__)
> +

Please add comment

/* WCL */

here, see all the above recent groups of macros.

> +#define INTEL_WCL_IDS(MACRO__, ...) \
>  	MACRO__(0xFD80, ## __VA_ARGS__), \
>  	MACRO__(0xFD81, ## __VA_ARGS__)

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-09-12  8:19 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-11 21:05 [PATCH 0/3] Add WCL as subplatform from PTL Dnyaneshwar Bhadane
2025-09-11 21:05 ` [PATCH 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform Dnyaneshwar Bhadane
2025-09-12  8:19   ` Jani Nikula [this message]
2025-09-11 21:05 ` [PATCH 2/3] drm/i915/display: Add definition for wcl as subplatform Dnyaneshwar Bhadane
2025-09-12  8:21   ` Jani Nikula
2025-09-12 10:02     ` Bhadane, Dnyaneshwar
2025-09-11 21:05 ` [PATCH 3/3] drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A Dnyaneshwar Bhadane
2025-09-11 21:11 ` ✗ CI.checkpatch: warning for Add WCL as subplatform from PTL Patchwork
2025-09-11 21:12 ` ✓ CI.KUnit: success " Patchwork
2025-09-11 21:27 ` ✗ CI.checksparse: warning " Patchwork
2025-09-11 21:45 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-09-12  3:55 ` ✗ Xe.CI.Full: " Patchwork
2025-09-19  9:59 ` [PATCH v2 0/3] " Dnyaneshwar Bhadane
2025-09-19  9:59   ` [PATCH v2 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform Dnyaneshwar Bhadane
2025-09-19  9:59   ` [PATCH v2 2/3] drm/i915/display: Add definition for wcl as subplatform Dnyaneshwar Bhadane
2025-09-19  9:59   ` [PATCH v2 3/3] drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A Dnyaneshwar Bhadane
2025-09-19 19:59   ` [PATCH v2 0/3] Add WCL as subplatform from PTL Gustavo Sousa
2025-09-19 12:12 ` ✓ i915.CI.BAT: success for series starting with [v2,1/3] drm/pcids: Split PTL pciids group to make wcl subplatform Patchwork
2025-09-20  5:37 ` ✗ i915.CI.Full: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2025-09-11 20:55 [PATCH 0/3] Add WCL as subplatform from PTL Dnyaneshwar Bhadane
2025-09-11 20:55 ` [PATCH 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform Dnyaneshwar Bhadane
2025-09-15 13:33   ` Gustavo Sousa
2025-09-15 13:51     ` Jani Nikula
2025-09-15 13:57       ` Gustavo Sousa
2025-09-18 12:12         ` Bhadane, Dnyaneshwar

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