From: Stephen Boyd <sboyd@codeaurora.org>
To: Marc Zyngier <marc.zyngier@arm.com>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Ivan T. Ivanov" <ivan.ivanov@linaro.org>
Subject: Re: [PATCH] arm64: qcom: dts: Fix broken interrupt trigger settings
Date: Wed, 10 Aug 2016 11:50:06 -0700 [thread overview]
Message-ID: <71392945-e47c-2ec3-6abb-ae2b0a3411af@codeaurora.org> (raw)
In-Reply-To: <1470826286-19913-1-git-send-email-marc.zyngier@arm.com>
On 08/10/2016 03:51 AM, Marc Zyngier wrote:
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 ++++----
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 11bdc24..45427834 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -483,7 +483,7 @@
> compatible = "qcom,ci-hdrc";
> reg = <0x78d9000 0x400>;
> dr_mode = "peripheral";
> - interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>;
> usb-phy = <&usb_otg>;
> status = "disabled";
> };
> @@ -491,7 +491,7 @@
> usb_host: ehci@78d9000 {
> compatible = "qcom,ehci-host";
> reg = <0x78d9000 0x400>;
> - interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>;
> usb-phy = <&usb_otg>;
> status = "disabled";
> };
> @@ -499,7 +499,7 @@
> usb_otg: phy@78d9000 {
> compatible = "qcom,usb-otg-snps";
> reg = <0x78d9000 0x400>;
> - interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
> + interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
> <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
These are all level high.
>
> qcom,vdd-levels = <500000 1000000 1320000>;
> @@ -594,7 +594,7 @@
> <0x200a000 0x002100>;
> reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> interrupt-names = "periph_irq";
> - interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
This is right.
> qcom,ee = <0>;
> qcom,channel = <0>;
> #address-cells = <2>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 55ec3e8..69ed6e1 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -339,7 +339,7 @@
> <0x400a000 0x002100>;
> reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> interrupt-names = "periph_irq";
> - interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
> qcom,ee = <0>;
> qcom,channel = <0>;
> #address-cells = <2>;
This is right too.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: qcom: dts: Fix broken interrupt trigger settings
Date: Wed, 10 Aug 2016 11:50:06 -0700 [thread overview]
Message-ID: <71392945-e47c-2ec3-6abb-ae2b0a3411af@codeaurora.org> (raw)
In-Reply-To: <1470826286-19913-1-git-send-email-marc.zyngier@arm.com>
On 08/10/2016 03:51 AM, Marc Zyngier wrote:
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 ++++----
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 11bdc24..45427834 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -483,7 +483,7 @@
> compatible = "qcom,ci-hdrc";
> reg = <0x78d9000 0x400>;
> dr_mode = "peripheral";
> - interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>;
> usb-phy = <&usb_otg>;
> status = "disabled";
> };
> @@ -491,7 +491,7 @@
> usb_host: ehci at 78d9000 {
> compatible = "qcom,ehci-host";
> reg = <0x78d9000 0x400>;
> - interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>;
> usb-phy = <&usb_otg>;
> status = "disabled";
> };
> @@ -499,7 +499,7 @@
> usb_otg: phy at 78d9000 {
> compatible = "qcom,usb-otg-snps";
> reg = <0x78d9000 0x400>;
> - interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
> + interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
> <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
These are all level high.
>
> qcom,vdd-levels = <500000 1000000 1320000>;
> @@ -594,7 +594,7 @@
> <0x200a000 0x002100>;
> reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> interrupt-names = "periph_irq";
> - interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
This is right.
> qcom,ee = <0>;
> qcom,channel = <0>;
> #address-cells = <2>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 55ec3e8..69ed6e1 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -339,7 +339,7 @@
> <0x400a000 0x002100>;
> reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> interrupt-names = "periph_irq";
> - interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
> + interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
> qcom,ee = <0>;
> qcom,channel = <0>;
> #address-cells = <2>;
This is right too.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-08-10 18:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-10 10:51 [PATCH] arm64: qcom: dts: Fix broken interrupt trigger settings Marc Zyngier
2016-08-10 10:51 ` Marc Zyngier
2016-08-10 18:50 ` Stephen Boyd [this message]
2016-08-10 18:50 ` Stephen Boyd
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