From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Sergiu Moga <sergiu.moga@microchip.com>
Cc: lee@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, nicolas.ferre@microchip.com,
alexandre.belloni@bootlin.com, claudiu.beznea@microchip.com,
radu_nicolae.pirea@upb.ro, richard.genoud@gmail.com,
gregkh@linuxfoundation.org, jirislaby@kernel.org,
kavyasree.kotagiri@microchip.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-serial@vger.kernel.org
Subject: Re: [PATCH v4 8/9] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
Date: Mon, 19 Sep 2022 18:17:46 +0300 (EEST) [thread overview]
Message-ID: <7173f82-4f14-6f89-9651-fd3fdc4b9dcc@linux.intel.com> (raw)
In-Reply-To: <20220919150846.1148783-9-sergiu.moga@microchip.com>
[-- Attachment #1: Type: text/plain, Size: 3326 bytes --]
On Mon, 19 Sep 2022, Sergiu Moga wrote:
> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
>
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Look good.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
> ---
>
>
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
>
>
>
> v2 -> v3:
> - Use ATMEL_US_CD instead of 65535
> - Previously [PATCH 10]
>
>
>
> v3 -> v4:
> - Use min_t instead of &
> - Previously [PATCH 12]
>
>
> drivers/tty/serial/atmel_serial.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index ab4a9dfae07d..c983798a4ab2 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -150,6 +150,7 @@ struct atmel_uart_port {
> u32 rts_low;
> bool ms_irq_enabled;
> u32 rtor; /* address of receiver timeout register if it exists */
> + bool is_usart;
> bool has_frac_baudrate;
> bool has_hw_timer;
> struct timer_list uart_timer;
> @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port)
> */
> atmel_port->has_frac_baudrate = false;
> atmel_port->has_hw_timer = false;
> + atmel_port->is_usart = false;
>
> if (name == new_uart) {
> dev_dbg(port->dev, "Uart with hw timer");
> @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port)
> dev_dbg(port->dev, "Usart\n");
> atmel_port->has_frac_baudrate = true;
> atmel_port->has_hw_timer = true;
> + atmel_port->is_usart = true;
> atmel_port->rtor = ATMEL_US_RTOR;
> version = atmel_uart_readl(port, ATMEL_US_VERSION);
> switch (version) {
> @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port)
> dev_dbg(port->dev, "This version is usart\n");
> atmel_port->has_frac_baudrate = true;
> atmel_port->has_hw_timer = true;
> + atmel_port->is_usart = true;
> atmel_port->rtor = ATMEL_US_RTOR;
> break;
> case 0x203:
> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
> cd = uart_get_divisor(port, baud);
> }
>
> - if (cd > 65535) { /* BRGR is 16-bit, so switch to slower clock */
> + /*
> + * If the current value of the Clock Divisor surpasses the 16 bit
> + * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
> + * Clock implicitly divided by 8.
> + * If the IP is UART however, keep the highest possible value for
> + * the CD and avoid needless division of CD, since UART IP's do not
> + * support implicit division of the Peripheral Clock.
> + */
> + if (atmel_port->is_usart && cd > ATMEL_US_CD) {
> cd /= 8;
> mode |= ATMEL_US_USCLKS_MCK_DIV8;
> + } else {
> + cd = min_t(unsigned int, cd, ATMEL_US_CD);
> }
> +
> quot = cd | fp << ATMEL_US_FP_OFFSET;
>
> if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
WARNING: multiple messages have this Message-ID (diff)
From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Sergiu Moga <sergiu.moga@microchip.com>
Cc: devicetree@vger.kernel.org, alexandre.belloni@bootlin.com,
kavyasree.kotagiri@microchip.com, richard.genoud@gmail.com,
gregkh@linuxfoundation.org, radu_nicolae.pirea@upb.ro,
lee@kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-serial@vger.kernel.org,
linux-spi@vger.kernel.org, jirislaby@kernel.org,
claudiu.beznea@microchip.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 8/9] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
Date: Mon, 19 Sep 2022 18:17:46 +0300 (EEST) [thread overview]
Message-ID: <7173f82-4f14-6f89-9651-fd3fdc4b9dcc@linux.intel.com> (raw)
In-Reply-To: <20220919150846.1148783-9-sergiu.moga@microchip.com>
[-- Attachment #1: Type: text/plain, Size: 3326 bytes --]
On Mon, 19 Sep 2022, Sergiu Moga wrote:
> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
>
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Look good.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
> ---
>
>
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
>
>
>
> v2 -> v3:
> - Use ATMEL_US_CD instead of 65535
> - Previously [PATCH 10]
>
>
>
> v3 -> v4:
> - Use min_t instead of &
> - Previously [PATCH 12]
>
>
> drivers/tty/serial/atmel_serial.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index ab4a9dfae07d..c983798a4ab2 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -150,6 +150,7 @@ struct atmel_uart_port {
> u32 rts_low;
> bool ms_irq_enabled;
> u32 rtor; /* address of receiver timeout register if it exists */
> + bool is_usart;
> bool has_frac_baudrate;
> bool has_hw_timer;
> struct timer_list uart_timer;
> @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port)
> */
> atmel_port->has_frac_baudrate = false;
> atmel_port->has_hw_timer = false;
> + atmel_port->is_usart = false;
>
> if (name == new_uart) {
> dev_dbg(port->dev, "Uart with hw timer");
> @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port)
> dev_dbg(port->dev, "Usart\n");
> atmel_port->has_frac_baudrate = true;
> atmel_port->has_hw_timer = true;
> + atmel_port->is_usart = true;
> atmel_port->rtor = ATMEL_US_RTOR;
> version = atmel_uart_readl(port, ATMEL_US_VERSION);
> switch (version) {
> @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port)
> dev_dbg(port->dev, "This version is usart\n");
> atmel_port->has_frac_baudrate = true;
> atmel_port->has_hw_timer = true;
> + atmel_port->is_usart = true;
> atmel_port->rtor = ATMEL_US_RTOR;
> break;
> case 0x203:
> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
> cd = uart_get_divisor(port, baud);
> }
>
> - if (cd > 65535) { /* BRGR is 16-bit, so switch to slower clock */
> + /*
> + * If the current value of the Clock Divisor surpasses the 16 bit
> + * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
> + * Clock implicitly divided by 8.
> + * If the IP is UART however, keep the highest possible value for
> + * the CD and avoid needless division of CD, since UART IP's do not
> + * support implicit division of the Peripheral Clock.
> + */
> + if (atmel_port->is_usart && cd > ATMEL_US_CD) {
> cd /= 8;
> mode |= ATMEL_US_USCLKS_MCK_DIV8;
> + } else {
> + cd = min_t(unsigned int, cd, ATMEL_US_CD);
> }
> +
> quot = cd | fp << ATMEL_US_FP_OFFSET;
>
> if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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next prev parent reply other threads:[~2022-09-19 15:19 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-19 15:08 [PATCH v4 0/9] Make atmel serial driver aware of GCLK Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 1/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 2/9] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 17:08 ` Krzysztof Kozlowski
2022-09-19 17:08 ` Krzysztof Kozlowski
2022-09-20 7:51 ` Sergiu.Moga
2022-09-20 7:51 ` Sergiu.Moga
2022-09-19 15:08 ` [PATCH v4 3/9] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 4/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 5/9] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 6/9] tty: serial: atmel: Define GCLK as USART baudrate source clock Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 7/9] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:08 ` [PATCH v4 8/9] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-19 15:17 ` Ilpo Järvinen [this message]
2022-09-19 15:17 ` Ilpo Järvinen
2022-09-19 15:08 ` [PATCH v4 9/9] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-09-19 15:08 ` Sergiu Moga
2022-09-21 5:51 ` Claudiu.Beznea
2022-09-21 5:51 ` Claudiu.Beznea
2022-09-21 6:27 ` Claudiu.Beznea
2022-09-21 6:27 ` Claudiu.Beznea
2022-09-21 11:49 ` Sergiu.Moga
2022-09-21 11:49 ` Sergiu.Moga
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