From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: frank.li@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org,
kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org,
bhelgaas@google.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 1/5] PCI: imx6: Start link directly when workaround is not required
Date: Mon, 24 Mar 2025 15:05:41 +0200 (EET) [thread overview]
Message-ID: <73205114-bdb5-2995-e00a-7df7046ea91d@linux.intel.com> (raw)
In-Reply-To: <20250324062647.1891896-2-hongxing.zhu@nxp.com>
On Mon, 24 Mar 2025, Richard Zhu wrote:
> The current link setup procedure is more like one workaround to detect
> the device behind PCIe switches on some i.MX6 platforms.
>
> To describe more accurately, change the flag name from
> IMX_PCIE_FLAG_IMX_SPEED_CHANGE to IMX_PCIE_FLAG_SPEED_CHANGE_WORKAROUND.
>
> Then, start PCIe link directly when this flag is not set on i.MX7 or
> later paltforms to simple and speed up link training.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 34 +++++++++++----------------
> 1 file changed, 14 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index c1f7904e3600..aa5c3f235995 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -91,7 +91,7 @@ enum imx_pcie_variants {
> };
>
> #define IMX_PCIE_FLAG_IMX_PHY BIT(0)
> -#define IMX_PCIE_FLAG_IMX_SPEED_CHANGE BIT(1)
> +#define IMX_PCIE_FLAG_SPEED_CHANGE_WORDAROUND BIT(1)
WORDaround ?? :-)
--
i.
> #define IMX_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2)
> #define IMX_PCIE_FLAG_HAS_PHYDRV BIT(3)
> #define IMX_PCIE_FLAG_HAS_APP_RESET BIT(4)
> @@ -860,6 +860,12 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
> u32 tmp;
> int ret;
>
> + if (!(imx_pcie->drvdata->flags &
> + IMX_PCIE_FLAG_SPEED_CHANGE_WORDAROUND)) {
> + imx_pcie_ltssm_enable(dev);
> + return 0;
> + }
> +
> /*
> * Force Gen1 operation when starting the link. In case the link is
> * started in Gen2 mode, there is a possibility the devices on the
> @@ -896,22 +902,10 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
> dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp);
> dw_pcie_dbi_ro_wr_dis(pci);
>
> - if (imx_pcie->drvdata->flags &
> - IMX_PCIE_FLAG_IMX_SPEED_CHANGE) {
> -
> - /*
> - * On i.MX7, DIRECT_SPEED_CHANGE behaves differently
> - * from i.MX6 family when no link speed transition
> - * occurs and we go Gen1 -> yep, Gen1. The difference
> - * is that, in such case, it will not be cleared by HW
> - * which will cause the following code to report false
> - * failure.
> - */
> - ret = imx_pcie_wait_for_speed_change(imx_pcie);
> - if (ret) {
> - dev_err(dev, "Failed to bring link up!\n");
> - goto err_reset_phy;
> - }
> + ret = imx_pcie_wait_for_speed_change(imx_pcie);
> + if (ret) {
> + dev_err(dev, "Failed to bring link up!\n");
> + goto err_reset_phy;
> }
>
> /* Make sure link training is finished as well! */
> @@ -1665,7 +1659,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> [IMX6Q] = {
> .variant = IMX6Q,
> .flags = IMX_PCIE_FLAG_IMX_PHY |
> - IMX_PCIE_FLAG_IMX_SPEED_CHANGE |
> + IMX_PCIE_FLAG_SPEED_CHANGE_WORDAROUND |
> IMX_PCIE_FLAG_BROKEN_SUSPEND |
> IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> .dbi_length = 0x200,
> @@ -1681,7 +1675,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> [IMX6SX] = {
> .variant = IMX6SX,
> .flags = IMX_PCIE_FLAG_IMX_PHY |
> - IMX_PCIE_FLAG_IMX_SPEED_CHANGE |
> + IMX_PCIE_FLAG_SPEED_CHANGE_WORDAROUND |
> IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> .gpr = "fsl,imx6q-iomuxc-gpr",
> .ltssm_off = IOMUXC_GPR12,
> @@ -1696,7 +1690,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> [IMX6QP] = {
> .variant = IMX6QP,
> .flags = IMX_PCIE_FLAG_IMX_PHY |
> - IMX_PCIE_FLAG_IMX_SPEED_CHANGE |
> + IMX_PCIE_FLAG_SPEED_CHANGE_WORDAROUND |
> IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> .dbi_length = 0x200,
> .gpr = "fsl,imx6q-iomuxc-gpr",
>
next prev parent reply other threads:[~2025-03-24 13:05 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-24 6:26 [PATCH v1 0/5] Add some enhancements for i.MX95 PCIe Richard Zhu
2025-03-24 6:26 ` [PATCH v1 1/5] PCI: imx6: Start link directly when workaround is not required Richard Zhu
2025-03-24 7:48 ` Hongxing Zhu
2025-03-24 13:05 ` Ilpo Järvinen [this message]
2025-03-24 6:26 ` [PATCH v1 2/5] PCI: imx6: Toggle the cold reset for i.MX95 PCIe Richard Zhu
2025-03-24 19:00 ` Frank Li
2025-03-24 6:26 ` [PATCH v1 3/5] PCI: imx6: Workaround i.MX95 PCIe may not exit L23 ready Richard Zhu
2025-03-24 19:14 ` Frank Li
2025-03-25 8:08 ` Hongxing Zhu
2025-03-24 6:26 ` [PATCH v1 4/5] PCI: imx6: Let i.MX95 PCIe compliance with 8GT/s Receiver Impedance ECN Richard Zhu
2025-03-24 19:18 ` Frank Li
2025-03-24 6:26 ` [PATCH v1 5/5] PCI: imx6: Save and restore the LUT setting for i.MX95 PCIe Richard Zhu
2025-03-24 19:22 ` Frank Li
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