All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 18/19] drm/i915/execlists: Direct submission (avoid tasklet/ksoftirqd)
Date: Thu, 17 May 2018 14:13:00 +0100	[thread overview]
Message-ID: <7475e148-522d-8a3c-c139-fa612dd8b158@linux.intel.com> (raw)
In-Reply-To: <20180517074055.14638-18-chris@chris-wilson.co.uk>


On 17/05/2018 08:40, Chris Wilson wrote:
> Back in commit 27af5eea54d1 ("drm/i915: Move execlists irq handler to a
> bottom half"), we came to the conclusion that running our CSB processing
> and ELSP submission from inside the irq handler was a bad idea. A really
> bad idea as we could impose nearly 1s latency on other users of the
> system, on average! Deferring our work to a tasklet allowed us to do the
> processing with irqs enabled, reducing the impact to an average of about
> 50us.
> 
> We have since eradicated the use of forcewaked mmio from inside the CSB
> processing and ELSP submission, bringing the impact down to around 5us
> (on Kabylake); an order of magnitude better than our measurements 2
> years ago on Broadwell and only about 2x worse on average than the
> gem_syslatency on an unladen system.
> 
> Comparing the impact on the maximum latency observed over a 120s interval,
> repeated several times (using gem_syslatency, similar to RT's cyclictest)
> while the system is fully laden with i915 nops, we see that direct
> submission definitely worsens the response but not to the same outlandish
> degree as before.
> 
> x Unladen baseline
> + Using tasklet
> * Direct submission
> 
> +------------------------------------------------------------------------+
> |xx x          ++    +++ +                           *  * *   ** *** *  *|
> ||A|              |__AM__|                               |_____A_M___|   |
> +------------------------------------------------------------------------+

What are these headers? This one and below, I cannot decipher them at all.

>      N           Min           Max        Median           Avg        Stddev
> x  10             5            18            10           9.3     3.6530049
> +  10            72           120           108         102.9     15.758243
> *  10           255           348           316         305.7      28.74814

In micro-seconds? so tasklet is 108us median? Direct submission 316us 
median?

> 
> And with a background load

This is IO background load?

Regards,

Tvrtko

> 
> +------------------------------------------------------------------------+
> |x                          +           *              *                 |
> |x                    +     + + + +  + +* * ** ++      * *   *          *|
> |A                        |_______A_____|__|_______A___M______|          |
> +------------------------------------------------------------------------+
>      N           Min           Max        Median           Avg        Stddev
> x  10             4            11             9           8.5     2.1730675
> +  10           633          1388           972           993     243.33744
> *  10          1152          2109          1608        1488.3     314.80719
> 
> References: 27af5eea54d1 ("drm/i915: Move execlists irq handler to a bottom half")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_irq.c  | 11 ++------
>   drivers/gpu/drm/i915/intel_lrc.c | 44 +++++++++++++++++---------------
>   2 files changed, 26 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 3f139ff64385..8b61ebf5cb4a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1462,22 +1462,15 @@ static void snb_gt_irq_handler(struct drm_i915_private *dev_priv,
>   static void
>   gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir)
>   {
> -	bool tasklet = false;
> -
> -	if (iir & GT_CONTEXT_SWITCH_INTERRUPT) {
> +	if (iir & GT_CONTEXT_SWITCH_INTERRUPT)
>   		intel_engine_handle_execlists_irq(engine);
> -		tasklet = true;
> -	}
>   
>   	if (iir & GT_RENDER_USER_INTERRUPT) {
>   		if (intel_engine_uses_guc(engine))
> -			tasklet = true;
> +			tasklet_hi_schedule(&engine->execlists.tasklet);
>   
>   		notify_ring(engine);
>   	}
> -
> -	if (tasklet)
> -		tasklet_hi_schedule(&engine->execlists.tasklet);
>   }
>   
>   static void gen8_gt_irq_ack(struct drm_i915_private *i915,
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 954eb3a71051..37839d89e03a 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -575,7 +575,7 @@ static void complete_preempt_context(struct intel_engine_execlists *execlists)
>   	execlists_clear_active(execlists, EXECLISTS_ACTIVE_PREEMPT);
>   }
>   
> -static void __execlists_dequeue(struct intel_engine_cs *engine)
> +static void execlists_dequeue(struct intel_engine_cs *engine)
>   {
>   	struct intel_engine_execlists * const execlists = &engine->execlists;
>   	struct execlist_port *port = execlists->port;
> @@ -587,7 +587,11 @@ static void __execlists_dequeue(struct intel_engine_cs *engine)
>   
>   	lockdep_assert_held(&engine->timeline.lock);
>   
> -	/* Hardware submission is through 2 ports. Conceptually each port
> +	if (execlists_is_active(&engine->execlists, EXECLISTS_ACTIVE_PREEMPT))
> +		return;
> +
> +	/*
> +	 * Hardware submission is through 2 ports. Conceptually each port
>   	 * has a (RING_START, RING_HEAD, RING_TAIL) tuple. RING_START is
>   	 * static for a context, and unique to each, so we only execute
>   	 * requests belonging to a single context from each ring. RING_HEAD
> @@ -777,15 +781,6 @@ static void __execlists_dequeue(struct intel_engine_cs *engine)
>   		   !port_isset(engine->execlists.port));
>   }
>   
> -static void execlists_dequeue(struct intel_engine_cs *engine)
> -{
> -	unsigned long flags;
> -
> -	spin_lock_irqsave(&engine->timeline.lock, flags);
> -	__execlists_dequeue(engine);
> -	spin_unlock_irqrestore(&engine->timeline.lock, flags);
> -}
> -
>   void
>   execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
>   {
> @@ -1106,6 +1101,7 @@ void intel_engine_handle_execlists_irq(struct intel_engine_cs *engine)
>   	       execlists->csb_read);
>   	execlists->csb_head = head;
>   
> +	execlists_dequeue(engine);
>   	spin_unlock(&engine->timeline.lock);
>   }
>   
> @@ -1122,8 +1118,9 @@ static void execlists_submission_tasklet(unsigned long data)
>   		  engine->i915->gt.awake,
>   		  engine->execlists.active);
>   
> -	if (!execlists_is_active(&engine->execlists, EXECLISTS_ACTIVE_PREEMPT))
> -		execlists_dequeue(engine);
> +	spin_lock_irq(&engine->timeline.lock);
> +	execlists_dequeue(engine);
> +	spin_unlock_irq(&engine->timeline.lock);
>   }
>   
>   static void queue_request(struct intel_engine_cs *engine,
> @@ -1134,16 +1131,20 @@ static void queue_request(struct intel_engine_cs *engine,
>   		      &lookup_priolist(engine, prio)->requests);
>   }
>   
> -static void __submit_queue(struct intel_engine_cs *engine, int prio)
> +static void __update_queue(struct intel_engine_cs *engine, int prio)
>   {
>   	engine->execlists.queue_priority = prio;
> -	tasklet_hi_schedule(&engine->execlists.tasklet);
>   }
>   
>   static void submit_queue(struct intel_engine_cs *engine, int prio)
>   {
> -	if (prio > engine->execlists.queue_priority)
> -		__submit_queue(engine, prio);
> +	if (prio > engine->execlists.queue_priority) {
> +		__update_queue(engine, prio);
> +		if (!intel_engine_uses_guc(engine))
> +			execlists_dequeue(engine);
> +		else
> +			tasklet_hi_schedule(&engine->execlists.tasklet);
> +	}
>   }
>   
>   static void execlists_submit_request(struct i915_request *request)
> @@ -1155,11 +1156,12 @@ static void execlists_submit_request(struct i915_request *request)
>   	spin_lock_irqsave(&engine->timeline.lock, flags);
>   
>   	queue_request(engine, &request->sched, rq_prio(request));
> -	submit_queue(engine, rq_prio(request));
>   
>   	GEM_BUG_ON(!engine->execlists.first);
>   	GEM_BUG_ON(list_empty(&request->sched.link));
>   
> +	submit_queue(engine, rq_prio(request));
> +
>   	spin_unlock_irqrestore(&engine->timeline.lock, flags);
>   }
>   
> @@ -1286,8 +1288,10 @@ static void execlists_schedule(struct i915_request *request,
>   		}
>   
>   		if (prio > engine->execlists.queue_priority &&
> -		    i915_sw_fence_done(&sched_to_request(node)->submit))
> -			__submit_queue(engine, prio);
> +		    i915_sw_fence_done(&sched_to_request(node)->submit)) {
> +			__update_queue(engine, prio);
> +			tasklet_hi_schedule(&engine->execlists.tasklet);
> +		}
>   	}
>   
>   	spin_unlock_irq(&engine->timeline.lock);
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-05-17 13:13 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-17  7:40 [PATCH 01/19] drm/i915: Move request->ctx aside Chris Wilson
2018-05-17  7:40 ` [PATCH 02/19] drm/i915: Move fiddling with engine->last_retired_context Chris Wilson
2018-05-17  7:40 ` [PATCH 03/19] drm/i915: Store a pointer to intel_context in i915_request Chris Wilson
2018-05-17  7:40 ` [PATCH 04/19] drm/i915: Pull the context->pin_count dec into the common intel_context_unpin Chris Wilson
2018-05-17 10:20   ` Tvrtko Ursulin
2018-05-17 10:35     ` Chris Wilson
2018-05-17  7:40 ` [PATCH 05/19] drm/i915: Be irqsafe inside reset Chris Wilson
2018-05-17 10:27   ` Tvrtko Ursulin
2018-05-17 10:46     ` Chris Wilson
2018-05-17  7:40 ` [PATCH 06/19] drm/i915: Make intel_engine_dump irqsafe Chris Wilson
2018-05-17 10:28   ` Tvrtko Ursulin
2018-05-17  7:40 ` [PATCH 07/19] drm/i915/execlists: Handle copying default context state for atomic reset Chris Wilson
2018-05-17 10:37   ` Tvrtko Ursulin
2018-05-17  7:40 ` [PATCH 08/19] drm/i915: Allow init_breadcrumbs to be used from irq context Chris Wilson
2018-05-17 10:40   ` Tvrtko Ursulin
2018-05-17  7:40 ` [PATCH 09/19] drm/i915/execlists: HWACK checking superseded checking port[0].count Chris Wilson
2018-05-17 10:55   ` Tvrtko Ursulin
2018-05-17 17:03     ` Chris Wilson
2018-05-17  7:40 ` [PATCH 10/19] drm/i915: Remove USES_GUC_SUBMISSION() pointer chasing from gen8_cs_irq_handler Chris Wilson
2018-05-17 10:58   ` Tvrtko Ursulin
2018-05-17 11:24     ` Chris Wilson
2018-05-17 13:13       ` Tvrtko Ursulin
2018-05-17  7:40 ` [PATCH 11/19] drm/i915/execlists: Double check rpm wakeref Chris Wilson
2018-05-17 11:04   ` Tvrtko Ursulin
2018-05-17  7:40 ` [PATCH 12/19] drm/i915: After reset on sanitization, reset the engine backends Chris Wilson
2018-05-17  7:40 ` [PATCH 13/19] drm/i915/execlists: Reset the CSB head tracking on reset/sanitization Chris Wilson
2018-05-17  7:40 ` [PATCH 14/19] drm/i915/execlists: Pull submit after dequeue under timeline lock Chris Wilson
2018-05-17  7:40 ` [PATCH 15/19] drm/i915/execlists: Process one CSB interrupt at a time Chris Wilson
2018-05-17  7:40 ` [PATCH 16/19] drm/i915/execlists: Unify CSB access pointers Chris Wilson
2018-05-17  7:40 ` [PATCH 17/19] drm/i915/execlists: Process the CSB directly from inside the irq handler Chris Wilson
2018-05-17  7:40 ` [PATCH 18/19] drm/i915/execlists: Direct submission (avoid tasklet/ksoftirqd) Chris Wilson
2018-05-17 13:13   ` Tvrtko Ursulin [this message]
2018-05-17 17:07     ` Chris Wilson
2018-05-18  8:06       ` Tvrtko Ursulin
2018-05-18  8:18         ` Chris Wilson
2018-05-18 19:36         ` Chris Wilson
2018-05-18 21:21     ` Chris Wilson
2018-05-17  7:40 ` [PATCH 19/19] drm/i915: Combine gt irq ack/handlers Chris Wilson
2018-05-17  8:01 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/19] drm/i915: Move request->ctx aside Patchwork
2018-05-17  8:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-05-17  8:16 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-17 11:05 ` ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=7475e148-522d-8a3c-c139-fa612dd8b158@linux.intel.com \
    --to=tvrtko.ursulin@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.