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From: Heiko Stuebner <heiko@sntech.de>
To: "Gaël PORTAY" <gael.portay@collabora.com>
Cc: MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Rob Herring <robh+dt@kernel.org>,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	Lin Huang <hl@rock-chips.com>,
	Brian Norris <briannorris@chromium.org>,
	Douglas Anderson <dianders@chromium.org>,
	Klaus Goger <klaus.goger@theobroma-systems.com>,
	Derek Basehore <dbasehore@chromium.org>,
	Randy Li <ayaka@soulik.info>,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v3 4/5] arm64: dts: rk3399: Add dfi and dmc nodes.
Date: Thu, 11 Apr 2019 15:20:53 +0200	[thread overview]
Message-ID: <7786013.gjegOBUKu0@phil> (raw)
In-Reply-To: <20190321231440.19031-5-gael.portay@collabora.com>

Hi Gaël,

Am Freitag, 22. März 2019, 00:14:39 CEST schrieb Gaël PORTAY:
> From: Lin Huang <hl@rock-chips.com>
> 
> These are required to support DDR DVFS on rk3399 platform. The patch also
> introduces a new file with default DRAM settings.
> 
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>

> +	dmc: dmc {
> +		compatible = "rockchip,rk3399-dmc";
> +		rockchip,pmu = <&pmugrf>;
> +		devfreq-events = <&dfi>;
> +		clocks = <&cru SCLK_DDRC>;
> +		clock-names = "dmc_clk";
> +		status = "disabled";
> +		rockchip,ddr3_speed_bin = <21>;
> +		rockchip,pd_idle = <0x40>;
> +		rockchip,sr_idle = <0x2>;
> +		rockchip,sr_mc_gate_idle = <0x3>;
> +		rockchip,srpd_lite_idle	= <0x4>;
> +		rockchip,standby_idle = <0x2000>;
> +		rockchip,dram_dll_dis_freq = <300000000>;
> +		rockchip,phy_dll_dis_freq = <125000000>;
> +		rockchip,auto_pd_dis_freq = <666000000>;
> +		rockchip,ddr3_odt_dis_freq = <333000000>;
> +		rockchip,ddr3_drv = <DDR3_DS_40ohm>;
> +		rockchip,ddr3_odt = <DDR3_ODT_120ohm>;
> +		rockchip,phy_ddr3_ca_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_ddr3_dq_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_ddr3_odt = <PHY_DRV_ODT_240>;
> +		rockchip,lpddr3_odt_dis_freq = <333000000>;
> +		rockchip,lpddr3_drv = <LP3_DS_34ohm>;
> +		rockchip,lpddr3_odt = <LP3_ODT_240ohm>;
> +		rockchip,phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_lpddr3_odt = <PHY_DRV_ODT_240>;
> +		rockchip,lpddr4_odt_dis_freq = <333000000>;
> +		rockchip,lpddr4_drv = <LP4_PDDS_60ohm>;
> +		rockchip,lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
> +		rockchip,lpddr4_ca_odt = <LP4_CA_ODT_40ohm>;
> +		rockchip,phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>;
> +		rockchip,phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>;
> +		rockchip,phy_lpddr4_odt = <PHY_DRV_ODT_60>;

as Rob mentioned in his review, these values look board-specific,
so should probably move over to the specific board you're using them
on?


Heiko

WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: "Gaël PORTAY" <gael.portay@collabora.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Derek Basehore <dbasehore@chromium.org>,
	Lin Huang <hl@rock-chips.com>,
	linux-pm@vger.kernel.org, Brian Norris <briannorris@chromium.org>,
	Douglas Anderson <dianders@chromium.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-kernel@vger.kernel.org,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Klaus Goger <klaus.goger@theobroma-systems.com>,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	linux-rockchip@lists.infradead.org, Randy Li <ayaka@soulik.info>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 4/5] arm64: dts: rk3399: Add dfi and dmc nodes.
Date: Thu, 11 Apr 2019 15:20:53 +0200	[thread overview]
Message-ID: <7786013.gjegOBUKu0@phil> (raw)
In-Reply-To: <20190321231440.19031-5-gael.portay@collabora.com>

Hi Gaël,

Am Freitag, 22. März 2019, 00:14:39 CEST schrieb Gaël PORTAY:
> From: Lin Huang <hl@rock-chips.com>
> 
> These are required to support DDR DVFS on rk3399 platform. The patch also
> introduces a new file with default DRAM settings.
> 
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>

> +	dmc: dmc {
> +		compatible = "rockchip,rk3399-dmc";
> +		rockchip,pmu = <&pmugrf>;
> +		devfreq-events = <&dfi>;
> +		clocks = <&cru SCLK_DDRC>;
> +		clock-names = "dmc_clk";
> +		status = "disabled";
> +		rockchip,ddr3_speed_bin = <21>;
> +		rockchip,pd_idle = <0x40>;
> +		rockchip,sr_idle = <0x2>;
> +		rockchip,sr_mc_gate_idle = <0x3>;
> +		rockchip,srpd_lite_idle	= <0x4>;
> +		rockchip,standby_idle = <0x2000>;
> +		rockchip,dram_dll_dis_freq = <300000000>;
> +		rockchip,phy_dll_dis_freq = <125000000>;
> +		rockchip,auto_pd_dis_freq = <666000000>;
> +		rockchip,ddr3_odt_dis_freq = <333000000>;
> +		rockchip,ddr3_drv = <DDR3_DS_40ohm>;
> +		rockchip,ddr3_odt = <DDR3_ODT_120ohm>;
> +		rockchip,phy_ddr3_ca_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_ddr3_dq_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_ddr3_odt = <PHY_DRV_ODT_240>;
> +		rockchip,lpddr3_odt_dis_freq = <333000000>;
> +		rockchip,lpddr3_drv = <LP3_DS_34ohm>;
> +		rockchip,lpddr3_odt = <LP3_ODT_240ohm>;
> +		rockchip,phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_lpddr3_odt = <PHY_DRV_ODT_240>;
> +		rockchip,lpddr4_odt_dis_freq = <333000000>;
> +		rockchip,lpddr4_drv = <LP4_PDDS_60ohm>;
> +		rockchip,lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
> +		rockchip,lpddr4_ca_odt = <LP4_CA_ODT_40ohm>;
> +		rockchip,phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>;
> +		rockchip,phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>;
> +		rockchip,phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>;
> +		rockchip,phy_lpddr4_odt = <PHY_DRV_ODT_60>;

as Rob mentioned in his review, these values look board-specific,
so should probably move over to the specific board you're using them
on?


Heiko



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  parent reply	other threads:[~2019-04-11 13:20 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-21 23:14 [PATCH v3 0/5] Add support for drm/rockchip to dynamically control the DDR frequency Gaël PORTAY
2019-03-21 23:14 ` Gaël PORTAY
2019-03-21 23:14 ` [PATCH v3 1/5] devfreq: rockchip-dfi: Move GRF definitions to a common place Gaël PORTAY
2019-03-21 23:14   ` Gaël PORTAY
2019-03-25  4:48   ` MyungJoo Ham
2019-03-25  4:48     ` MyungJoo Ham
2019-03-25  4:48     ` MyungJoo Ham
2019-03-21 23:14 ` [PATCH v3 2/5] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle Gaël PORTAY
2019-03-21 23:14   ` [PATCH v3 2/5] dt-bindings: devfreq: rk3399_dmc: Add rockchip, pmu phandle Gaël PORTAY
2019-03-25  4:55   ` [PATCH v3 2/5] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle MyungJoo Ham
2019-03-25  4:55     ` MyungJoo Ham
2019-03-25  4:55     ` MyungJoo Ham
2019-03-21 23:14 ` [PATCH v3 3/5] devfreq: rk3399_dmc: Pass ODT and auto power down parameters to TF-A Gaël PORTAY
2019-03-21 23:14   ` Gaël PORTAY
2019-03-25  6:55   ` MyungJoo Ham
2019-03-25  6:55     ` MyungJoo Ham
2019-03-25  6:55     ` MyungJoo Ham
2019-03-21 23:14 ` [PATCH v3 4/5] arm64: dts: rk3399: Add dfi and dmc nodes Gaël PORTAY
2019-03-21 23:14   ` Gaël PORTAY
2019-03-28 17:59   ` Rob Herring
2019-03-28 17:59     ` Rob Herring
2019-04-11 13:20   ` Heiko Stuebner [this message]
2019-04-11 13:20     ` Heiko Stuebner
2019-03-21 23:14 ` [PATCH v3 5/5] arm64: dts: rockchip: Enable dmc and dfi nodes on gru Gaël PORTAY
2019-03-21 23:14   ` Gaël PORTAY

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