All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rong Chen <rong.a.chen@intel.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>,
	"Huang, Ying" <ying.huang@intel.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	kernel test robot <lkp@intel.com>
Cc: kbuild-all@lists.01.org, linux-mips@vger.kernel.org
Subject: Re: [kbuild-all] Re: [mips-linux:mips-next 98/101] arch/mips/include/asm/div64.h:74:3: error: inconsistent operand constraints in an 'asm'
Date: Thu, 22 Apr 2021 12:55:49 +0800	[thread overview]
Message-ID: <7cea940f-4d9d-2c5e-e2a6-ff3dfba220f5@intel.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2104220029430.44318@angie.orcam.me.uk>



On 4/22/21 7:26 AM, Maciej W. Rozycki wrote:
> On Thu, 22 Apr 2021, kernel test robot wrote:
>
>>     fs/xfs/libxfs/xfs_alloc_btree.c: In function 'xfs_allocbt_free_block':
>>>> arch/mips/include/asm/div64.h:74:3: error: inconsistent operand constraints in an 'asm'
>>        74 |   __asm__("divu $0, %z1, %z2"    \
>>           |   ^~~~~~~
>   Umm, I forgot we do support MIPSr6, unlike microMIPSr6.
>
>   I think this asm can go and GCC will do equally well with plain C code.
> Or actually marginally better, as preliminary benchmarking shows, owing to
> a slightly better instruction scheduling.  Code produced for test_div64 is
> also slightly smaller for some reason.  That's at least for the ISAs up to
> R5, which do have DIVU.  Well, I can't complain.
>
>   For R6 compiled code will work, but separate DIVU and MODU instructions
> will be produced, which are also interlocked, so scalar implementations
> will likely not perform as well as older ISAs with their asynchronous MD
> unit.  Likely still faster then the generic algorithm though.
>
>   Thomas: I'll collect new figures and respin the series.  Please do drop
> the original series then; I think there's no point to fix it up and we'll
> be better by starting afresh.
>
>   Ying: I take it you'll know what to do to get the bot updated.  As it
> happens it uses the old <linux-mips@linux-mips.org> MIPS/Linux mailing
> list address, which has been long deprecated and then stopped working
> altogether mid Jan this year.  I have updated the cc appropriately with
> this reply, but would you please amend whatever the bot requires for
> further notices to be sent to <linux-mips@vger.kernel.org> instead?
>
>    Maciej

Hi Maciej,

Thanks for the advice, we have updated the mailing list.

Best Regards,
Rong Chen


WARNING: multiple messages have this Message-ID (diff)
From: Rong Chen <rong.a.chen@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [mips-linux:mips-next 98/101] arch/mips/include/asm/div64.h:74:3: error: inconsistent operand constraints in an 'asm'
Date: Thu, 22 Apr 2021 12:55:49 +0800	[thread overview]
Message-ID: <7cea940f-4d9d-2c5e-e2a6-ff3dfba220f5@intel.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2104220029430.44318@angie.orcam.me.uk>

[-- Attachment #1: Type: text/plain, Size: 1826 bytes --]



On 4/22/21 7:26 AM, Maciej W. Rozycki wrote:
> On Thu, 22 Apr 2021, kernel test robot wrote:
>
>>     fs/xfs/libxfs/xfs_alloc_btree.c: In function 'xfs_allocbt_free_block':
>>>> arch/mips/include/asm/div64.h:74:3: error: inconsistent operand constraints in an 'asm'
>>        74 |   __asm__("divu $0, %z1, %z2"    \
>>           |   ^~~~~~~
>   Umm, I forgot we do support MIPSr6, unlike microMIPSr6.
>
>   I think this asm can go and GCC will do equally well with plain C code.
> Or actually marginally better, as preliminary benchmarking shows, owing to
> a slightly better instruction scheduling.  Code produced for test_div64 is
> also slightly smaller for some reason.  That's at least for the ISAs up to
> R5, which do have DIVU.  Well, I can't complain.
>
>   For R6 compiled code will work, but separate DIVU and MODU instructions
> will be produced, which are also interlocked, so scalar implementations
> will likely not perform as well as older ISAs with their asynchronous MD
> unit.  Likely still faster then the generic algorithm though.
>
>   Thomas: I'll collect new figures and respin the series.  Please do drop
> the original series then; I think there's no point to fix it up and we'll
> be better by starting afresh.
>
>   Ying: I take it you'll know what to do to get the bot updated.  As it
> happens it uses the old <linux-mips@linux-mips.org> MIPS/Linux mailing
> list address, which has been long deprecated and then stopped working
> altogether mid Jan this year.  I have updated the cc appropriately with
> this reply, but would you please amend whatever the bot requires for
> further notices to be sent to <linux-mips@vger.kernel.org> instead?
>
>    Maciej

Hi Maciej,

Thanks for the advice, we have updated the mailing list.

Best Regards,
Rong Chen

  reply	other threads:[~2021-04-22  4:56 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-21 20:24 [mips-linux:mips-next 98/101] arch/mips/include/asm/div64.h:74:3: error: inconsistent operand constraints in an 'asm' kernel test robot
2021-04-21 23:26 ` Maciej W. Rozycki
2021-04-21 23:26   ` Maciej W. Rozycki
2021-04-22  4:55   ` Rong Chen [this message]
2021-04-22  4:55     ` Rong Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=7cea940f-4d9d-2c5e-e2a6-ff3dfba220f5@intel.com \
    --to=rong.a.chen@intel.com \
    --cc=kbuild-all@lists.01.org \
    --cc=linux-mips@vger.kernel.org \
    --cc=lkp@intel.com \
    --cc=macro@orcam.me.uk \
    --cc=tsbogend@alpha.franken.de \
    --cc=ying.huang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.