* [PATCH v4 0/1] drm/xe: Add support for GPU health indicator
@ 2026-06-10 9:33 Soham Purkait
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Soham Purkait @ 2026-06-10 9:33 UTC (permalink / raw)
To: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, andi.shyti, rodrigo.vivi
Cc: soham.purkait, anoop.c.vijay
GPUs commonly rely on various reactive health monitoring approaches.
The Xe GPU health indicator is intended to fit into such reactive
monitoring flows, where it could be used by management tools to fetch
and update GPU health status.
This patch adds Xe GPU health indicator support as a RAS feature.
It introduces the health command IDs and request/response structures
used by the System Controller mailbox, and integrates the feature
into Xe through the gpu_health sysfs interface.
The sysfs file, gpu_health, is created at the device level and
provides a simple interface for observing and updating the reported
GPU health state. It is exposed as read-only for non admin users while
write access is only provided to the admin users.
The sysfs file (gpu_health) is placed at the device level and behaves
as follows:
$ cat /sys/.../device/gpu_health
ok
$ echo critical > /sys/.../device/gpu_health
$ cat /sys/.../device/gpu_health
critical
Soham Purkait (1):
drm/xe/xe_ras: Add RAS GPU health indicator
.../ABI/testing/sysfs-driver-intel-xe-ras | 30 +++
drivers/gpu/drm/xe/xe_ras.c | 177 ++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 1 +
drivers/gpu/drm/xe/xe_ras_types.h | 60 ++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 3 +
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 4 +
7 files changed, 303 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-ras
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 1/1] drm/xe/xe_ras: Add RAS GPU health indicator
2026-06-10 9:33 [PATCH v4 0/1] drm/xe: Add support for GPU health indicator Soham Purkait
@ 2026-06-10 9:33 ` Soham Purkait
2026-06-10 10:11 ` Gupta, Anshuman
` (2 more replies)
2026-06-10 9:39 ` ✗ CI.checkpatch: warning for drm/xe: Add support for " Patchwork
` (3 subsequent siblings)
4 siblings, 3 replies; 10+ messages in thread
From: Soham Purkait @ 2026-06-10 9:33 UTC (permalink / raw)
To: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, andi.shyti, rodrigo.vivi
Cc: soham.purkait, anoop.c.vijay
Add a sysfs interface that reports the current GPU health state and
lets admin users and management tools update it but is readable by all
users. Requests are routed through the sysctrl mailbox. The interface
is present only on platforms that support the GPU health indicator.
The interface is a single read/write file at the device level:
$ cat /sys/.../device/gpu_health
ok
$ echo critical > /sys/.../device/gpu_health
$ cat /sys/.../device/gpu_health
critical
v1:
- Add enum for health status. (Andi, Rodrigo)
- Return error number instead of error message in _show/_store. (Andi)
- Move GPU health sysfs init error logging to xe_ras_init. (Andi)
- Return only the current health state for sysfs read. (Andi, Rodrigo)
- Add documentation for sysfs interface. (Andi, Rodrigo)
v2:
- Make logs and structures consistent with their counterparts. (Riana)
- Drop unnecessary variables. (Andi, Riana)
- Add correct KernelVersion. (Raag)
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
.../ABI/testing/sysfs-driver-intel-xe-ras | 30 +++
drivers/gpu/drm/xe/xe_ras.c | 177 ++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 1 +
drivers/gpu/drm/xe/xe_ras_types.h | 60 ++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 3 +
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 4 +
7 files changed, 303 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-ras
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-ras b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
new file mode 100644
index 000000000000..c7f2cf8bb6ad
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
@@ -0,0 +1,30 @@
+What: /sys/bus/pci/drivers/xe/.../gpu_health
+Date: April 2026
+KernelVersion: 7.2
+Contact: intel-xe@lists.freedesktop.org
+Description:
+ This file exposes the current GPU health state and allows the GPU
+ health state to be updated.
+
+ This sysfs file is present only on Intel Xe platforms that support
+ the GPU health indicator interface for RAS. Reading the current
+ health state is available to all users, while updating the health
+ state is restricted to administrative users only.
+
+ Read returns a single line containing one of the valid values for
+ the current device health state. Writing one of the valid values
+ updates the current device health state.
+
+ The valid values for the device health state are:
+
+ ok
+ The device is healthy and operating within normal
+ parameters.
+
+ warning
+ The device is experiencing minor issues but remains
+ operational.
+
+ critical
+ The device is in a critical state and may not be
+ operational.
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 4cb16b419b0c..b7efd607aadf 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -4,11 +4,14 @@
*/
#include "xe_device.h"
+#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_ras.h"
#include "xe_ras_types.h"
#include "xe_sysctrl.h"
#include "xe_sysctrl_event_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
/* Severity of detected errors */
enum xe_ras_severity {
@@ -31,6 +34,16 @@ enum xe_ras_component {
XE_RAS_COMP_MAX
};
+/* RAS response status codes */
+enum xe_ras_response_status {
+ XE_RAS_STATUS_SUCCESS = 0,
+ XE_RAS_STATUS_INVALID_PARAM,
+ XE_RAS_STATUS_OP_NOT_SUPPORTED,
+ XE_RAS_STATUS_TIMEOUT,
+ XE_RAS_STATUS_HARDWARE_FAILURE,
+ XE_RAS_STATUS_INSUFFICIENT_RESOURCES
+};
+
static const char *const xe_ras_severities[] = {
[XE_RAS_SEV_NOT_SUPPORTED] = "Not Supported",
[XE_RAS_SEV_CORRECTABLE] = "Correctable Error",
@@ -50,6 +63,33 @@ static const char *const xe_ras_components[] = {
};
static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
+static const char * const gpu_health_states[] = {
+ [XE_RAS_HEALTH_STATUS_OK] = "ok",
+ [XE_RAS_HEALTH_STATUS_WARNING] = "warning",
+ [XE_RAS_HEALTH_STATUS_CRITICAL] = "critical"
+};
+static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_STATUS_MAX);
+
+static int ras_status_to_errno(u32 status)
+{
+ switch (status) {
+ case XE_RAS_STATUS_SUCCESS:
+ return 0;
+ case XE_RAS_STATUS_INVALID_PARAM:
+ return -EINVAL;
+ case XE_RAS_STATUS_OP_NOT_SUPPORTED:
+ return -EOPNOTSUPP;
+ case XE_RAS_STATUS_TIMEOUT:
+ return -ETIMEDOUT;
+ case XE_RAS_STATUS_HARDWARE_FAILURE:
+ return -EIO;
+ case XE_RAS_STATUS_INSUFFICIENT_RESOURCES:
+ return -ENOSPC;
+ default:
+ return -EPROTO;
+ }
+}
+
static inline const char *sev_to_str(u8 severity)
{
if (severity >= XE_RAS_SEV_MAX)
@@ -91,3 +131,140 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
comp_to_str(component), sev_to_str(severity));
}
}
+
+static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct xe_ras_get_health_response response = {0};
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_get_health_request request = {0};
+ struct xe_device *xe = kdev_to_xe_device(dev);
+ enum xe_ras_health_status health;
+ size_t rlen = 0;
+ int ret;
+
+ xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_HEALTH,
+ &request, sizeof(request), &response, sizeof(response));
+ guard(xe_pm_runtime)(xe);
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "sysctrl: failed to send get health command %d\n", ret);
+ return ret;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "sysctrl: unexpected get health response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return -EIO;
+ }
+ if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
+ xe_err(xe, "sysctrl: invalid health state %u\n",
+ response.current_health);
+ return -EIO;
+ }
+
+ health = (enum xe_ras_health_status)response.current_health;
+
+ xe_dbg(xe, "[RAS]: get health:%s\n", gpu_health_states[health]);
+
+ return sysfs_emit(buf, "%s\n", gpu_health_states[health]);
+}
+
+static ssize_t gpu_health_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct xe_ras_set_health_response response = {0};
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_set_health_request request = {0};
+ struct xe_device *xe = kdev_to_xe_device(dev);
+ enum xe_ras_health_status health;
+ size_t rlen = 0;
+ int ras_status;
+ int state;
+ int ret;
+
+ state = sysfs_match_string(gpu_health_states, buf);
+ if (state < 0) {
+ xe_err(xe, "[RAS]: invalid health state '%.*s'\n",
+ (int)strcspn(buf, "\n"), buf);
+ return -EINVAL;
+ }
+
+ request.new_health = (u8)state;
+
+ xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_SET_HEALTH,
+ &request, sizeof(request), &response, sizeof(response));
+ guard(xe_pm_runtime)(xe);
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "sysctrl: failed to send set health command %d\n", ret);
+ return ret;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "sysctrl: unexpected set health response length %zu (expected %zu)\n",
+ rlen, sizeof(response));
+ return -EIO;
+ }
+
+ ras_status = ras_status_to_errno(response.status);
+ if (ras_status) {
+ xe_err(xe, "sysctrl: set health command failed with status %d\n",
+ response.status);
+ return ras_status;
+ }
+
+ if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
+ xe_err(xe, "sysctrl: invalid health state %u\n",
+ response.current_health);
+ return -EIO;
+ }
+
+ health = (enum xe_ras_health_status)response.current_health;
+
+ xe_dbg(xe, "[RAS]: set health:%s\n", gpu_health_states[health]);
+
+ return count;
+}
+
+static DEVICE_ATTR_RW(gpu_health);
+
+static void gpu_health_sysfs_fini(void *arg)
+{
+ struct device *dev = arg;
+
+ device_remove_file(dev, &dev_attr_gpu_health);
+}
+
+static int gpu_health_sysfs_init(struct xe_device *xe)
+{
+ struct device *dev = xe->drm.dev;
+ int err;
+
+ err = device_create_file(dev, &dev_attr_gpu_health);
+ if (err)
+ return err;
+
+ err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize the RAS GPU health sysfs interface.
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+ int ret;
+
+ if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
+ return;
+
+ ret = gpu_health_sysfs_init(xe);
+ if (ret)
+ xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, err=%d\n", ret);
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index ea90593b62dc..8acfd0ffe48e 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -11,5 +11,6 @@ struct xe_sysctrl_event_response;
void xe_ras_counter_threshold_crossed(struct xe_device *xe,
struct xe_sysctrl_event_response *response);
+void xe_ras_init(struct xe_device *xe);
#endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 4e63c67f806a..4767bcf315a3 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -10,6 +10,21 @@
#define XE_RAS_NUM_COUNTERS 16
+/**
+ * enum xe_ras_health_status - Device health status values
+ *
+ * @XE_RAS_HEALTH_STATUS_OK: Device is healthy and operating normally.
+ * @XE_RAS_HEALTH_STATUS_WARNING: Device has minor issues but is still operational.
+ * @XE_RAS_HEALTH_STATUS_CRITICAL: Device is in a critical state and may not be operational.
+ * @XE_RAS_HEALTH_STATUS_MAX: Sentinel value for validation
+ */
+enum xe_ras_health_status {
+ XE_RAS_HEALTH_STATUS_OK = 0,
+ XE_RAS_HEALTH_STATUS_WARNING,
+ XE_RAS_HEALTH_STATUS_CRITICAL,
+ XE_RAS_HEALTH_STATUS_MAX
+};
+
/**
* struct xe_ras_error_common - Error fields that are common across all products
*/
@@ -70,4 +85,49 @@ struct xe_ras_threshold_crossed {
struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
} __packed;
+/**
+ * struct xe_ras_get_health_request - Request structure for GFSP GET_HEALTH
+ *
+ * GET_HEALTH takes no input parameters; the reserved payload is kept to
+ * preserve the firmware wire layout and allow future extensions. The
+ * driver must zero all reserved fields.
+ */
+struct xe_ras_get_health_request {
+ /** @reserved: Reserved for future use. */
+ u32 reserved[2];
+} __packed;
+
+/**
+ * struct xe_ras_get_health_response - Response structure for GFSP GET_HEALTH
+ */
+struct xe_ras_get_health_response {
+ /** @current_health: Current GPU health, see &enum xe_ras_health_status */
+ u8 current_health;
+ /** @reserved: Reserved for future use */
+ u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_set_health_request - Request structure for GFSP SET_HEALTH
+ */
+struct xe_ras_set_health_request {
+ /** @new_health: New GPU health to set, see &enum xe_ras_health_status */
+ u8 new_health;
+ /** @reserved: Reserved for future use */
+ u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_set_health_response - Response structure for GFSP SET_HEALTH
+ */
+struct xe_ras_set_health_response {
+ /** @status: Status of set health operation, see &enum xe_ras_response_status */
+ u32 status;
+ /** @current_health: Resulting current GPU health, see &enum xe_ras_health_status */
+ u8 current_health;
+ /** @reserved: Reserved for future use */
+ u8 reserved[3];
+ /** @reserved1: Reserved for future use */
+ u32 reserved1[2];
+} __packed;
#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
index 3caa9f15875f..9507f68bc2eb 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
@@ -293,6 +293,34 @@ static int sysctrl_send_command(struct xe_sysctrl *sc,
return 0;
}
+/**
+ * xe_sysctrl_create_command() - Create system controller command
+ * @command: Sysctrl command structure
+ * @group_id: Command group ID
+ * @cmd_id: Command ID
+ * @request: Pointer to request buffer (can be NULL)
+ * @request_len: Size of request buffer
+ * @response: Pointer to response buffer
+ * @response_len: Size of response buffer
+ *
+ * Helper function to build sysctrl command to be sent via %xe_sysctrl_send_command()
+ */
+void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
+ void *request, size_t request_len, void *response,
+ size_t response_len)
+{
+ struct xe_sysctrl_app_msg_hdr header = {0};
+
+ header.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, group_id) |
+ FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_id);
+
+ command->header = header;
+ command->data_in = request;
+ command->data_in_len = request_len;
+ command->data_out = response;
+ command->data_out_len = response_len;
+}
+
/**
* xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface
* @sc: System controller structure
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
index f67e9234de48..fb434cc165b2 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
@@ -23,6 +23,9 @@ struct xe_sysctrl_mailbox_command;
#define XE_SYSCTRL_APP_HDR_VERSION(hdr) \
FIELD_GET(APP_HDR_VERSION_MASK, (hdr)->data)
+void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
+ void *request, size_t request_len, void *response,
+ size_t response_len);
void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
int xe_sysctrl_send_command(struct xe_sysctrl *sc,
struct xe_sysctrl_mailbox_command *cmd,
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 84d7c647e743..f82e3fb9b5ef 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -23,9 +23,13 @@ enum xe_sysctrl_group {
* enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
*
* @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ * @XE_SYSCTRL_CMD_GET_HEALTH: Retrieve current health status
+ * @XE_SYSCTRL_CMD_SET_HEALTH: Set new health status
*/
enum xe_sysctrl_gfsp_cmd {
XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
+ XE_SYSCTRL_CMD_GET_HEALTH = 0x0B,
+ XE_SYSCTRL_CMD_SET_HEALTH = 0x0C,
};
/**
--
2.43.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Add support for GPU health indicator
2026-06-10 9:33 [PATCH v4 0/1] drm/xe: Add support for GPU health indicator Soham Purkait
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
@ 2026-06-10 9:39 ` Patchwork
2026-06-10 9:41 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-10 9:39 UTC (permalink / raw)
To: Soham Purkait; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add support for GPU health indicator
URL : https://patchwork.freedesktop.org/series/168235/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d85de8f3ff3c1ea5b77331325dc7f40fc86379b9
Author: Soham Purkait <soham.purkait@intel.com>
Date: Wed Jun 10 15:03:55 2026 +0530
drm/xe/xe_ras: Add RAS GPU health indicator
Add a sysfs interface that reports the current GPU health state and
lets admin users and management tools update it but is readable by all
users. Requests are routed through the sysctrl mailbox. The interface
is present only on platforms that support the GPU health indicator.
The interface is a single read/write file at the device level:
$ cat /sys/.../device/gpu_health
ok
$ echo critical > /sys/.../device/gpu_health
$ cat /sys/.../device/gpu_health
critical
v1:
- Add enum for health status. (Andi, Rodrigo)
- Return error number instead of error message in _show/_store. (Andi)
- Move GPU health sysfs init error logging to xe_ras_init. (Andi)
- Return only the current health state for sysfs read. (Andi, Rodrigo)
- Add documentation for sysfs interface. (Andi, Rodrigo)
v2:
- Make logs and structures consistent with their counterparts. (Riana)
- Drop unnecessary variables. (Andi, Riana)
- Add correct KernelVersion. (Raag)
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+ /mt/dim checkpatch 193309608df626b5a30da60ba647db20ebf027a8 drm-intel
d85de8f3ff3c drm/xe/xe_ras: Add RAS GPU health indicator
-:37: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#37:
new file mode 100644
-:117: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#117: FILE: drivers/gpu/drm/xe/xe_ras.c:71:
+};
+static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_STATUS_MAX);
total: 0 errors, 1 warnings, 1 checks, 365 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Add support for GPU health indicator
2026-06-10 9:33 [PATCH v4 0/1] drm/xe: Add support for GPU health indicator Soham Purkait
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
2026-06-10 9:39 ` ✗ CI.checkpatch: warning for drm/xe: Add support for " Patchwork
@ 2026-06-10 9:41 ` Patchwork
2026-06-10 10:25 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-10 16:14 ` ✓ Xe.CI.FULL: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-10 9:41 UTC (permalink / raw)
To: Soham Purkait; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add support for GPU health indicator
URL : https://patchwork.freedesktop.org/series/168235/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:39:58] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:40:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:40:34] Starting KUnit Kernel (1/1)...
[09:40:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:40:34] ================== guc_buf (11 subtests) ===================
[09:40:34] [PASSED] test_smallest
[09:40:34] [PASSED] test_largest
[09:40:34] [PASSED] test_granular
[09:40:34] [PASSED] test_unique
[09:40:34] [PASSED] test_overlap
[09:40:34] [PASSED] test_reusable
[09:40:34] [PASSED] test_too_big
[09:40:34] [PASSED] test_flush
[09:40:34] [PASSED] test_lookup
[09:40:34] [PASSED] test_data
[09:40:34] [PASSED] test_class
[09:40:34] ===================== [PASSED] guc_buf =====================
[09:40:34] =================== guc_dbm (7 subtests) ===================
[09:40:34] [PASSED] test_empty
[09:40:34] [PASSED] test_default
[09:40:34] ======================== test_size ========================
[09:40:34] [PASSED] 4
[09:40:34] [PASSED] 8
[09:40:34] [PASSED] 32
[09:40:34] [PASSED] 256
[09:40:34] ==================== [PASSED] test_size ====================
[09:40:34] ======================= test_reuse ========================
[09:40:34] [PASSED] 4
[09:40:34] [PASSED] 8
[09:40:34] [PASSED] 32
[09:40:34] [PASSED] 256
[09:40:34] =================== [PASSED] test_reuse ====================
[09:40:34] =================== test_range_overlap ====================
[09:40:34] [PASSED] 4
[09:40:34] [PASSED] 8
[09:40:34] [PASSED] 32
[09:40:34] [PASSED] 256
[09:40:34] =============== [PASSED] test_range_overlap ================
[09:40:34] =================== test_range_compact ====================
[09:40:34] [PASSED] 4
[09:40:34] [PASSED] 8
[09:40:34] [PASSED] 32
[09:40:34] [PASSED] 256
[09:40:34] =============== [PASSED] test_range_compact ================
[09:40:34] ==================== test_range_spare =====================
[09:40:34] [PASSED] 4
[09:40:34] [PASSED] 8
[09:40:34] [PASSED] 32
[09:40:34] [PASSED] 256
[09:40:34] ================ [PASSED] test_range_spare =================
[09:40:34] ===================== [PASSED] guc_dbm =====================
[09:40:34] =================== guc_idm (6 subtests) ===================
[09:40:34] [PASSED] bad_init
[09:40:34] [PASSED] no_init
[09:40:34] [PASSED] init_fini
[09:40:34] [PASSED] check_used
[09:40:34] [PASSED] check_quota
[09:40:34] [PASSED] check_all
[09:40:34] ===================== [PASSED] guc_idm =====================
[09:40:34] ================== no_relay (3 subtests) ===================
[09:40:34] [PASSED] xe_drops_guc2pf_if_not_ready
[09:40:34] [PASSED] xe_drops_guc2vf_if_not_ready
[09:40:34] [PASSED] xe_rejects_send_if_not_ready
[09:40:34] ==================== [PASSED] no_relay =====================
[09:40:34] ================== pf_relay (14 subtests) ==================
[09:40:34] [PASSED] pf_rejects_guc2pf_too_short
[09:40:34] [PASSED] pf_rejects_guc2pf_too_long
[09:40:34] [PASSED] pf_rejects_guc2pf_no_payload
[09:40:34] [PASSED] pf_fails_no_payload
[09:40:34] [PASSED] pf_fails_bad_origin
[09:40:34] [PASSED] pf_fails_bad_type
[09:40:34] [PASSED] pf_txn_reports_error
[09:40:34] [PASSED] pf_txn_sends_pf2guc
[09:40:34] [PASSED] pf_sends_pf2guc
[09:40:34] [SKIPPED] pf_loopback_nop
[09:40:34] [SKIPPED] pf_loopback_echo
[09:40:34] [SKIPPED] pf_loopback_fail
[09:40:34] [SKIPPED] pf_loopback_busy
[09:40:34] [SKIPPED] pf_loopback_retry
[09:40:34] ==================== [PASSED] pf_relay =====================
[09:40:34] ================== vf_relay (3 subtests) ===================
[09:40:34] [PASSED] vf_rejects_guc2vf_too_short
[09:40:34] [PASSED] vf_rejects_guc2vf_too_long
[09:40:34] [PASSED] vf_rejects_guc2vf_no_payload
[09:40:34] ==================== [PASSED] vf_relay =====================
[09:40:34] ================ pf_gt_config (9 subtests) =================
[09:40:34] [PASSED] fair_contexts_1vf
[09:40:34] [PASSED] fair_doorbells_1vf
[09:40:34] [PASSED] fair_ggtt_1vf
[09:40:34] ====================== fair_vram_1vf ======================
[09:40:34] [PASSED] 3.50 GiB
[09:40:34] [PASSED] 11.5 GiB
[09:40:34] [PASSED] 15.5 GiB
[09:40:34] [PASSED] 31.5 GiB
[09:40:34] [PASSED] 63.5 GiB
[09:40:34] [PASSED] 1.91 GiB
[09:40:34] ================== [PASSED] fair_vram_1vf ==================
[09:40:34] ================ fair_vram_1vf_admin_only =================
[09:40:34] [PASSED] 3.50 GiB
[09:40:34] [PASSED] 11.5 GiB
[09:40:34] [PASSED] 15.5 GiB
[09:40:34] [PASSED] 31.5 GiB
[09:40:34] [PASSED] 63.5 GiB
[09:40:34] [PASSED] 1.91 GiB
[09:40:34] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:40:34] ====================== fair_contexts ======================
[09:40:34] [PASSED] 1 VF
[09:40:34] [PASSED] 2 VFs
[09:40:34] [PASSED] 3 VFs
[09:40:34] [PASSED] 4 VFs
[09:40:34] [PASSED] 5 VFs
[09:40:34] [PASSED] 6 VFs
[09:40:34] [PASSED] 7 VFs
[09:40:34] [PASSED] 8 VFs
[09:40:34] [PASSED] 9 VFs
[09:40:34] [PASSED] 10 VFs
[09:40:34] [PASSED] 11 VFs
[09:40:34] [PASSED] 12 VFs
[09:40:34] [PASSED] 13 VFs
[09:40:34] [PASSED] 14 VFs
[09:40:34] [PASSED] 15 VFs
[09:40:34] [PASSED] 16 VFs
[09:40:34] [PASSED] 17 VFs
[09:40:34] [PASSED] 18 VFs
[09:40:34] [PASSED] 19 VFs
[09:40:34] [PASSED] 20 VFs
[09:40:34] [PASSED] 21 VFs
[09:40:34] [PASSED] 22 VFs
[09:40:34] [PASSED] 23 VFs
[09:40:34] [PASSED] 24 VFs
[09:40:34] [PASSED] 25 VFs
[09:40:34] [PASSED] 26 VFs
[09:40:34] [PASSED] 27 VFs
[09:40:34] [PASSED] 28 VFs
[09:40:34] [PASSED] 29 VFs
[09:40:34] [PASSED] 30 VFs
[09:40:34] [PASSED] 31 VFs
[09:40:34] [PASSED] 32 VFs
[09:40:34] [PASSED] 33 VFs
[09:40:34] [PASSED] 34 VFs
[09:40:34] [PASSED] 35 VFs
[09:40:34] [PASSED] 36 VFs
[09:40:34] [PASSED] 37 VFs
[09:40:34] [PASSED] 38 VFs
[09:40:34] [PASSED] 39 VFs
[09:40:34] [PASSED] 40 VFs
[09:40:34] [PASSED] 41 VFs
[09:40:34] [PASSED] 42 VFs
[09:40:34] [PASSED] 43 VFs
[09:40:34] [PASSED] 44 VFs
[09:40:34] [PASSED] 45 VFs
[09:40:34] [PASSED] 46 VFs
[09:40:34] [PASSED] 47 VFs
[09:40:34] [PASSED] 48 VFs
[09:40:34] [PASSED] 49 VFs
[09:40:34] [PASSED] 50 VFs
[09:40:34] [PASSED] 51 VFs
[09:40:34] [PASSED] 52 VFs
[09:40:34] [PASSED] 53 VFs
[09:40:34] [PASSED] 54 VFs
[09:40:34] [PASSED] 55 VFs
[09:40:34] [PASSED] 56 VFs
[09:40:34] [PASSED] 57 VFs
[09:40:34] [PASSED] 58 VFs
[09:40:34] [PASSED] 59 VFs
[09:40:34] [PASSED] 60 VFs
[09:40:34] [PASSED] 61 VFs
[09:40:34] [PASSED] 62 VFs
[09:40:34] [PASSED] 63 VFs
[09:40:34] ================== [PASSED] fair_contexts ==================
[09:40:34] ===================== fair_doorbells ======================
[09:40:34] [PASSED] 1 VF
[09:40:34] [PASSED] 2 VFs
[09:40:34] [PASSED] 3 VFs
[09:40:34] [PASSED] 4 VFs
[09:40:34] [PASSED] 5 VFs
[09:40:34] [PASSED] 6 VFs
[09:40:34] [PASSED] 7 VFs
[09:40:34] [PASSED] 8 VFs
[09:40:34] [PASSED] 9 VFs
[09:40:34] [PASSED] 10 VFs
[09:40:34] [PASSED] 11 VFs
[09:40:34] [PASSED] 12 VFs
[09:40:34] [PASSED] 13 VFs
[09:40:34] [PASSED] 14 VFs
[09:40:34] [PASSED] 15 VFs
[09:40:34] [PASSED] 16 VFs
[09:40:34] [PASSED] 17 VFs
[09:40:34] [PASSED] 18 VFs
[09:40:34] [PASSED] 19 VFs
[09:40:34] [PASSED] 20 VFs
[09:40:34] [PASSED] 21 VFs
[09:40:34] [PASSED] 22 VFs
[09:40:34] [PASSED] 23 VFs
[09:40:34] [PASSED] 24 VFs
[09:40:34] [PASSED] 25 VFs
[09:40:34] [PASSED] 26 VFs
[09:40:34] [PASSED] 27 VFs
[09:40:34] [PASSED] 28 VFs
[09:40:34] [PASSED] 29 VFs
[09:40:34] [PASSED] 30 VFs
[09:40:34] [PASSED] 31 VFs
[09:40:34] [PASSED] 32 VFs
[09:40:34] [PASSED] 33 VFs
[09:40:34] [PASSED] 34 VFs
[09:40:34] [PASSED] 35 VFs
[09:40:34] [PASSED] 36 VFs
[09:40:34] [PASSED] 37 VFs
[09:40:34] [PASSED] 38 VFs
[09:40:34] [PASSED] 39 VFs
[09:40:34] [PASSED] 40 VFs
[09:40:34] [PASSED] 41 VFs
[09:40:34] [PASSED] 42 VFs
[09:40:34] [PASSED] 43 VFs
[09:40:34] [PASSED] 44 VFs
[09:40:34] [PASSED] 45 VFs
[09:40:34] [PASSED] 46 VFs
[09:40:34] [PASSED] 47 VFs
[09:40:34] [PASSED] 48 VFs
[09:40:34] [PASSED] 49 VFs
[09:40:34] [PASSED] 50 VFs
[09:40:34] [PASSED] 51 VFs
[09:40:34] [PASSED] 52 VFs
[09:40:34] [PASSED] 53 VFs
[09:40:34] [PASSED] 54 VFs
[09:40:34] [PASSED] 55 VFs
[09:40:34] [PASSED] 56 VFs
[09:40:34] [PASSED] 57 VFs
[09:40:34] [PASSED] 58 VFs
[09:40:34] [PASSED] 59 VFs
[09:40:34] [PASSED] 60 VFs
[09:40:34] [PASSED] 61 VFs
[09:40:34] [PASSED] 62 VFs
[09:40:34] [PASSED] 63 VFs
[09:40:34] ================= [PASSED] fair_doorbells ==================
[09:40:34] ======================== fair_ggtt ========================
[09:40:34] [PASSED] 1 VF
[09:40:34] [PASSED] 2 VFs
[09:40:34] [PASSED] 3 VFs
[09:40:34] [PASSED] 4 VFs
[09:40:34] [PASSED] 5 VFs
[09:40:34] [PASSED] 6 VFs
[09:40:34] [PASSED] 7 VFs
[09:40:34] [PASSED] 8 VFs
[09:40:34] [PASSED] 9 VFs
[09:40:34] [PASSED] 10 VFs
[09:40:34] [PASSED] 11 VFs
[09:40:34] [PASSED] 12 VFs
[09:40:34] [PASSED] 13 VFs
[09:40:34] [PASSED] 14 VFs
[09:40:34] [PASSED] 15 VFs
[09:40:34] [PASSED] 16 VFs
[09:40:34] [PASSED] 17 VFs
[09:40:34] [PASSED] 18 VFs
[09:40:34] [PASSED] 19 VFs
[09:40:34] [PASSED] 20 VFs
[09:40:34] [PASSED] 21 VFs
[09:40:34] [PASSED] 22 VFs
[09:40:34] [PASSED] 23 VFs
[09:40:34] [PASSED] 24 VFs
[09:40:34] [PASSED] 25 VFs
[09:40:34] [PASSED] 26 VFs
[09:40:34] [PASSED] 27 VFs
[09:40:34] [PASSED] 28 VFs
[09:40:34] [PASSED] 29 VFs
[09:40:34] [PASSED] 30 VFs
[09:40:34] [PASSED] 31 VFs
[09:40:34] [PASSED] 32 VFs
[09:40:35] [PASSED] 33 VFs
[09:40:35] [PASSED] 34 VFs
[09:40:35] [PASSED] 35 VFs
[09:40:35] [PASSED] 36 VFs
[09:40:35] [PASSED] 37 VFs
[09:40:35] [PASSED] 38 VFs
[09:40:35] [PASSED] 39 VFs
[09:40:35] [PASSED] 40 VFs
[09:40:35] [PASSED] 41 VFs
[09:40:35] [PASSED] 42 VFs
[09:40:35] [PASSED] 43 VFs
[09:40:35] [PASSED] 44 VFs
[09:40:35] [PASSED] 45 VFs
[09:40:35] [PASSED] 46 VFs
[09:40:35] [PASSED] 47 VFs
[09:40:35] [PASSED] 48 VFs
[09:40:35] [PASSED] 49 VFs
[09:40:35] [PASSED] 50 VFs
[09:40:35] [PASSED] 51 VFs
[09:40:35] [PASSED] 52 VFs
[09:40:35] [PASSED] 53 VFs
[09:40:35] [PASSED] 54 VFs
[09:40:35] [PASSED] 55 VFs
[09:40:35] [PASSED] 56 VFs
[09:40:35] [PASSED] 57 VFs
[09:40:35] [PASSED] 58 VFs
[09:40:35] [PASSED] 59 VFs
[09:40:35] [PASSED] 60 VFs
[09:40:35] [PASSED] 61 VFs
[09:40:35] [PASSED] 62 VFs
[09:40:35] [PASSED] 63 VFs
[09:40:35] ==================== [PASSED] fair_ggtt ====================
[09:40:35] ======================== fair_vram ========================
[09:40:35] [PASSED] 1 VF
[09:40:35] [PASSED] 2 VFs
[09:40:35] [PASSED] 3 VFs
[09:40:35] [PASSED] 4 VFs
[09:40:35] [PASSED] 5 VFs
[09:40:35] [PASSED] 6 VFs
[09:40:35] [PASSED] 7 VFs
[09:40:35] [PASSED] 8 VFs
[09:40:35] [PASSED] 9 VFs
[09:40:35] [PASSED] 10 VFs
[09:40:35] [PASSED] 11 VFs
[09:40:35] [PASSED] 12 VFs
[09:40:35] [PASSED] 13 VFs
[09:40:35] [PASSED] 14 VFs
[09:40:35] [PASSED] 15 VFs
[09:40:35] [PASSED] 16 VFs
[09:40:35] [PASSED] 17 VFs
[09:40:35] [PASSED] 18 VFs
[09:40:35] [PASSED] 19 VFs
[09:40:35] [PASSED] 20 VFs
[09:40:35] [PASSED] 21 VFs
[09:40:35] [PASSED] 22 VFs
[09:40:35] [PASSED] 23 VFs
[09:40:35] [PASSED] 24 VFs
[09:40:35] [PASSED] 25 VFs
[09:40:35] [PASSED] 26 VFs
[09:40:35] [PASSED] 27 VFs
[09:40:35] [PASSED] 28 VFs
[09:40:35] [PASSED] 29 VFs
[09:40:35] [PASSED] 30 VFs
[09:40:35] [PASSED] 31 VFs
[09:40:35] [PASSED] 32 VFs
[09:40:35] [PASSED] 33 VFs
[09:40:35] [PASSED] 34 VFs
[09:40:35] [PASSED] 35 VFs
[09:40:35] [PASSED] 36 VFs
[09:40:35] [PASSED] 37 VFs
[09:40:35] [PASSED] 38 VFs
[09:40:35] [PASSED] 39 VFs
[09:40:35] [PASSED] 40 VFs
[09:40:35] [PASSED] 41 VFs
[09:40:35] [PASSED] 42 VFs
[09:40:35] [PASSED] 43 VFs
[09:40:35] [PASSED] 44 VFs
[09:40:35] [PASSED] 45 VFs
[09:40:35] [PASSED] 46 VFs
[09:40:35] [PASSED] 47 VFs
[09:40:35] [PASSED] 48 VFs
[09:40:35] [PASSED] 49 VFs
[09:40:35] [PASSED] 50 VFs
[09:40:35] [PASSED] 51 VFs
[09:40:35] [PASSED] 52 VFs
[09:40:35] [PASSED] 53 VFs
[09:40:35] [PASSED] 54 VFs
[09:40:35] [PASSED] 55 VFs
[09:40:35] [PASSED] 56 VFs
[09:40:35] [PASSED] 57 VFs
[09:40:35] [PASSED] 58 VFs
[09:40:35] [PASSED] 59 VFs
[09:40:35] [PASSED] 60 VFs
[09:40:35] [PASSED] 61 VFs
[09:40:35] [PASSED] 62 VFs
[09:40:35] [PASSED] 63 VFs
[09:40:35] ==================== [PASSED] fair_vram ====================
[09:40:35] ================== [PASSED] pf_gt_config ===================
[09:40:35] ===================== lmtt (1 subtest) =====================
[09:40:35] ======================== test_ops =========================
[09:40:35] [PASSED] 2-level
[09:40:35] [PASSED] multi-level
[09:40:35] ==================== [PASSED] test_ops =====================
[09:40:35] ====================== [PASSED] lmtt =======================
[09:40:35] ================= pf_service (11 subtests) =================
[09:40:35] [PASSED] pf_negotiate_any
[09:40:35] [PASSED] pf_negotiate_base_match
[09:40:35] [PASSED] pf_negotiate_base_newer
[09:40:35] [PASSED] pf_negotiate_base_next
[09:40:35] [SKIPPED] pf_negotiate_base_older
[09:40:35] [PASSED] pf_negotiate_base_prev
[09:40:35] [PASSED] pf_negotiate_latest_match
[09:40:35] [PASSED] pf_negotiate_latest_newer
[09:40:35] [PASSED] pf_negotiate_latest_next
[09:40:35] [SKIPPED] pf_negotiate_latest_older
[09:40:35] [SKIPPED] pf_negotiate_latest_prev
[09:40:35] =================== [PASSED] pf_service ====================
[09:40:35] ================= xe_guc_g2g (2 subtests) ==================
[09:40:35] ============== xe_live_guc_g2g_kunit_default ==============
[09:40:35] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:40:35] ============== xe_live_guc_g2g_kunit_allmem ===============
[09:40:35] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:40:35] =================== [SKIPPED] xe_guc_g2g ===================
[09:40:35] =================== xe_mocs (2 subtests) ===================
[09:40:35] ================ xe_live_mocs_kernel_kunit ================
[09:40:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:40:35] ================ xe_live_mocs_reset_kunit =================
[09:40:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:40:35] ==================== [SKIPPED] xe_mocs =====================
[09:40:35] ================= xe_migrate (2 subtests) ==================
[09:40:35] ================= xe_migrate_sanity_kunit =================
[09:40:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:40:35] ================== xe_validate_ccs_kunit ==================
[09:40:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:40:35] =================== [SKIPPED] xe_migrate ===================
[09:40:35] ================== xe_dma_buf (1 subtest) ==================
[09:40:35] ==================== xe_dma_buf_kunit =====================
[09:40:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:40:35] =================== [SKIPPED] xe_dma_buf ===================
[09:40:35] ================= xe_bo_shrink (1 subtest) =================
[09:40:35] =================== xe_bo_shrink_kunit ====================
[09:40:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:40:35] ================== [SKIPPED] xe_bo_shrink ==================
[09:40:35] ==================== xe_bo (2 subtests) ====================
[09:40:35] ================== xe_ccs_migrate_kunit ===================
[09:40:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:40:35] ==================== xe_bo_evict_kunit ====================
[09:40:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:40:35] ===================== [SKIPPED] xe_bo ======================
[09:40:35] ==================== args (13 subtests) ====================
[09:40:35] [PASSED] count_args_test
[09:40:35] [PASSED] call_args_example
[09:40:35] [PASSED] call_args_test
[09:40:35] [PASSED] drop_first_arg_example
[09:40:35] [PASSED] drop_first_arg_test
[09:40:35] [PASSED] first_arg_example
[09:40:35] [PASSED] first_arg_test
[09:40:35] [PASSED] last_arg_example
[09:40:35] [PASSED] last_arg_test
[09:40:35] [PASSED] pick_arg_example
[09:40:35] [PASSED] if_args_example
[09:40:35] [PASSED] if_args_test
[09:40:35] [PASSED] sep_comma_example
[09:40:35] ====================== [PASSED] args =======================
[09:40:35] =================== xe_pci (3 subtests) ====================
[09:40:35] ==================== check_graphics_ip ====================
[09:40:35] [PASSED] 12.00 Xe_LP
[09:40:35] [PASSED] 12.10 Xe_LP+
[09:40:35] [PASSED] 12.55 Xe_HPG
[09:40:35] [PASSED] 12.60 Xe_HPC
[09:40:35] [PASSED] 12.70 Xe_LPG
[09:40:35] [PASSED] 12.71 Xe_LPG
[09:40:35] [PASSED] 12.74 Xe_LPG+
[09:40:35] [PASSED] 20.01 Xe2_HPG
[09:40:35] [PASSED] 20.02 Xe2_HPG
[09:40:35] [PASSED] 20.04 Xe2_LPG
[09:40:35] [PASSED] 30.00 Xe3_LPG
[09:40:35] [PASSED] 30.01 Xe3_LPG
[09:40:35] [PASSED] 30.03 Xe3_LPG
[09:40:35] [PASSED] 30.04 Xe3_LPG
[09:40:35] [PASSED] 30.05 Xe3_LPG
[09:40:35] [PASSED] 35.10 Xe3p_LPG
[09:40:35] [PASSED] 35.11 Xe3p_XPC
[09:40:35] ================ [PASSED] check_graphics_ip ================
[09:40:35] ===================== check_media_ip ======================
[09:40:35] [PASSED] 12.00 Xe_M
[09:40:35] [PASSED] 12.55 Xe_HPM
[09:40:35] [PASSED] 13.00 Xe_LPM+
[09:40:35] [PASSED] 13.01 Xe2_HPM
[09:40:35] [PASSED] 20.00 Xe2_LPM
[09:40:35] [PASSED] 30.00 Xe3_LPM
[09:40:35] [PASSED] 30.02 Xe3_LPM
[09:40:35] [PASSED] 35.00 Xe3p_LPM
[09:40:35] [PASSED] 35.03 Xe3p_HPM
[09:40:35] ================= [PASSED] check_media_ip ==================
[09:40:35] =================== check_platform_desc ===================
[09:40:35] [PASSED] 0x9A60 (TIGERLAKE)
[09:40:35] [PASSED] 0x9A68 (TIGERLAKE)
[09:40:35] [PASSED] 0x9A70 (TIGERLAKE)
[09:40:35] [PASSED] 0x9A40 (TIGERLAKE)
[09:40:35] [PASSED] 0x9A49 (TIGERLAKE)
[09:40:35] [PASSED] 0x9A59 (TIGERLAKE)
[09:40:35] [PASSED] 0x9A78 (TIGERLAKE)
[09:40:35] [PASSED] 0x9AC0 (TIGERLAKE)
[09:40:35] [PASSED] 0x9AC9 (TIGERLAKE)
[09:40:35] [PASSED] 0x9AD9 (TIGERLAKE)
[09:40:35] [PASSED] 0x9AF8 (TIGERLAKE)
[09:40:35] [PASSED] 0x4C80 (ROCKETLAKE)
[09:40:35] [PASSED] 0x4C8A (ROCKETLAKE)
[09:40:35] [PASSED] 0x4C8B (ROCKETLAKE)
[09:40:35] [PASSED] 0x4C8C (ROCKETLAKE)
[09:40:35] [PASSED] 0x4C90 (ROCKETLAKE)
[09:40:35] [PASSED] 0x4C9A (ROCKETLAKE)
[09:40:35] [PASSED] 0x4680 (ALDERLAKE_S)
[09:40:35] [PASSED] 0x4682 (ALDERLAKE_S)
[09:40:35] [PASSED] 0x4688 (ALDERLAKE_S)
[09:40:35] [PASSED] 0x468A (ALDERLAKE_S)
[09:40:35] [PASSED] 0x468B (ALDERLAKE_S)
[09:40:35] [PASSED] 0x4690 (ALDERLAKE_S)
[09:40:35] [PASSED] 0x4692 (ALDERLAKE_S)
[09:40:35] [PASSED] 0x4693 (ALDERLAKE_S)
[09:40:35] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46AA (ALDERLAKE_P)
[09:40:35] [PASSED] 0x462A (ALDERLAKE_P)
[09:40:35] [PASSED] 0x4626 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x4628 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:40:35] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:40:35] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:40:35] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:40:35] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:40:35] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:40:35] [PASSED] 0xA721 (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA720 (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:40:35] [PASSED] 0xA780 (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA781 (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA782 (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA783 (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA788 (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA789 (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA78A (ALDERLAKE_S)
[09:40:35] [PASSED] 0xA78B (ALDERLAKE_S)
[09:40:35] [PASSED] 0x4905 (DG1)
[09:40:35] [PASSED] 0x4906 (DG1)
[09:40:35] [PASSED] 0x4907 (DG1)
[09:40:35] [PASSED] 0x4908 (DG1)
[09:40:35] [PASSED] 0x4909 (DG1)
[09:40:35] [PASSED] 0x56C0 (DG2)
[09:40:35] [PASSED] 0x56C2 (DG2)
[09:40:35] [PASSED] 0x56C1 (DG2)
[09:40:35] [PASSED] 0x7D51 (METEORLAKE)
[09:40:35] [PASSED] 0x7DD1 (METEORLAKE)
[09:40:35] [PASSED] 0x7D41 (METEORLAKE)
[09:40:35] [PASSED] 0x7D67 (METEORLAKE)
[09:40:35] [PASSED] 0xB640 (METEORLAKE)
[09:40:35] [PASSED] 0x56A0 (DG2)
[09:40:35] [PASSED] 0x56A1 (DG2)
[09:40:35] [PASSED] 0x56A2 (DG2)
[09:40:35] [PASSED] 0x56BE (DG2)
[09:40:35] [PASSED] 0x56BF (DG2)
[09:40:35] [PASSED] 0x5690 (DG2)
[09:40:35] [PASSED] 0x5691 (DG2)
[09:40:35] [PASSED] 0x5692 (DG2)
[09:40:35] [PASSED] 0x56A5 (DG2)
[09:40:35] [PASSED] 0x56A6 (DG2)
[09:40:35] [PASSED] 0x56B0 (DG2)
[09:40:35] [PASSED] 0x56B1 (DG2)
[09:40:35] [PASSED] 0x56BA (DG2)
[09:40:35] [PASSED] 0x56BB (DG2)
[09:40:35] [PASSED] 0x56BC (DG2)
[09:40:35] [PASSED] 0x56BD (DG2)
[09:40:35] [PASSED] 0x5693 (DG2)
[09:40:35] [PASSED] 0x5694 (DG2)
[09:40:35] [PASSED] 0x5695 (DG2)
[09:40:35] [PASSED] 0x56A3 (DG2)
[09:40:35] [PASSED] 0x56A4 (DG2)
[09:40:35] [PASSED] 0x56B2 (DG2)
[09:40:35] [PASSED] 0x56B3 (DG2)
[09:40:35] [PASSED] 0x5696 (DG2)
[09:40:35] [PASSED] 0x5697 (DG2)
[09:40:35] [PASSED] 0xB69 (PVC)
[09:40:35] [PASSED] 0xB6E (PVC)
[09:40:35] [PASSED] 0xBD4 (PVC)
[09:40:35] [PASSED] 0xBD5 (PVC)
[09:40:35] [PASSED] 0xBD6 (PVC)
[09:40:35] [PASSED] 0xBD7 (PVC)
[09:40:35] [PASSED] 0xBD8 (PVC)
[09:40:35] [PASSED] 0xBD9 (PVC)
[09:40:35] [PASSED] 0xBDA (PVC)
[09:40:35] [PASSED] 0xBDB (PVC)
[09:40:35] [PASSED] 0xBE0 (PVC)
[09:40:35] [PASSED] 0xBE1 (PVC)
[09:40:35] [PASSED] 0xBE5 (PVC)
[09:40:35] [PASSED] 0x7D40 (METEORLAKE)
[09:40:35] [PASSED] 0x7D45 (METEORLAKE)
[09:40:35] [PASSED] 0x7D55 (METEORLAKE)
[09:40:35] [PASSED] 0x7D60 (METEORLAKE)
[09:40:35] [PASSED] 0x7DD5 (METEORLAKE)
[09:40:35] [PASSED] 0x6420 (LUNARLAKE)
[09:40:35] [PASSED] 0x64A0 (LUNARLAKE)
[09:40:35] [PASSED] 0x64B0 (LUNARLAKE)
[09:40:35] [PASSED] 0xE202 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE209 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE20B (BATTLEMAGE)
[09:40:35] [PASSED] 0xE20C (BATTLEMAGE)
[09:40:35] [PASSED] 0xE20D (BATTLEMAGE)
[09:40:35] [PASSED] 0xE210 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE211 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE212 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE216 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE220 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE221 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE222 (BATTLEMAGE)
[09:40:35] [PASSED] 0xE223 (BATTLEMAGE)
[09:40:35] [PASSED] 0xB080 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB081 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB082 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB083 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB084 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB085 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB086 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB087 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB08F (PANTHERLAKE)
[09:40:35] [PASSED] 0xB090 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:40:35] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:40:35] [PASSED] 0xFD80 (PANTHERLAKE)
[09:40:35] [PASSED] 0xFD81 (PANTHERLAKE)
[09:40:35] [PASSED] 0xD740 (NOVALAKE_S)
[09:40:35] [PASSED] 0xD741 (NOVALAKE_S)
[09:40:35] [PASSED] 0xD742 (NOVALAKE_S)
[09:40:35] [PASSED] 0xD743 (NOVALAKE_S)
[09:40:35] [PASSED] 0xD745 (NOVALAKE_S)
[09:40:35] [PASSED] 0xD74A (NOVALAKE_S)
[09:40:35] [PASSED] 0xD74B (NOVALAKE_S)
[09:40:35] [PASSED] 0x674C (CRESCENTISLAND)
[09:40:35] [PASSED] 0x674D (CRESCENTISLAND)
[09:40:35] [PASSED] 0x674E (CRESCENTISLAND)
[09:40:35] [PASSED] 0x674F (CRESCENTISLAND)
[09:40:35] [PASSED] 0x6750 (CRESCENTISLAND)
[09:40:35] [PASSED] 0xD750 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD751 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD752 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD753 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD754 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD755 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD756 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD757 (NOVALAKE_P)
[09:40:35] [PASSED] 0xD75F (NOVALAKE_P)
[09:40:35] =============== [PASSED] check_platform_desc ===============
[09:40:35] ===================== [PASSED] xe_pci ======================
[09:40:35] ============= xe_rtp_tables_test (4 subtests) ==============
[09:40:35] ================== xe_rtp_table_gt_test ===================
[09:40:35] [PASSED] gt_was/14011060649
[09:40:35] [PASSED] gt_was/14011059788
[09:40:35] [PASSED] gt_was/14015795083
[09:40:35] [PASSED] gt_was/16021867713
[09:40:35] [PASSED] gt_was/14019449301
[09:40:35] [PASSED] gt_was/16028005424
[09:40:35] [PASSED] gt_was/14026578760
[09:40:35] [PASSED] gt_was/1409420604
[09:40:35] [PASSED] gt_was/1408615072
[09:40:35] [PASSED] gt_was/22010523718
[09:40:35] [PASSED] gt_was/14011006942
[09:40:35] [PASSED] gt_was/14014830051
[09:40:35] [PASSED] gt_was/18018781329
[09:40:35] [PASSED] gt_was/1509235366
[09:40:35] [PASSED] gt_was/18018781329
[09:40:35] [PASSED] gt_was/16016694945
[09:40:35] [PASSED] gt_was/14018575942
[09:40:35] [PASSED] gt_was/22016670082
[09:40:35] [PASSED] gt_was/22016670082
[09:40:35] [PASSED] gt_was/14017421178
[09:40:35] [PASSED] gt_was/16025250150
[09:40:35] [PASSED] gt_was/14021871409
[09:40:35] [PASSED] gt_was/16021865536
[09:40:35] [PASSED] gt_was/14021486841
[09:40:35] [PASSED] gt_was/14025160223
[09:40:35] [PASSED] gt_was/14026144927, 16029437861
[09:40:35] [PASSED] gt_was/14025635424
[09:40:35] [PASSED] gt_was/16028005424
[09:40:35] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:40:35] ================== xe_rtp_table_gt_test ===================
[09:40:35] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[09:40:35] [PASSED] gt_tunings/Tuning: 32B Access Enable
[09:40:35] [PASSED] gt_tunings/Tuning: L3 cache
[09:40:35] [PASSED] gt_tunings/Tuning: L3 cache - media
[09:40:35] [PASSED] gt_tunings/Tuning: Compression Overfetch
[09:40:35] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[09:40:35] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[09:40:35] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[09:40:35] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[09:40:35] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[09:40:35] [PASSED] gt_tunings/Tuning: Stateless compression control
[09:40:35] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[09:40:35] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[09:40:35] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[09:40:35] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[09:40:35] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:40:35] ================== xe_rtp_table_oob_test ==================
[09:40:35] [PASSED] oob_was/1607983814
[09:40:35] [PASSED] oob_was/16010904313
[09:40:35] [PASSED] oob_was/18022495364
[09:40:35] [PASSED] oob_was/22012773006
[09:40:35] [PASSED] oob_was/14014475959
[09:40:35] [PASSED] oob_was/22011391025
[09:40:35] [PASSED] oob_was/22012727170
[09:40:35] [PASSED] oob_was/22012727685
[09:40:35] [PASSED] oob_was/22016596838
[09:40:35] [PASSED] oob_was/18020744125
[09:40:35] [PASSED] oob_was/1409600907
[09:40:35] [PASSED] oob_was/22014953428
[09:40:35] [PASSED] oob_was/16017236439
[09:40:35] [PASSED] oob_was/14019821291
[09:40:35] [PASSED] oob_was/14015076503
[09:40:35] [PASSED] oob_was/14018913170
[09:40:35] [PASSED] oob_was/14018094691
[09:40:35] [PASSED] oob_was/18024947630
[09:40:35] [PASSED] oob_was/16022287689
[09:40:35] [PASSED] oob_was/13011645652
[09:40:35] [PASSED] oob_was/14022293748
[09:40:35] [PASSED] oob_was/22019794406
[09:40:35] [PASSED] oob_was/22019338487
[09:40:35] [PASSED] oob_was/16023588340
[09:40:35] [PASSED] oob_was/14019789679
[09:40:35] [PASSED] oob_was/14022866841
[09:40:35] [PASSED] oob_was/16021333562
[09:40:35] [PASSED] oob_was/14016712196
[09:40:35] [PASSED] oob_was/14015568240
[09:40:35] [PASSED] oob_was/18013179988
[09:40:35] [PASSED] oob_was/1508761755
[09:40:35] [PASSED] oob_was/16023105232
[09:40:35] [PASSED] oob_was/16026508708
[09:40:35] [PASSED] oob_was/14020001231
[09:40:35] [PASSED] oob_was/16023683509
[09:40:35] [PASSED] oob_was/14025515070
[09:40:35] [PASSED] oob_was/15015404425_disable
[09:40:35] [PASSED] oob_was/16026007364
[09:40:35] [PASSED] oob_was/14020316580
[09:40:35] [PASSED] oob_was/14025883347
[09:40:35] ============== [PASSED] xe_rtp_table_oob_test ==============
[09:40:35] ================ xe_rtp_table_dev_oob_test ================
[09:40:35] [PASSED] device_oob_was/22010954014
[09:40:35] [PASSED] device_oob_was/15015404425
[09:40:35] [PASSED] device_oob_was/22019338487_display
[09:40:35] [PASSED] device_oob_was/14022085890
[09:40:35] [PASSED] device_oob_was/14026539277
[09:40:35] [PASSED] device_oob_was/14026633728
[09:40:35] [PASSED] device_oob_was/14026746987
[09:40:35] [PASSED] device_oob_was/14026779378
[09:40:35] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[09:40:35] =============== [PASSED] xe_rtp_tables_test ================
[09:40:35] =================== xe_rtp (3 subtests) ====================
[09:40:35] =================== xe_rtp_rules_tests ====================
[09:40:35] [PASSED] no
[09:40:35] [PASSED] yes
[09:40:35] [PASSED] no-and-no
[09:40:35] [PASSED] no-and-yes
[09:40:35] [PASSED] yes-and-no
[09:40:35] [PASSED] yes-and-yes
[09:40:35] [PASSED] no-or-no
[09:40:35] [PASSED] no-or-yes
[09:40:35] [PASSED] yes-or-no
[09:40:35] [PASSED] yes-or-yes
[09:40:35] [PASSED] no-yes-or-yes-no
[09:40:35] [PASSED] no-yes-or-yes-yes
[09:40:35] [PASSED] yes-yes-or-no-yes
[09:40:35] [PASSED] yes-yes-or-yes-yes
[09:40:35] [PASSED] no-no-or-yes-or-no
[09:40:35] [PASSED] or
[09:40:35] [PASSED] or-yes
[09:40:35] [PASSED] or-no
[09:40:35] [PASSED] yes-or
[09:40:35] [PASSED] no-or
[09:40:35] [PASSED] no-or-or-yes
[09:40:35] [PASSED] yes-or-or-no
[09:40:35] [PASSED] no-or-or-no
[09:40:35] [PASSED] missing-context-engine-class
[09:40:35] [PASSED] missing-context-engine-class-or-yes
[09:40:35] [PASSED] missing-context-engine-class-or-or-yes
[09:40:35] =============== [PASSED] xe_rtp_rules_tests ================
[09:40:35] =============== xe_rtp_process_to_sr_tests ================
[09:40:35] [PASSED] coalesce-same-reg
[09:40:35] [PASSED] no-match-no-add
[09:40:35] [PASSED] two-regs-two-entries
[09:40:35] [PASSED] clr-one-set-other
[09:40:35] [PASSED] set-field
[09:40:35] [PASSED] conflict-duplicate
[09:40:35] [PASSED] conflict-not-disjoint
[09:40:35] [PASSED] conflict-reg-type
[09:40:35] [PASSED] bad-mcr-reg-forced-to-regular
[09:40:35] [PASSED] bad-regular-reg-forced-to-mcr
[09:40:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:40:35] ================== xe_rtp_process_tests ===================
[09:40:35] [PASSED] active1
[09:40:35] [PASSED] active2
[09:40:35] [PASSED] active-inactive
[09:40:35] [PASSED] inactive-active
[09:40:35] [PASSED] inactive-active-inactive
[09:40:35] [PASSED] inactive-inactive-inactive
[09:40:35] ============== [PASSED] xe_rtp_process_tests ===============
[09:40:35] ===================== [PASSED] xe_rtp ======================
[09:40:35] ==================== xe_wa (1 subtest) =====================
[09:40:35] ======================== xe_wa_gt =========================
[09:40:35] [PASSED] TIGERLAKE B0
[09:40:35] [PASSED] DG1 A0
[09:40:35] [PASSED] DG1 B0
[09:40:35] [PASSED] ALDERLAKE_S A0
[09:40:35] [PASSED] ALDERLAKE_S B0
[09:40:35] [PASSED] ALDERLAKE_S C0
[09:40:35] [PASSED] ALDERLAKE_S D0
[09:40:35] [PASSED] ALDERLAKE_P A0
[09:40:35] [PASSED] ALDERLAKE_P B0
[09:40:35] [PASSED] ALDERLAKE_P C0
[09:40:35] [PASSED] ALDERLAKE_S RPLS D0
[09:40:35] [PASSED] ALDERLAKE_P RPLU E0
[09:40:35] [PASSED] DG2 G10 C0
[09:40:35] [PASSED] DG2 G11 B1
[09:40:35] [PASSED] DG2 G12 A1
[09:40:35] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:40:35] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:40:35] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:40:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:40:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:40:35] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:40:35] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:40:35] ==================== [PASSED] xe_wa_gt =====================
[09:40:35] ====================== [PASSED] xe_wa ======================
[09:40:35] ============================================================
[09:40:35] Testing complete. Ran 716 tests: passed: 698, skipped: 18
[09:40:35] Elapsed time: 36.209s total, 4.338s configuring, 31.204s building, 0.642s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:40:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:40:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
In file included from ../drivers/gpu/drm/tests/drm_bridge_test.c:21:
../drivers/gpu/drm/tests/drm_kunit_edid.h:958:28: warning: ‘test_edid_hdmi_4k_rgb_yuv420_dc_max_340mhz’ defined but not used [-Wunused-const-variable=]
958 | static const unsigned char test_edid_hdmi_4k_rgb_yuv420_dc_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:726:28: warning: ‘test_edid_hdmi_1080p_rgb_yuv_dc_max_340mhz’ defined but not used [-Wunused-const-variable=]
726 | static const unsigned char test_edid_hdmi_1080p_rgb_yuv_dc_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:612:28: warning: ‘test_edid_hdmi_1080p_rgb_yuv_dc_max_200mhz’ defined but not used [-Wunused-const-variable=]
612 | static const unsigned char test_edid_hdmi_1080p_rgb_yuv_dc_max_200mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:498:28: warning: ‘test_edid_hdmi_1080p_rgb_max_340mhz’ defined but not used [-Wunused-const-variable=]
498 | static const unsigned char test_edid_hdmi_1080p_rgb_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:390:28: warning: ‘test_edid_hdmi_1080p_rgb_max_200mhz_hdr’ defined but not used [-Wunused-const-variable=]
390 | static const unsigned char test_edid_hdmi_1080p_rgb_max_200mhz_hdr[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:271:28: warning: ‘test_edid_hdmi_1080p_rgb_max_200mhz’ defined but not used [-Wunused-const-variable=]
271 | static const unsigned char test_edid_hdmi_1080p_rgb_max_200mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:163:28: warning: ‘test_edid_hdmi_1080p_rgb_max_100mhz’ defined but not used [-Wunused-const-variable=]
163 | static const unsigned char test_edid_hdmi_1080p_rgb_max_100mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:57:28: warning: ‘test_edid_dvi_1080p’ defined but not used [-Wunused-const-variable=]
57 | static const unsigned char test_edid_dvi_1080p[] = {
| ^~~~~~~~~~~~~~~~~~~
[09:41:01] Starting KUnit Kernel (1/1)...
[09:41:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:41:01] ============ drm_test_pick_cmdline (2 subtests) ============
[09:41:01] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:41:01] =============== drm_test_pick_cmdline_named ===============
[09:41:01] [PASSED] NTSC
[09:41:01] [PASSED] NTSC-J
[09:41:01] [PASSED] PAL
[09:41:01] [PASSED] PAL-M
[09:41:01] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:41:01] ============== [PASSED] drm_test_pick_cmdline ==============
[09:41:01] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:41:01] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:41:01] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:41:01] =========== drm_validate_clone_mode (2 subtests) ===========
[09:41:01] ============== drm_test_check_in_clone_mode ===============
[09:41:01] [PASSED] in_clone_mode
[09:41:01] [PASSED] not_in_clone_mode
[09:41:01] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:41:01] =============== drm_test_check_valid_clones ===============
[09:41:01] [PASSED] not_in_clone_mode
[09:41:01] [PASSED] valid_clone
[09:41:01] [PASSED] invalid_clone
[09:41:01] =========== [PASSED] drm_test_check_valid_clones ===========
[09:41:01] ============= [PASSED] drm_validate_clone_mode =============
[09:41:01] ============= drm_validate_modeset (1 subtest) =============
[09:41:01] [PASSED] drm_test_check_connector_changed_modeset
[09:41:01] ============== [PASSED] drm_validate_modeset ===============
[09:41:01] ====== drm_test_bridge_get_current_state (2 subtests) ======
[09:41:01] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:41:01] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[09:41:01] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:41:01] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[09:41:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:41:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:41:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[09:41:01] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[09:41:01] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:41:01] ============== drm_bridge_alloc (2 subtests) ===============
[09:41:01] [PASSED] drm_test_drm_bridge_alloc_basic
[09:41:01] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:41:01] ================ [PASSED] drm_bridge_alloc =================
[09:41:01] ============= drm_bridge_bus_fmt (5 subtests) ==============
[09:41:01] [PASSED] drm_test_bridge_rgb_yuv_rgb
[09:41:01] [PASSED] drm_test_bridge_must_convert_to_yuv444
[09:41:01] [PASSED] drm_test_bridge_hdmi_auto_rgb
[09:41:01] [PASSED] drm_test_bridge_auto_first
[09:41:01] [PASSED] drm_test_bridge_rgb_yuv_no_path
[09:41:01] =============== [PASSED] drm_bridge_bus_fmt ================
[09:41:01] ============= drm_cmdline_parser (40 subtests) =============
[09:41:01] [PASSED] drm_test_cmdline_force_d_only
[09:41:01] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:41:01] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:41:01] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:41:01] [PASSED] drm_test_cmdline_force_e_only
[09:41:01] [PASSED] drm_test_cmdline_res
[09:41:01] [PASSED] drm_test_cmdline_res_vesa
[09:41:01] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:41:01] [PASSED] drm_test_cmdline_res_rblank
[09:41:01] [PASSED] drm_test_cmdline_res_bpp
[09:41:01] [PASSED] drm_test_cmdline_res_refresh
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:41:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:41:01] [PASSED] drm_test_cmdline_res_margins_force_on
[09:41:01] [PASSED] drm_test_cmdline_res_vesa_margins
[09:41:01] [PASSED] drm_test_cmdline_name
[09:41:01] [PASSED] drm_test_cmdline_name_bpp
[09:41:01] [PASSED] drm_test_cmdline_name_option
[09:41:01] [PASSED] drm_test_cmdline_name_bpp_option
[09:41:01] [PASSED] drm_test_cmdline_rotate_0
[09:41:01] [PASSED] drm_test_cmdline_rotate_90
[09:41:01] [PASSED] drm_test_cmdline_rotate_180
[09:41:01] [PASSED] drm_test_cmdline_rotate_270
[09:41:01] [PASSED] drm_test_cmdline_hmirror
[09:41:01] [PASSED] drm_test_cmdline_vmirror
[09:41:01] [PASSED] drm_test_cmdline_margin_options
[09:41:01] [PASSED] drm_test_cmdline_multiple_options
[09:41:01] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:41:01] [PASSED] drm_test_cmdline_extra_and_option
[09:41:01] [PASSED] drm_test_cmdline_freestanding_options
[09:41:01] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:41:01] [PASSED] drm_test_cmdline_panel_orientation
[09:41:01] ================ drm_test_cmdline_invalid =================
[09:41:01] [PASSED] margin_only
[09:41:01] [PASSED] interlace_only
[09:41:01] [PASSED] res_missing_x
[09:41:01] [PASSED] res_missing_y
[09:41:01] [PASSED] res_bad_y
[09:41:01] [PASSED] res_missing_y_bpp
[09:41:01] [PASSED] res_bad_bpp
[09:41:01] [PASSED] res_bad_refresh
[09:41:01] [PASSED] res_bpp_refresh_force_on_off
[09:41:01] [PASSED] res_invalid_mode
[09:41:01] [PASSED] res_bpp_wrong_place_mode
[09:41:01] [PASSED] name_bpp_refresh
[09:41:01] [PASSED] name_refresh
[09:41:01] [PASSED] name_refresh_wrong_mode
[09:41:01] [PASSED] name_refresh_invalid_mode
[09:41:01] [PASSED] rotate_multiple
[09:41:01] [PASSED] rotate_invalid_val
[09:41:01] [PASSED] rotate_truncated
[09:41:01] [PASSED] invalid_option
[09:41:01] [PASSED] invalid_tv_option
[09:41:01] [PASSED] truncated_tv_option
[09:41:01] ============ [PASSED] drm_test_cmdline_invalid =============
[09:41:01] =============== drm_test_cmdline_tv_options ===============
[09:41:01] [PASSED] NTSC
[09:41:01] [PASSED] NTSC_443
[09:41:01] [PASSED] NTSC_J
[09:41:01] [PASSED] PAL
[09:41:01] [PASSED] PAL_M
[09:41:01] [PASSED] PAL_N
[09:41:01] [PASSED] SECAM
[09:41:01] [PASSED] MONO_525
[09:41:01] [PASSED] MONO_625
[09:41:01] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:41:01] =============== [PASSED] drm_cmdline_parser ================
[09:41:01] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:41:01] [PASSED] drm_test_connector_hdmi_init_valid
[09:41:01] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:41:01] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:41:01] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:41:01] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:41:01] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:41:01] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:41:01] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:41:01] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:41:01] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:41:01] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:41:01] [PASSED] supported_formats=0x5 yuv420_allowed=1
[09:41:01] [PASSED] supported_formats=0x5 yuv420_allowed=0
[09:41:01] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:41:01] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:41:01] [PASSED] drm_test_connector_hdmi_init_null_product
[09:41:01] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:41:01] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:41:01] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:41:01] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:41:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:41:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:41:01] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:41:01] ========= drm_test_connector_hdmi_init_type_valid =========
[09:41:01] [PASSED] HDMI-A
[09:41:01] [PASSED] HDMI-B
[09:41:01] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:41:01] ======== drm_test_connector_hdmi_init_type_invalid ========
[09:41:01] [PASSED] Unknown
[09:41:01] [PASSED] VGA
[09:41:01] [PASSED] DVI-I
[09:41:01] [PASSED] DVI-D
[09:41:01] [PASSED] DVI-A
[09:41:01] [PASSED] Composite
[09:41:01] [PASSED] SVIDEO
[09:41:01] [PASSED] LVDS
[09:41:01] [PASSED] Component
[09:41:01] [PASSED] DIN
[09:41:01] [PASSED] DP
[09:41:01] [PASSED] TV
[09:41:01] [PASSED] eDP
[09:41:01] [PASSED] Virtual
[09:41:01] [PASSED] DSI
[09:41:01] [PASSED] DPI
[09:41:01] [PASSED] Writeback
[09:41:01] [PASSED] SPI
[09:41:01] [PASSED] USB
[09:41:01] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:41:01] ============ [PASSED] drmm_connector_hdmi_init =============
[09:41:01] ============= drmm_connector_init (3 subtests) =============
[09:41:01] [PASSED] drm_test_drmm_connector_init
[09:41:01] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:41:01] ========= drm_test_drmm_connector_init_type_valid =========
[09:41:01] [PASSED] Unknown
[09:41:01] [PASSED] VGA
[09:41:01] [PASSED] DVI-I
[09:41:01] [PASSED] DVI-D
[09:41:01] [PASSED] DVI-A
[09:41:01] [PASSED] Composite
[09:41:01] [PASSED] SVIDEO
[09:41:01] [PASSED] LVDS
[09:41:01] [PASSED] Component
[09:41:01] [PASSED] DIN
[09:41:01] [PASSED] DP
[09:41:01] [PASSED] HDMI-A
[09:41:01] [PASSED] HDMI-B
[09:41:01] [PASSED] TV
[09:41:01] [PASSED] eDP
[09:41:01] [PASSED] Virtual
[09:41:01] [PASSED] DSI
[09:41:01] [PASSED] DPI
[09:41:01] [PASSED] Writeback
[09:41:01] [PASSED] SPI
[09:41:01] [PASSED] USB
[09:41:01] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:41:01] =============== [PASSED] drmm_connector_init ===============
[09:41:01] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_init
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:41:01] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[09:41:01] [PASSED] Unknown
[09:41:01] [PASSED] VGA
[09:41:01] [PASSED] DVI-I
[09:41:01] [PASSED] DVI-D
[09:41:01] [PASSED] DVI-A
[09:41:01] [PASSED] Composite
[09:41:01] [PASSED] SVIDEO
[09:41:01] [PASSED] LVDS
[09:41:01] [PASSED] Component
[09:41:01] [PASSED] DIN
[09:41:01] [PASSED] DP
[09:41:01] [PASSED] HDMI-A
[09:41:01] [PASSED] HDMI-B
[09:41:01] [PASSED] TV
[09:41:01] [PASSED] eDP
[09:41:01] [PASSED] Virtual
[09:41:01] [PASSED] DSI
[09:41:01] [PASSED] DPI
[09:41:01] [PASSED] Writeback
[09:41:01] [PASSED] SPI
[09:41:01] [PASSED] USB
[09:41:01] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:41:01] ======== drm_test_drm_connector_dynamic_init_name =========
[09:41:01] [PASSED] Unknown
[09:41:01] [PASSED] VGA
[09:41:01] [PASSED] DVI-I
[09:41:01] [PASSED] DVI-D
[09:41:01] [PASSED] DVI-A
[09:41:01] [PASSED] Composite
[09:41:01] [PASSED] SVIDEO
[09:41:01] [PASSED] LVDS
[09:41:01] [PASSED] Component
[09:41:01] [PASSED] DIN
[09:41:01] [PASSED] DP
[09:41:01] [PASSED] HDMI-A
[09:41:01] [PASSED] HDMI-B
[09:41:01] [PASSED] TV
[09:41:01] [PASSED] eDP
[09:41:01] [PASSED] Virtual
[09:41:01] [PASSED] DSI
[09:41:01] [PASSED] DPI
[09:41:01] [PASSED] Writeback
[09:41:01] [PASSED] SPI
[09:41:01] [PASSED] USB
[09:41:01] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:41:01] =========== [PASSED] drm_connector_dynamic_init ============
[09:41:01] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:41:01] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:41:01] ======= drm_connector_dynamic_register (7 subtests) ========
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:41:01] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:41:01] ========= [PASSED] drm_connector_dynamic_register ==========
[09:41:01] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:41:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:41:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:41:01] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:41:01] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:41:01] ========== drm_test_get_tv_mode_from_name_valid ===========
[09:41:01] [PASSED] NTSC
[09:41:01] [PASSED] NTSC-443
[09:41:01] [PASSED] NTSC-J
[09:41:01] [PASSED] PAL
[09:41:01] [PASSED] PAL-M
[09:41:01] [PASSED] PAL-N
[09:41:01] [PASSED] SECAM
[09:41:01] [PASSED] Mono
[09:41:01] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:41:01] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:41:01] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:41:01] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:41:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:41:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:41:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:41:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:41:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:41:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:41:01] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[09:41:01] [PASSED] VIC 96
[09:41:01] [PASSED] VIC 97
[09:41:01] [PASSED] VIC 101
[09:41:01] [PASSED] VIC 102
[09:41:01] [PASSED] VIC 106
[09:41:01] [PASSED] VIC 107
[09:41:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:41:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:41:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:41:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:41:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:41:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:41:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:41:01] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:41:01] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[09:41:01] [PASSED] Automatic
[09:41:01] [PASSED] Full
[09:41:01] [PASSED] Limited 16:235
[09:41:01] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:41:01] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:41:01] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:41:01] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:41:01] === drm_test_drm_hdmi_connector_get_output_format_name ====
[09:41:01] [PASSED] RGB
[09:41:01] [PASSED] YUV 4:2:0
[09:41:01] [PASSED] YUV 4:2:2
[09:41:01] [PASSED] YUV 4:4:4
[09:41:01] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:41:01] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:41:01] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:41:01] ============= drm_damage_helper (21 subtests) ==============
[09:41:01] [PASSED] drm_test_damage_iter_no_damage
[09:41:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:41:01] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:41:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:41:01] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:41:01] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:41:01] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:41:01] [PASSED] drm_test_damage_iter_simple_damage
[09:41:01] [PASSED] drm_test_damage_iter_single_damage
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:41:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:41:01] [PASSED] drm_test_damage_iter_damage
[09:41:01] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:41:01] [PASSED] drm_test_damage_iter_damage_one_outside
[09:41:01] [PASSED] drm_test_damage_iter_damage_src_moved
[09:41:01] [PASSED] drm_test_damage_iter_damage_not_visible
[09:41:01] ================ [PASSED] drm_damage_helper ================
[09:41:01] ============== drm_dp_mst_helper (3 subtests) ==============
[09:41:01] ============== drm_test_dp_mst_calc_pbn_mode ==============
[09:41:01] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:41:01] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:41:01] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:41:01] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:41:01] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:41:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:41:01] ============== drm_test_dp_mst_calc_pbn_div ===============
[09:41:01] [PASSED] Link rate 2000000 lane count 4
[09:41:01] [PASSED] Link rate 2000000 lane count 2
[09:41:01] [PASSED] Link rate 2000000 lane count 1
[09:41:01] [PASSED] Link rate 1350000 lane count 4
[09:41:01] [PASSED] Link rate 1350000 lane count 2
[09:41:01] [PASSED] Link rate 1350000 lane count 1
[09:41:01] [PASSED] Link rate 1000000 lane count 4
[09:41:01] [PASSED] Link rate 1000000 lane count 2
[09:41:01] [PASSED] Link rate 1000000 lane count 1
[09:41:01] [PASSED] Link rate 810000 lane count 4
[09:41:01] [PASSED] Link rate 810000 lane count 2
[09:41:01] [PASSED] Link rate 810000 lane count 1
[09:41:01] [PASSED] Link rate 540000 lane count 4
[09:41:01] [PASSED] Link rate 540000 lane count 2
[09:41:01] [PASSED] Link rate 540000 lane count 1
[09:41:01] [PASSED] Link rate 270000 lane count 4
[09:41:01] [PASSED] Link rate 270000 lane count 2
[09:41:01] [PASSED] Link rate 270000 lane count 1
[09:41:01] [PASSED] Link rate 162000 lane count 4
[09:41:01] [PASSED] Link rate 162000 lane count 2
[09:41:01] [PASSED] Link rate 162000 lane count 1
[09:41:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:41:01] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[09:41:01] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:41:01] [PASSED] DP_POWER_UP_PHY with port number
[09:41:01] [PASSED] DP_POWER_DOWN_PHY with port number
[09:41:01] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:41:01] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:41:01] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:41:01] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:41:01] [PASSED] DP_QUERY_PAYLOAD with port number
[09:41:01] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:41:01] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:41:01] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:41:01] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:41:01] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:41:01] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:41:01] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:41:01] [PASSED] DP_REMOTE_I2C_READ with port number
[09:41:01] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:41:01] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:41:01] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:41:01] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:41:01] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:41:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:41:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:41:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:41:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:41:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:41:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:41:01] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:41:01] ================ [PASSED] drm_dp_mst_helper ================
[09:41:01] ================== drm_exec (7 subtests) ===================
[09:41:01] [PASSED] sanitycheck
[09:41:01] [PASSED] test_lock
[09:41:01] [PASSED] test_lock_unlock
[09:41:01] [PASSED] test_duplicates
[09:41:01] [PASSED] test_prepare
[09:41:01] [PASSED] test_prepare_array
[09:41:01] [PASSED] test_multiple_loops
[09:41:01] ==================== [PASSED] drm_exec =====================
[09:41:01] =========== drm_format_helper_test (17 subtests) ===========
[09:41:01] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:41:01] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:41:01] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:41:01] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:41:01] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:41:01] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:41:01] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:41:01] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:41:01] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:41:01] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:41:01] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:41:01] ============== drm_test_fb_xrgb8888_to_mono ===============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:41:01] ==================== drm_test_fb_swab =====================
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ================ [PASSED] drm_test_fb_swab =================
[09:41:01] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:41:01] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[09:41:01] [PASSED] single_pixel_source_buffer
[09:41:01] [PASSED] single_pixel_clip_rectangle
[09:41:01] [PASSED] well_known_colors
[09:41:01] [PASSED] destination_pitch
[09:41:01] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:41:01] ================= drm_test_fb_clip_offset =================
[09:41:01] [PASSED] pass through
[09:41:01] [PASSED] horizontal offset
[09:41:01] [PASSED] vertical offset
[09:41:01] [PASSED] horizontal and vertical offset
[09:41:01] [PASSED] horizontal offset (custom pitch)
[09:41:01] [PASSED] vertical offset (custom pitch)
[09:41:01] [PASSED] horizontal and vertical offset (custom pitch)
[09:41:01] ============= [PASSED] drm_test_fb_clip_offset =============
[09:41:01] =================== drm_test_fb_memcpy ====================
[09:41:01] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:41:01] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:41:01] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:41:01] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:41:01] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:41:01] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:41:01] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:41:01] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:41:01] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:41:01] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:41:01] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:41:01] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:41:01] =============== [PASSED] drm_test_fb_memcpy ================
[09:41:01] ============= [PASSED] drm_format_helper_test ==============
[09:41:01] ================= drm_format (18 subtests) =================
[09:41:01] [PASSED] drm_test_format_block_width_invalid
[09:41:01] [PASSED] drm_test_format_block_width_one_plane
[09:41:01] [PASSED] drm_test_format_block_width_two_plane
[09:41:01] [PASSED] drm_test_format_block_width_three_plane
[09:41:01] [PASSED] drm_test_format_block_width_tiled
[09:41:01] [PASSED] drm_test_format_block_height_invalid
[09:41:01] [PASSED] drm_test_format_block_height_one_plane
[09:41:01] [PASSED] drm_test_format_block_height_two_plane
[09:41:01] [PASSED] drm_test_format_block_height_three_plane
[09:41:01] [PASSED] drm_test_format_block_height_tiled
[09:41:01] [PASSED] drm_test_format_min_pitch_invalid
[09:41:01] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:41:01] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:41:01] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:41:01] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:41:01] [PASSED] drm_test_format_min_pitch_two_plane
[09:41:01] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:41:01] [PASSED] drm_test_format_min_pitch_tiled
[09:41:01] =================== [PASSED] drm_format ====================
[09:41:01] ============== drm_framebuffer (10 subtests) ===============
[09:41:01] ========== drm_test_framebuffer_check_src_coords ==========
[09:41:01] [PASSED] Success: source fits into fb
[09:41:01] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:41:01] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:41:01] [PASSED] Fail: overflowing fb with source width
[09:41:01] [PASSED] Fail: overflowing fb with source height
[09:41:01] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:41:01] [PASSED] drm_test_framebuffer_cleanup
[09:41:01] =============== drm_test_framebuffer_create ===============
[09:41:01] [PASSED] ABGR8888 normal sizes
[09:41:01] [PASSED] ABGR8888 max sizes
[09:41:01] [PASSED] ABGR8888 pitch greater than min required
[09:41:01] [PASSED] ABGR8888 pitch less than min required
[09:41:01] [PASSED] ABGR8888 Invalid width
[09:41:01] [PASSED] ABGR8888 Invalid buffer handle
[09:41:01] [PASSED] No pixel format
[09:41:01] [PASSED] ABGR8888 Width 0
[09:41:01] [PASSED] ABGR8888 Height 0
[09:41:01] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:41:01] [PASSED] ABGR8888 Large buffer offset
[09:41:01] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:41:01] [PASSED] ABGR8888 Invalid flag
[09:41:01] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:41:01] [PASSED] ABGR8888 Valid buffer modifier
[09:41:01] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:41:01] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] NV12 Normal sizes
[09:41:01] [PASSED] NV12 Max sizes
[09:41:01] [PASSED] NV12 Invalid pitch
[09:41:01] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:41:01] [PASSED] NV12 different modifier per-plane
[09:41:01] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:41:01] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] NV12 Modifier for inexistent plane
[09:41:01] [PASSED] NV12 Handle for inexistent plane
[09:41:01] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:41:01] [PASSED] YVU420 Normal sizes
[09:41:01] [PASSED] YVU420 Max sizes
[09:41:01] [PASSED] YVU420 Invalid pitch
[09:41:01] [PASSED] YVU420 Different pitches
[09:41:01] [PASSED] YVU420 Different buffer offsets/pitches
[09:41:01] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:41:01] [PASSED] YVU420 Valid modifier
[09:41:01] [PASSED] YVU420 Different modifiers per plane
[09:41:01] [PASSED] YVU420 Modifier for inexistent plane
[09:41:01] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:41:01] [PASSED] X0L2 Normal sizes
[09:41:01] [PASSED] X0L2 Max sizes
[09:41:01] [PASSED] X0L2 Invalid pitch
[09:41:01] [PASSED] X0L2 Pitch greater than minimum required
[09:41:01] [PASSED] X0L2 Handle for inexistent plane
[09:41:01] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:41:01] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:41:01] [PASSED] X0L2 Valid modifier
[09:41:01] [PASSED] X0L2 Modifier for inexistent plane
[09:41:01] =========== [PASSED] drm_test_framebuffer_create ===========
[09:41:01] [PASSED] drm_test_framebuffer_free
[09:41:01] [PASSED] drm_test_framebuffer_init
[09:41:01] [PASSED] drm_test_framebuffer_init_bad_format
[09:41:01] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:41:01] [PASSED] drm_test_framebuffer_lookup
[09:41:01] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:41:01] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:41:01] ================= [PASSED] drm_framebuffer =================
[09:41:01] ================ drm_gem_shmem (8 subtests) ================
[09:41:01] [PASSED] drm_gem_shmem_test_obj_create
[09:41:01] [PASSED] drm_gem_shmem_test_obj_create_private
[09:41:01] [PASSED] drm_gem_shmem_test_pin_pages
[09:41:01] [PASSED] drm_gem_shmem_test_vmap
[09:41:01] [PASSED] drm_gem_shmem_test_get_sg_table
[09:41:01] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:41:01] [PASSED] drm_gem_shmem_test_madvise
[09:41:01] [PASSED] drm_gem_shmem_test_purge
[09:41:01] ================== [PASSED] drm_gem_shmem ==================
[09:41:01] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:41:01] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[09:41:01] [PASSED] Automatic
[09:41:01] [PASSED] Full
[09:41:01] [PASSED] Limited 16:235
[09:41:01] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:41:01] [PASSED] drm_test_check_disable_connector
[09:41:01] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:41:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:41:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:41:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:41:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:41:01] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:41:01] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:41:01] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:41:01] [PASSED] drm_test_check_output_bpc_dvi
[09:41:01] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:41:01] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:41:01] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:41:01] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:41:01] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:41:01] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:41:01] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:41:01] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:41:01] ============ drm_test_check_hdmi_color_format =============
[09:41:01] [PASSED] AUTO -> RGB
[09:41:01] [PASSED] YCBCR422 -> YUV422
[09:41:01] [PASSED] YCBCR420 -> YUV420
[09:41:01] [PASSED] YCBCR444 -> YUV444
[09:41:01] [PASSED] RGB -> RGB
[09:41:01] ======== [PASSED] drm_test_check_hdmi_color_format =========
[09:41:01] ======== drm_test_check_hdmi_color_format_420_only ========
[09:41:01] [PASSED] RGB should fail
[09:41:01] [PASSED] YUV444 should fail
[09:41:01] [PASSED] YUV422 should fail
[09:41:01] [PASSED] YUV420 should work
[09:41:01] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[09:41:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:41:01] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:41:01] [PASSED] drm_test_check_broadcast_rgb_value
[09:41:01] [PASSED] drm_test_check_bpc_8_value
[09:41:01] [PASSED] drm_test_check_bpc_10_value
[09:41:01] [PASSED] drm_test_check_bpc_12_value
[09:41:01] [PASSED] drm_test_check_format_value
[09:41:01] [PASSED] drm_test_check_tmds_char_value
[09:41:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:41:01] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[09:41:01] [PASSED] drm_test_check_mode_valid
[09:41:01] [PASSED] drm_test_check_mode_valid_reject
[09:41:01] [PASSED] drm_test_check_mode_valid_reject_rate
[09:41:01] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:41:01] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[09:41:01] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[09:41:01] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[09:41:01] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:41:01] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:41:01] [PASSED] drm_test_check_infoframes
[09:41:01] [PASSED] drm_test_check_reject_avi_infoframe
[09:41:01] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:41:01] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:41:01] [PASSED] drm_test_check_reject_audio_infoframe
[09:41:01] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:41:01] ================= drm_managed (2 subtests) =================
[09:41:01] [PASSED] drm_test_managed_release_action
[09:41:01] [PASSED] drm_test_managed_run_action
[09:41:01] =================== [PASSED] drm_managed ===================
[09:41:01] =================== drm_mm (6 subtests) ====================
[09:41:01] [PASSED] drm_test_mm_init
[09:41:01] [PASSED] drm_test_mm_debug
[09:41:01] [PASSED] drm_test_mm_align32
[09:41:01] [PASSED] drm_test_mm_align64
[09:41:01] [PASSED] drm_test_mm_lowest
[09:41:01] [PASSED] drm_test_mm_highest
[09:41:01] ===================== [PASSED] drm_mm ======================
[09:41:01] ============= drm_modes_analog_tv (5 subtests) =============
[09:41:01] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:41:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:41:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:41:01] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:41:01] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:41:01] =============== [PASSED] drm_modes_analog_tv ===============
[09:41:01] ============== drm_plane_helper (2 subtests) ===============
[09:41:01] =============== drm_test_check_plane_state ================
[09:41:01] [PASSED] clipping_simple
[09:41:01] [PASSED] clipping_rotate_reflect
[09:41:01] [PASSED] positioning_simple
[09:41:01] [PASSED] upscaling
[09:41:01] [PASSED] downscaling
[09:41:01] [PASSED] rounding1
[09:41:01] [PASSED] rounding2
[09:41:01] [PASSED] rounding3
[09:41:01] [PASSED] rounding4
[09:41:01] =========== [PASSED] drm_test_check_plane_state ============
[09:41:01] =========== drm_test_check_invalid_plane_state ============
[09:41:01] [PASSED] positioning_invalid
[09:41:01] [PASSED] upscaling_invalid
[09:41:01] [PASSED] downscaling_invalid
[09:41:01] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:41:01] ================ [PASSED] drm_plane_helper =================
[09:41:01] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:41:01] ====== drm_test_connector_helper_tv_get_modes_check =======
[09:41:01] [PASSED] None
[09:41:01] [PASSED] PAL
[09:41:01] [PASSED] NTSC
[09:41:01] [PASSED] Both, NTSC Default
[09:41:01] [PASSED] Both, PAL Default
[09:41:01] [PASSED] Both, NTSC Default, with PAL on command-line
[09:41:01] [PASSED] Both, PAL Default, with NTSC on command-line
[09:41:01] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:41:01] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:41:01] ================== drm_rect (9 subtests) ===================
[09:41:01] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:41:01] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:41:01] [PASSED] drm_test_rect_clip_scaled_clipped
[09:41:01] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:41:01] ================= drm_test_rect_intersect =================
[09:41:01] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:41:01] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:41:01] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:41:01] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:41:01] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:41:01] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:41:01] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:41:01] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:41:01] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:41:01] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:41:01] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:41:01] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:41:01] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:41:01] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:41:01] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:41:01] ============= [PASSED] drm_test_rect_intersect =============
[09:41:01] ================ drm_test_rect_calc_hscale ================
[09:41:01] [PASSED] normal use
[09:41:01] [PASSED] out of max range
[09:41:01] [PASSED] out of min range
[09:41:01] [PASSED] zero dst
[09:41:01] [PASSED] negative src
[09:41:01] [PASSED] negative dst
[09:41:01] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:41:01] ================ drm_test_rect_calc_vscale ================
[09:41:01] [PASSED] normal use
[09:41:01] [PASSED] out of max range
[09:41:01] [PASSED] out of min range
[09:41:01] [PASSED] zero dst
[09:41:01] [PASSED] negative src
[09:41:01] [PASSED] negative dst
[09:41:01] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:41:01] ================== drm_test_rect_rotate ===================
[09:41:01] [PASSED] reflect-x
[09:41:01] [PASSED] reflect-y
[09:41:01] [PASSED] rotate-0
[09:41:01] [PASSED] rotate-90
[09:41:01] [PASSED] rotate-180
[09:41:01] [PASSED] rotate-270
[09:41:01] ============== [PASSED] drm_test_rect_rotate ===============
[09:41:01] ================ drm_test_rect_rotate_inv =================
[09:41:01] [PASSED] reflect-x
[09:41:01] [PASSED] reflect-y
[09:41:01] [PASSED] rotate-0
[09:41:01] [PASSED] rotate-90
[09:41:01] [PASSED] rotate-180
[09:41:01] [PASSED] rotate-270
[09:41:01] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:41:01] ==================== [PASSED] drm_rect =====================
[09:41:01] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:41:01] ============ drm_test_sysfb_build_fourcc_list =============
[09:41:01] [PASSED] no native formats
[09:41:01] [PASSED] XRGB8888 as native format
[09:41:01] [PASSED] remove duplicates
[09:41:01] [PASSED] convert alpha formats
[09:41:01] [PASSED] random formats
[09:41:01] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:41:01] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:41:01] ================== drm_fixp (2 subtests) ===================
[09:41:01] [PASSED] drm_test_int2fixp
[09:41:01] [PASSED] drm_test_sm2fixp
[09:41:01] ==================== [PASSED] drm_fixp =====================
[09:41:01] ============================================================
[09:41:01] Testing complete. Ran 639 tests: passed: 639
[09:41:01] Elapsed time: 26.135s total, 1.735s configuring, 24.233s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:41:01] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:41:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:41:13] Starting KUnit Kernel (1/1)...
[09:41:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:41:13] ================= ttm_device (5 subtests) ==================
[09:41:13] [PASSED] ttm_device_init_basic
[09:41:13] [PASSED] ttm_device_init_multiple
[09:41:13] [PASSED] ttm_device_fini_basic
[09:41:13] [PASSED] ttm_device_init_no_vma_man
[09:41:13] ================== ttm_device_init_pools ==================
[09:41:13] [PASSED] No DMA allocations, no DMA32 required
[09:41:13] [PASSED] DMA allocations, DMA32 required
[09:41:13] [PASSED] No DMA allocations, DMA32 required
[09:41:13] [PASSED] DMA allocations, no DMA32 required
[09:41:13] ============== [PASSED] ttm_device_init_pools ==============
[09:41:13] =================== [PASSED] ttm_device ====================
[09:41:13] ================== ttm_pool (8 subtests) ===================
[09:41:13] ================== ttm_pool_alloc_basic ===================
[09:41:13] [PASSED] One page
[09:41:13] [PASSED] More than one page
[09:41:13] [PASSED] Above the allocation limit
[09:41:13] [PASSED] One page, with coherent DMA mappings enabled
[09:41:13] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:41:13] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:41:13] ============== ttm_pool_alloc_basic_dma_addr ==============
[09:41:13] [PASSED] One page
[09:41:13] [PASSED] More than one page
[09:41:13] [PASSED] Above the allocation limit
[09:41:13] [PASSED] One page, with coherent DMA mappings enabled
[09:41:13] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:41:13] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:41:13] [PASSED] ttm_pool_alloc_order_caching_match
[09:41:13] [PASSED] ttm_pool_alloc_caching_mismatch
[09:41:13] [PASSED] ttm_pool_alloc_order_mismatch
[09:41:13] [PASSED] ttm_pool_free_dma_alloc
[09:41:13] [PASSED] ttm_pool_free_no_dma_alloc
[09:41:13] [PASSED] ttm_pool_fini_basic
[09:41:13] ==================== [PASSED] ttm_pool =====================
[09:41:13] ================ ttm_resource (8 subtests) =================
[09:41:13] ================= ttm_resource_init_basic =================
[09:41:13] [PASSED] Init resource in TTM_PL_SYSTEM
[09:41:13] [PASSED] Init resource in TTM_PL_VRAM
[09:41:13] [PASSED] Init resource in a private placement
[09:41:13] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:41:13] ============= [PASSED] ttm_resource_init_basic =============
[09:41:13] [PASSED] ttm_resource_init_pinned
[09:41:13] [PASSED] ttm_resource_fini_basic
[09:41:13] [PASSED] ttm_resource_manager_init_basic
[09:41:13] [PASSED] ttm_resource_manager_usage_basic
[09:41:13] [PASSED] ttm_resource_manager_set_used_basic
[09:41:13] [PASSED] ttm_sys_man_alloc_basic
[09:41:13] [PASSED] ttm_sys_man_free_basic
[09:41:13] ================== [PASSED] ttm_resource ===================
[09:41:13] =================== ttm_tt (15 subtests) ===================
[09:41:13] ==================== ttm_tt_init_basic ====================
[09:41:13] [PASSED] Page-aligned size
[09:41:13] [PASSED] Extra pages requested
[09:41:13] ================ [PASSED] ttm_tt_init_basic ================
[09:41:13] [PASSED] ttm_tt_init_misaligned
[09:41:13] [PASSED] ttm_tt_fini_basic
[09:41:13] [PASSED] ttm_tt_fini_sg
[09:41:13] [PASSED] ttm_tt_fini_shmem
[09:41:13] [PASSED] ttm_tt_create_basic
[09:41:13] [PASSED] ttm_tt_create_invalid_bo_type
[09:41:13] [PASSED] ttm_tt_create_ttm_exists
[09:41:13] [PASSED] ttm_tt_create_failed
[09:41:13] [PASSED] ttm_tt_destroy_basic
[09:41:13] [PASSED] ttm_tt_populate_null_ttm
[09:41:13] [PASSED] ttm_tt_populate_populated_ttm
[09:41:13] [PASSED] ttm_tt_unpopulate_basic
[09:41:13] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:41:13] [PASSED] ttm_tt_swapin_basic
[09:41:13] ===================== [PASSED] ttm_tt ======================
[09:41:13] =================== ttm_bo (14 subtests) ===================
[09:41:13] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[09:41:13] [PASSED] Cannot be interrupted and sleeps
[09:41:13] [PASSED] Cannot be interrupted, locks straight away
[09:41:13] [PASSED] Can be interrupted, sleeps
[09:41:13] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:41:13] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:41:13] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:41:13] [PASSED] ttm_bo_reserve_double_resv
[09:41:13] [PASSED] ttm_bo_reserve_interrupted
[09:41:13] [PASSED] ttm_bo_reserve_deadlock
[09:41:13] [PASSED] ttm_bo_unreserve_basic
[09:41:13] [PASSED] ttm_bo_unreserve_pinned
[09:41:13] [PASSED] ttm_bo_unreserve_bulk
[09:41:13] [PASSED] ttm_bo_fini_basic
[09:41:13] [PASSED] ttm_bo_fini_shared_resv
[09:41:13] [PASSED] ttm_bo_pin_basic
[09:41:13] [PASSED] ttm_bo_pin_unpin_resource
[09:41:13] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:41:13] ===================== [PASSED] ttm_bo ======================
[09:41:13] ============== ttm_bo_validate (22 subtests) ===============
[09:41:13] ============== ttm_bo_init_reserved_sys_man ===============
[09:41:13] [PASSED] Buffer object for userspace
[09:41:13] [PASSED] Kernel buffer object
[09:41:13] [PASSED] Shared buffer object
[09:41:13] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:41:13] ============== ttm_bo_init_reserved_mock_man ==============
[09:41:13] [PASSED] Buffer object for userspace
[09:41:13] [PASSED] Kernel buffer object
[09:41:13] [PASSED] Shared buffer object
[09:41:13] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:41:13] [PASSED] ttm_bo_init_reserved_resv
[09:41:13] ================== ttm_bo_validate_basic ==================
[09:41:13] [PASSED] Buffer object for userspace
[09:41:13] [PASSED] Kernel buffer object
[09:41:13] [PASSED] Shared buffer object
[09:41:13] ============== [PASSED] ttm_bo_validate_basic ==============
[09:41:13] [PASSED] ttm_bo_validate_invalid_placement
[09:41:13] ============= ttm_bo_validate_same_placement ==============
[09:41:13] [PASSED] System manager
[09:41:13] [PASSED] VRAM manager
[09:41:13] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:41:13] [PASSED] ttm_bo_validate_failed_alloc
[09:41:13] [PASSED] ttm_bo_validate_pinned
[09:41:13] [PASSED] ttm_bo_validate_busy_placement
[09:41:13] ================ ttm_bo_validate_multihop =================
[09:41:13] [PASSED] Buffer object for userspace
[09:41:13] [PASSED] Kernel buffer object
[09:41:13] [PASSED] Shared buffer object
[09:41:13] ============ [PASSED] ttm_bo_validate_multihop =============
[09:41:13] ========== ttm_bo_validate_no_placement_signaled ==========
[09:41:13] [PASSED] Buffer object in system domain, no page vector
[09:41:13] [PASSED] Buffer object in system domain with an existing page vector
[09:41:13] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:41:13] ======== ttm_bo_validate_no_placement_not_signaled ========
[09:41:13] [PASSED] Buffer object for userspace
[09:41:13] [PASSED] Kernel buffer object
[09:41:13] [PASSED] Shared buffer object
[09:41:13] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:41:13] [PASSED] ttm_bo_validate_move_fence_signaled
[09:41:13] ========= ttm_bo_validate_move_fence_not_signaled =========
[09:41:13] [PASSED] Waits for GPU
[09:41:13] [PASSED] Tries to lock straight away
[09:41:13] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:41:13] [PASSED] ttm_bo_validate_swapout
[09:41:13] [PASSED] ttm_bo_validate_happy_evict
[09:41:13] [PASSED] ttm_bo_validate_all_pinned_evict
[09:41:13] [PASSED] ttm_bo_validate_allowed_only_evict
[09:41:13] [PASSED] ttm_bo_validate_deleted_evict
[09:41:13] [PASSED] ttm_bo_validate_busy_domain_evict
[09:41:13] [PASSED] ttm_bo_validate_evict_gutting
[09:41:13] [PASSED] ttm_bo_validate_recrusive_evict
[09:41:13] ================= [PASSED] ttm_bo_validate =================
[09:41:13] ============================================================
[09:41:13] Testing complete. Ran 102 tests: passed: 102
[09:41:13] Elapsed time: 11.777s total, 1.804s configuring, 9.708s building, 0.227s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v4 1/1] drm/xe/xe_ras: Add RAS GPU health indicator
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
@ 2026-06-10 10:11 ` Gupta, Anshuman
2026-06-15 12:25 ` Andi Shyti
2026-06-17 8:35 ` Nilawar, Badal
2 siblings, 0 replies; 10+ messages in thread
From: Gupta, Anshuman @ 2026-06-10 10:11 UTC (permalink / raw)
To: Purkait, Soham, intel-xe@lists.freedesktop.org, Tauro, Riana,
aravind.iddamsetty@linux.intel.com, Nilawar, Badal, Jadav, Raag,
Koppuravuri, Ravi Kishore, Koujalagi, Mallesh, Shyti, Andi,
Vivi, Rodrigo
Cc: Vijay, Anoop C
> -----Original Message-----
> From: Purkait, Soham <soham.purkait@intel.com>
> Sent: Wednesday, June 10, 2026 3:04 PM
> To: intel-xe@lists.freedesktop.org; Tauro, Riana <riana.tauro@intel.com>;
> Gupta, Anshuman <anshuman.gupta@intel.com>;
> aravind.iddamsetty@linux.intel.com; Nilawar, Badal
> <badal.nilawar@intel.com>; Jadav, Raag <raag.jadav@intel.com>;
> Koppuravuri, Ravi Kishore <ravi.kishore.koppuravuri@intel.com>; Koujalagi,
> Mallesh <mallesh.koujalagi@intel.com>; Shyti, Andi <andi.shyti@intel.com>;
> Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Cc: Purkait, Soham <soham.purkait@intel.com>; Vijay, Anoop C
> <anoop.c.vijay@intel.com>
> Subject: [PATCH v4 1/1] drm/xe/xe_ras: Add RAS GPU health indicator
>
> Add a sysfs interface that reports the current GPU health state and lets admin
> users and management tools update it but is readable by all users. Requests
> are routed through the sysctrl mailbox. The interface is present only on
> platforms that support the GPU health indicator.
>
> The interface is a single read/write file at the device level:
>
> $ cat /sys/.../device/gpu_health
> ok
>
> $ echo critical > /sys/.../device/gpu_health
>
> $ cat /sys/.../device/gpu_health
> critical
>
> v1:
> - Add enum for health status. (Andi, Rodrigo)
> - Return error number instead of error message in _show/_store. (Andi)
> - Move GPU health sysfs init error logging to xe_ras_init. (Andi)
> - Return only the current health state for sysfs read. (Andi, Rodrigo)
> - Add documentation for sysfs interface. (Andi, Rodrigo)
>
> v2:
> - Make logs and structures consistent with their counterparts. (Riana)
> - Drop unnecessary variables. (Andi, Riana)
> - Add correct KernelVersion. (Raag)
>
> Signed-off-by: Soham Purkait <soham.purkait@intel.com>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> .../ABI/testing/sysfs-driver-intel-xe-ras | 30 +++
> drivers/gpu/drm/xe/xe_ras.c | 177 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 1 +
> drivers/gpu/drm/xe/xe_ras_types.h | 60 ++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 3 +
> drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 4 +
> 7 files changed, 303 insertions(+)
> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-ras
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
> b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
> new file mode 100644
> index 000000000000..c7f2cf8bb6ad
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
> @@ -0,0 +1,30 @@
> +What: /sys/bus/pci/drivers/xe/.../gpu_health
> +Date: April 2026
> +KernelVersion: 7.2
> +Contact: intel-xe@lists.freedesktop.org
> +Description:
> + This file exposes the current GPU health state and allows the
> GPU
> + health state to be updated.
> +
> + This sysfs file is present only on Intel Xe platforms that
> support
> + the GPU health indicator interface for RAS. Reading the
> current
> + health state is available to all users, while updating the health
> + state is restricted to administrative users only.
> +
> + Read returns a single line containing one of the valid values
> for
> + the current device health state. Writing one of the valid
> values
> + updates the current device health state.
> +
> + The valid values for the device health state are:
> +
> + ok
> + The device is healthy and operating within
> normal
> + parameters.
> +
> + warning
> + The device is experiencing minor issues but
> remains
> + operational.
> +
> + critical
> + The device is in a critical state and may not be
> + operational.
Will above KDoc link to existing XeKMD doc https://docs.kernel.org/gpu/xe/index.html
Thanks,
Anshuman
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c index
> 4cb16b419b0c..b7efd607aadf 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -4,11 +4,14 @@
> */
>
> #include "xe_device.h"
> +#include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_ras.h"
> #include "xe_ras_types.h"
> #include "xe_sysctrl.h"
> #include "xe_sysctrl_event_types.h"
> +#include "xe_sysctrl_mailbox.h"
> +#include "xe_sysctrl_mailbox_types.h"
>
> /* Severity of detected errors */
> enum xe_ras_severity {
> @@ -31,6 +34,16 @@ enum xe_ras_component {
> XE_RAS_COMP_MAX
> };
>
> +/* RAS response status codes */
> +enum xe_ras_response_status {
> + XE_RAS_STATUS_SUCCESS = 0,
> + XE_RAS_STATUS_INVALID_PARAM,
> + XE_RAS_STATUS_OP_NOT_SUPPORTED,
> + XE_RAS_STATUS_TIMEOUT,
> + XE_RAS_STATUS_HARDWARE_FAILURE,
> + XE_RAS_STATUS_INSUFFICIENT_RESOURCES
> +};
> +
> static const char *const xe_ras_severities[] = {
> [XE_RAS_SEV_NOT_SUPPORTED] = "Not Supported",
> [XE_RAS_SEV_CORRECTABLE] = "Correctable Error",
> @@ -50,6 +63,33 @@ static const char *const xe_ras_components[] = { };
> static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
>
> +static const char * const gpu_health_states[] = {
> + [XE_RAS_HEALTH_STATUS_OK] = "ok",
> + [XE_RAS_HEALTH_STATUS_WARNING] = "warning",
> + [XE_RAS_HEALTH_STATUS_CRITICAL] = "critical"
> +};
> +static_assert(ARRAY_SIZE(gpu_health_states) ==
> +XE_RAS_HEALTH_STATUS_MAX);
> +
> +static int ras_status_to_errno(u32 status) {
> + switch (status) {
> + case XE_RAS_STATUS_SUCCESS:
> + return 0;
> + case XE_RAS_STATUS_INVALID_PARAM:
> + return -EINVAL;
> + case XE_RAS_STATUS_OP_NOT_SUPPORTED:
> + return -EOPNOTSUPP;
> + case XE_RAS_STATUS_TIMEOUT:
> + return -ETIMEDOUT;
> + case XE_RAS_STATUS_HARDWARE_FAILURE:
> + return -EIO;
> + case XE_RAS_STATUS_INSUFFICIENT_RESOURCES:
> + return -ENOSPC;
> + default:
> + return -EPROTO;
> + }
> +}
> +
> static inline const char *sev_to_str(u8 severity) {
> if (severity >= XE_RAS_SEV_MAX)
> @@ -91,3 +131,140 @@ void xe_ras_counter_threshold_crossed(struct
> xe_device *xe,
> comp_to_str(component), sev_to_str(severity));
> }
> }
> +
> +static ssize_t gpu_health_show(struct device *dev, struct
> +device_attribute *attr, char *buf) {
> + struct xe_ras_get_health_response response = {0};
> + struct xe_sysctrl_mailbox_command command = {0};
> + struct xe_ras_get_health_request request = {0};
> + struct xe_device *xe = kdev_to_xe_device(dev);
> + enum xe_ras_health_status health;
> + size_t rlen = 0;
> + int ret;
> +
> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP,
> XE_SYSCTRL_CMD_GET_HEALTH,
> + &request, sizeof(request), &response,
> sizeof(response));
> + guard(xe_pm_runtime)(xe);
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "sysctrl: failed to send get health command %d\n",
> ret);
> + return ret;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "sysctrl: unexpected get health response length
> %zu (expected %zu)\n",
> + rlen, sizeof(response));
> + return -EIO;
> + }
> + if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
> + xe_err(xe, "sysctrl: invalid health state %u\n",
> + response.current_health);
> + return -EIO;
> + }
> +
> + health = (enum xe_ras_health_status)response.current_health;
> +
> + xe_dbg(xe, "[RAS]: get health:%s\n", gpu_health_states[health]);
> +
> + return sysfs_emit(buf, "%s\n", gpu_health_states[health]); }
> +
> +static ssize_t gpu_health_store(struct device *dev, struct device_attribute
> *attr,
> + const char *buf, size_t count)
> +{
> + struct xe_ras_set_health_response response = {0};
> + struct xe_sysctrl_mailbox_command command = {0};
> + struct xe_ras_set_health_request request = {0};
> + struct xe_device *xe = kdev_to_xe_device(dev);
> + enum xe_ras_health_status health;
> + size_t rlen = 0;
> + int ras_status;
> + int state;
> + int ret;
> +
> + state = sysfs_match_string(gpu_health_states, buf);
> + if (state < 0) {
> + xe_err(xe, "[RAS]: invalid health state '%.*s'\n",
> + (int)strcspn(buf, "\n"), buf);
> + return -EINVAL;
> + }
> +
> + request.new_health = (u8)state;
> +
> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP,
> XE_SYSCTRL_CMD_SET_HEALTH,
> + &request, sizeof(request), &response,
> sizeof(response));
> + guard(xe_pm_runtime)(xe);
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "sysctrl: failed to send set health command %d\n",
> ret);
> + return ret;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "sysctrl: unexpected set health response length
> %zu (expected %zu)\n",
> + rlen, sizeof(response));
> + return -EIO;
> + }
> +
> + ras_status = ras_status_to_errno(response.status);
> + if (ras_status) {
> + xe_err(xe, "sysctrl: set health command failed with status
> %d\n",
> + response.status);
> + return ras_status;
> + }
> +
> + if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
> + xe_err(xe, "sysctrl: invalid health state %u\n",
> + response.current_health);
> + return -EIO;
> + }
> +
> + health = (enum xe_ras_health_status)response.current_health;
> +
> + xe_dbg(xe, "[RAS]: set health:%s\n", gpu_health_states[health]);
> +
> + return count;
> +}
> +
> +static DEVICE_ATTR_RW(gpu_health);
> +
> +static void gpu_health_sysfs_fini(void *arg) {
> + struct device *dev = arg;
> +
> + device_remove_file(dev, &dev_attr_gpu_health); }
> +
> +static int gpu_health_sysfs_init(struct xe_device *xe) {
> + struct device *dev = xe->drm.dev;
> + int err;
> +
> + err = device_create_file(dev, &dev_attr_gpu_health);
> + if (err)
> + return err;
> +
> + err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev);
> + if (err)
> + return err;
> +
> + return 0;
> +}
> +
> +/**
> + * xe_ras_init - Initialize Xe RAS
> + * @xe: xe device instance
> + *
> + * Initialize the RAS GPU health sysfs interface.
> + */
> +void xe_ras_init(struct xe_device *xe)
> +{
> + int ret;
> +
> + if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
> + return;
> +
> + ret = gpu_health_sysfs_init(xe);
> + if (ret)
> + xe_err(xe, "[RAS]: failed to initialize GPU health sysfs,
> err=%d\n",
> +ret); }
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h index
> ea90593b62dc..8acfd0ffe48e 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -11,5 +11,6 @@ struct xe_sysctrl_event_response;
>
> void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> struct xe_sysctrl_event_response
> *response);
> +void xe_ras_init(struct xe_device *xe);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h
> b/drivers/gpu/drm/xe/xe_ras_types.h
> index 4e63c67f806a..4767bcf315a3 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -10,6 +10,21 @@
>
> #define XE_RAS_NUM_COUNTERS 16
>
> +/**
> + * enum xe_ras_health_status - Device health status values
> + *
> + * @XE_RAS_HEALTH_STATUS_OK: Device is healthy and operating normally.
> + * @XE_RAS_HEALTH_STATUS_WARNING: Device has minor issues but is still
> operational.
> + * @XE_RAS_HEALTH_STATUS_CRITICAL: Device is in a critical state and may
> not be operational.
> + * @XE_RAS_HEALTH_STATUS_MAX: Sentinel value for validation */ enum
> +xe_ras_health_status {
> + XE_RAS_HEALTH_STATUS_OK = 0,
> + XE_RAS_HEALTH_STATUS_WARNING,
> + XE_RAS_HEALTH_STATUS_CRITICAL,
> + XE_RAS_HEALTH_STATUS_MAX
> +};
> +
> /**
> * struct xe_ras_error_common - Error fields that are common across all
> products
> */
> @@ -70,4 +85,49 @@ struct xe_ras_threshold_crossed {
> struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS]; }
> __packed;
>
> +/**
> + * struct xe_ras_get_health_request - Request structure for GFSP
> +GET_HEALTH
> + *
> + * GET_HEALTH takes no input parameters; the reserved payload is kept
> +to
> + * preserve the firmware wire layout and allow future extensions. The
> + * driver must zero all reserved fields.
> + */
> +struct xe_ras_get_health_request {
> + /** @reserved: Reserved for future use. */
> + u32 reserved[2];
> +} __packed;
> +
> +/**
> + * struct xe_ras_get_health_response - Response structure for GFSP
> +GET_HEALTH */ struct xe_ras_get_health_response {
> + /** @current_health: Current GPU health, see &enum
> xe_ras_health_status */
> + u8 current_health;
> + /** @reserved: Reserved for future use */
> + u8 reserved[3];
> +} __packed;
> +
> +/**
> + * struct xe_ras_set_health_request - Request structure for GFSP
> +SET_HEALTH */ struct xe_ras_set_health_request {
> + /** @new_health: New GPU health to set, see &enum
> xe_ras_health_status */
> + u8 new_health;
> + /** @reserved: Reserved for future use */
> + u8 reserved[3];
> +} __packed;
> +
> +/**
> + * struct xe_ras_set_health_response - Response structure for GFSP
> +SET_HEALTH */ struct xe_ras_set_health_response {
> + /** @status: Status of set health operation, see &enum
> xe_ras_response_status */
> + u32 status;
> + /** @current_health: Resulting current GPU health, see &enum
> xe_ras_health_status */
> + u8 current_health;
> + /** @reserved: Reserved for future use */
> + u8 reserved[3];
> + /** @reserved1: Reserved for future use */
> + u32 reserved1[2];
> +} __packed;
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> index 3caa9f15875f..9507f68bc2eb 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> @@ -293,6 +293,34 @@ static int sysctrl_send_command(struct xe_sysctrl
> *sc,
> return 0;
> }
>
> +/**
> + * xe_sysctrl_create_command() - Create system controller command
> + * @command: Sysctrl command structure
> + * @group_id: Command group ID
> + * @cmd_id: Command ID
> + * @request: Pointer to request buffer (can be NULL)
> + * @request_len: Size of request buffer
> + * @response: Pointer to response buffer
> + * @response_len: Size of response buffer
> + *
> + * Helper function to build sysctrl command to be sent via
> +%xe_sysctrl_send_command() */ void xe_sysctrl_create_command(struct
> +xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
> + void *request, size_t request_len, void
> *response,
> + size_t response_len)
> +{
> + struct xe_sysctrl_app_msg_hdr header = {0};
> +
> + header.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, group_id) |
> + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_id);
> +
> + command->header = header;
> + command->data_in = request;
> + command->data_in_len = request_len;
> + command->data_out = response;
> + command->data_out_len = response_len;
> +}
> +
> /**
> * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface
> * @sc: System controller structure
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> index f67e9234de48..fb434cc165b2 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> @@ -23,6 +23,9 @@ struct xe_sysctrl_mailbox_command; #define
> XE_SYSCTRL_APP_HDR_VERSION(hdr) \
> FIELD_GET(APP_HDR_VERSION_MASK, (hdr)->data)
>
> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command
> *command, u8 group_id, u8 cmd_id,
> + void *request, size_t request_len, void
> *response,
> + size_t response_len);
> void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc); int
> xe_sysctrl_send_command(struct xe_sysctrl *sc,
> struct xe_sysctrl_mailbox_command *cmd, diff --git
> a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 84d7c647e743..f82e3fb9b5ef 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -23,9 +23,13 @@ enum xe_sysctrl_group {
> * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
> *
> * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
> + * @XE_SYSCTRL_CMD_GET_HEALTH: Retrieve current health status
> + * @XE_SYSCTRL_CMD_SET_HEALTH: Set new health status
> */
> enum xe_sysctrl_gfsp_cmd {
> XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
> + XE_SYSCTRL_CMD_GET_HEALTH = 0x0B,
> + XE_SYSCTRL_CMD_SET_HEALTH = 0x0C,
> };
>
> /**
> --
> 2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Add support for GPU health indicator
2026-06-10 9:33 [PATCH v4 0/1] drm/xe: Add support for GPU health indicator Soham Purkait
` (2 preceding siblings ...)
2026-06-10 9:41 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-10 10:25 ` Patchwork
2026-06-10 16:14 ` ✓ Xe.CI.FULL: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-10 10:25 UTC (permalink / raw)
To: Soham Purkait; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1531 bytes --]
== Series Details ==
Series: drm/xe: Add support for GPU health indicator
URL : https://patchwork.freedesktop.org/series/168235/
State : success
== Summary ==
CI Bug Log - changes from xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a_BAT -> xe-pw-168235v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168235v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_live_ktest@xe_dma_buf:
- bat-bmg-vm: [PASS][1] -> [ABORT][2] ([Intel XE#8007] / [Intel XE#8023]) +1 other test abort
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023
Build changes
-------------
* Linux: xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a -> xe-pw-168235v1
IGT_8956: 8956
xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a: 724e06af260b571e2d970d4a806ae3d620ff0b7a
xe-pw-168235v1: 168235v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/index.html
[-- Attachment #2: Type: text/html, Size: 2089 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe: Add support for GPU health indicator
2026-06-10 9:33 [PATCH v4 0/1] drm/xe: Add support for GPU health indicator Soham Purkait
` (3 preceding siblings ...)
2026-06-10 10:25 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-10 16:14 ` Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-10 16:14 UTC (permalink / raw)
To: Soham Purkait; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 9457 bytes --]
== Series Details ==
Series: drm/xe: Add support for GPU health indicator
URL : https://patchwork.freedesktop.org/series/168235/
State : success
== Summary ==
CI Bug Log - changes from xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a_FULL -> xe-pw-168235v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168235v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [PASS][1] -> [INCOMPLETE][2] ([Intel XE#7084] / [Intel XE#8150]) +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-bmg: [PASS][3] -> [FAIL][4] ([Intel XE#3321]) +1 other test fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][5] -> [FAIL][6] ([Intel XE#301] / [Intel XE#3149])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][7] -> [SKIP][8] ([Intel XE#7915]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-1/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-6/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_plane_lowres@tiling-none:
- shard-bmg: [PASS][9] -> [DMESG-WARN][10] ([Intel XE#5681])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-10/igt@kms_plane_lowres@tiling-none.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-5/igt@kms_plane_lowres@tiling-none.html
* igt@kms_plane_lowres@tiling-none@pipe-b-hdmi-a-3:
- shard-bmg: [PASS][11] -> [DMESG-WARN][12] ([Intel XE#7774])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-10/igt@kms_plane_lowres@tiling-none@pipe-b-hdmi-a-3.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-5/igt@kms_plane_lowres@tiling-none@pipe-b-hdmi-a-3.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [PASS][13] -> [FAIL][14] ([Intel XE#6361]) +2 other tests fail
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-lnl-3/igt@kms_setmode@basic@pipe-b-edp-1.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-lnl-3/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads:
- shard-bmg: [PASS][15] -> [FAIL][16] ([Intel XE#7850])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-6/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-10/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
* igt@xe_exec_reset@long-spin-many-preempt-gt1-threads:
- shard-bmg: [PASS][17] -> [FAIL][18] ([Intel XE#7956])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-10/igt@xe_exec_reset@long-spin-many-preempt-gt1-threads.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-5/igt@xe_exec_reset@long-spin-many-preempt-gt1-threads.html
#### Possible fixes ####
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][19] ([Intel XE#1503]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][21] ([Intel XE#7922]) -> [PASS][22] +1 other test pass
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-10/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-8/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_vblank@ts-continuation-suspend:
- shard-bmg: [INCOMPLETE][23] -> [PASS][24] +1 other test pass
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-5/igt@kms_vblank@ts-continuation-suspend.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-7/igt@kms_vblank@ts-continuation-suspend.html
* igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads:
- shard-bmg: [FAIL][25] ([Intel XE#7850]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-9/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-9/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
#### Warnings ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][27] ([Intel XE#301]) -> [FAIL][28] ([Intel XE#301] / [Intel XE#3149])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][29] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][30] ([Intel XE#1729] / [Intel XE#7424])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][31] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][32] ([Intel XE#2509] / [Intel XE#7437])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#5681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5681
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7956]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7956
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
Build changes
-------------
* Linux: xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a -> xe-pw-168235v1
IGT_8956: 8956
xe-5230-724e06af260b571e2d970d4a806ae3d620ff0b7a: 724e06af260b571e2d970d4a806ae3d620ff0b7a
xe-pw-168235v1: 168235v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168235v1/index.html
[-- Attachment #2: Type: text/html, Size: 10764 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/1] drm/xe/xe_ras: Add RAS GPU health indicator
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
2026-06-10 10:11 ` Gupta, Anshuman
@ 2026-06-15 12:25 ` Andi Shyti
2026-06-17 8:35 ` Nilawar, Badal
2 siblings, 0 replies; 10+ messages in thread
From: Andi Shyti @ 2026-06-15 12:25 UTC (permalink / raw)
To: Soham Purkait
Cc: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, rodrigo.vivi, anoop.c.vijay
Hi Soham,
On Wed, Jun 10, 2026 at 03:03:55PM +0530, Soham Purkait wrote:
> Add a sysfs interface that reports the current GPU health state and
> lets admin users and management tools update it but is readable by all
> users. Requests are routed through the sysctrl mailbox. The interface
> is present only on platforms that support the GPU health indicator.
>
> The interface is a single read/write file at the device level:
>
> $ cat /sys/.../device/gpu_health
> ok
>
> $ echo critical > /sys/.../device/gpu_health
>
> $ cat /sys/.../device/gpu_health
> critical
>
> v1:
> - Add enum for health status. (Andi, Rodrigo)
> - Return error number instead of error message in _show/_store. (Andi)
> - Move GPU health sysfs init error logging to xe_ras_init. (Andi)
> - Return only the current health state for sysfs read. (Andi, Rodrigo)
> - Add documentation for sysfs interface. (Andi, Rodrigo)
>
> v2:
> - Make logs and structures consistent with their counterparts. (Riana)
> - Drop unnecessary variables. (Andi, Riana)
> - Add correct KernelVersion. (Raag)
>
> Signed-off-by: Soham Purkait <soham.purkait@intel.com>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/1] drm/xe/xe_ras: Add RAS GPU health indicator
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
2026-06-10 10:11 ` Gupta, Anshuman
2026-06-15 12:25 ` Andi Shyti
@ 2026-06-17 8:35 ` Nilawar, Badal
2026-06-17 18:48 ` Purkait, Soham
2 siblings, 1 reply; 10+ messages in thread
From: Nilawar, Badal @ 2026-06-17 8:35 UTC (permalink / raw)
To: Soham Purkait, intel-xe, riana.tauro, anshuman.gupta,
aravind.iddamsetty, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, andi.shyti, rodrigo.vivi
Cc: anoop.c.vijay
On 10-06-2026 15:03, Soham Purkait wrote:
> Add a sysfs interface that reports the current GPU health state and
> lets admin users and management tools update it but is readable by all
> users. Requests are routed through the sysctrl mailbox. The interface
> is present only on platforms that support the GPU health indicator.
>
> The interface is a single read/write file at the device level:
>
> $ cat /sys/.../device/gpu_health
> ok
>
> $ echo critical > /sys/.../device/gpu_health
>
> $ cat /sys/.../device/gpu_health
> critical
>
> v1:
> - Add enum for health status. (Andi, Rodrigo)
> - Return error number instead of error message in _show/_store. (Andi)
> - Move GPU health sysfs init error logging to xe_ras_init. (Andi)
> - Return only the current health state for sysfs read. (Andi, Rodrigo)
> - Add documentation for sysfs interface. (Andi, Rodrigo)
>
> v2:
> - Make logs and structures consistent with their counterparts. (Riana)
> - Drop unnecessary variables. (Andi, Riana)
> - Add correct KernelVersion. (Raag)
>
> Signed-off-by: Soham Purkait <soham.purkait@intel.com>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> .../ABI/testing/sysfs-driver-intel-xe-ras | 30 +++
> drivers/gpu/drm/xe/xe_ras.c | 177 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 1 +
> drivers/gpu/drm/xe/xe_ras_types.h | 60 ++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 3 +
> drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 4 +
> 7 files changed, 303 insertions(+)
> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-ras
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-ras b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
> new file mode 100644
> index 000000000000..c7f2cf8bb6ad
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
> @@ -0,0 +1,30 @@
> +What: /sys/bus/pci/drivers/xe/.../gpu_health
> +Date: April 2026
> +KernelVersion: 7.2
> +Contact: intel-xe@lists.freedesktop.org
> +Description:
> + This file exposes the current GPU health state and allows the GPU
> + health state to be updated.
> +
> + This sysfs file is present only on Intel Xe platforms that support
> + the GPU health indicator interface for RAS. Reading the current
> + health state is available to all users, while updating the health
> + state is restricted to administrative users only.
> +
> + Read returns a single line containing one of the valid values for
> + the current device health state. Writing one of the valid values
> + updates the current device health state.
> +
> + The valid values for the device health state are:
> +
> + ok
> + The device is healthy and operating within normal
> + parameters.
> +
> + warning
> + The device is experiencing minor issues but remains
> + operational.
> +
> + critical
> + The device is in a critical state and may not be
> + operational.
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 4cb16b419b0c..b7efd607aadf 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -4,11 +4,14 @@
> */
>
> #include "xe_device.h"
> +#include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_ras.h"
> #include "xe_ras_types.h"
> #include "xe_sysctrl.h"
> #include "xe_sysctrl_event_types.h"
> +#include "xe_sysctrl_mailbox.h"
> +#include "xe_sysctrl_mailbox_types.h"
>
> /* Severity of detected errors */
> enum xe_ras_severity {
> @@ -31,6 +34,16 @@ enum xe_ras_component {
> XE_RAS_COMP_MAX
> };
>
> +/* RAS response status codes */
> +enum xe_ras_response_status {
> + XE_RAS_STATUS_SUCCESS = 0,
> + XE_RAS_STATUS_INVALID_PARAM,
> + XE_RAS_STATUS_OP_NOT_SUPPORTED,
> + XE_RAS_STATUS_TIMEOUT,
> + XE_RAS_STATUS_HARDWARE_FAILURE,
> + XE_RAS_STATUS_INSUFFICIENT_RESOURCES
> +};
> +
> static const char *const xe_ras_severities[] = {
> [XE_RAS_SEV_NOT_SUPPORTED] = "Not Supported",
> [XE_RAS_SEV_CORRECTABLE] = "Correctable Error",
> @@ -50,6 +63,33 @@ static const char *const xe_ras_components[] = {
> };
> static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
>
> +static const char * const gpu_health_states[] = {
> + [XE_RAS_HEALTH_STATUS_OK] = "ok",
> + [XE_RAS_HEALTH_STATUS_WARNING] = "warning",
> + [XE_RAS_HEALTH_STATUS_CRITICAL] = "critical"
> +};
> +static_assert(ARRAY_SIZE(gpu_health_states) == XE_RAS_HEALTH_STATUS_MAX);
> +
> +static int ras_status_to_errno(u32 status)
> +{
> + switch (status) {
> + case XE_RAS_STATUS_SUCCESS:
> + return 0;
> + case XE_RAS_STATUS_INVALID_PARAM:
> + return -EINVAL;
> + case XE_RAS_STATUS_OP_NOT_SUPPORTED:
> + return -EOPNOTSUPP;
> + case XE_RAS_STATUS_TIMEOUT:
> + return -ETIMEDOUT;
> + case XE_RAS_STATUS_HARDWARE_FAILURE:
> + return -EIO;
> + case XE_RAS_STATUS_INSUFFICIENT_RESOURCES:
> + return -ENOSPC;
> + default:
> + return -EPROTO;
> + }
> +}
> +
> static inline const char *sev_to_str(u8 severity)
> {
> if (severity >= XE_RAS_SEV_MAX)
> @@ -91,3 +131,140 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> comp_to_str(component), sev_to_str(severity));
> }
> }
> +
> +static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf)
> +{
> + struct xe_ras_get_health_response response = {0};
> + struct xe_sysctrl_mailbox_command command = {0};
> + struct xe_ras_get_health_request request = {0};
> + struct xe_device *xe = kdev_to_xe_device(dev);
> + enum xe_ras_health_status health;
> + size_t rlen = 0;
> + int ret;
> +
> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_HEALTH,
> + &request, sizeof(request), &response, sizeof(response));
> + guard(xe_pm_runtime)(xe);
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "sysctrl: failed to send get health command %d\n", ret);
> + return ret;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "sysctrl: unexpected get health response length %zu (expected %zu)\n",
> + rlen, sizeof(response));
> + return -EIO;
> + }
> + if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
> + xe_err(xe, "sysctrl: invalid health state %u\n",
> + response.current_health);
> + return -EIO;
> + }
> +
> + health = (enum xe_ras_health_status)response.current_health;
> +
> + xe_dbg(xe, "[RAS]: get health:%s\n", gpu_health_states[health]);
> +
> + return sysfs_emit(buf, "%s\n", gpu_health_states[health]);
> +}
> +
> +static ssize_t gpu_health_store(struct device *dev, struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + struct xe_ras_set_health_response response = {0};
> + struct xe_sysctrl_mailbox_command command = {0};
> + struct xe_ras_set_health_request request = {0};
> + struct xe_device *xe = kdev_to_xe_device(dev);
> + enum xe_ras_health_status health;
> + size_t rlen = 0;
> + int ras_status;
> + int state;
> + int ret;
> +
> + state = sysfs_match_string(gpu_health_states, buf);
> + if (state < 0) {
> + xe_err(xe, "[RAS]: invalid health state '%.*s'\n",
> + (int)strcspn(buf, "\n"), buf);
> + return -EINVAL;
> + }
> +
> + request.new_health = (u8)state;
> +
> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_SET_HEALTH,
> + &request, sizeof(request), &response, sizeof(response));
> + guard(xe_pm_runtime)(xe);
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "sysctrl: failed to send set health command %d\n", ret);
> + return ret;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "sysctrl: unexpected set health response length %zu (expected %zu)\n",
> + rlen, sizeof(response));
> + return -EIO;
> + }
> +
> + ras_status = ras_status_to_errno(response.status);
> + if (ras_status) {
> + xe_err(xe, "sysctrl: set health command failed with status %d\n",
> + response.status);
> + return ras_status;
> + }
> +
> + if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
> + xe_err(xe, "sysctrl: invalid health state %u\n",
> + response.current_health);
> + return -EIO;
> + }
> +
> + health = (enum xe_ras_health_status)response.current_health;
> +
> + xe_dbg(xe, "[RAS]: set health:%s\n", gpu_health_states[health]);
The [RAS] prefix is redundant here as xe_dbg macro already includes
driver/subsystem context.
> +
> + return count;
> +}
> +
> +static DEVICE_ATTR_RW(gpu_health);
> +
> +static void gpu_health_sysfs_fini(void *arg)
> +{
> + struct device *dev = arg;
> +
> + device_remove_file(dev, &dev_attr_gpu_health);
> +}
> +
> +static int gpu_health_sysfs_init(struct xe_device *xe)
> +{
> + struct device *dev = xe->drm.dev;
> + int err;
> +
> + err = device_create_file(dev, &dev_attr_gpu_health);
> + if (err)
> + return err;
> +
> + err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev);
> + if (err)
> + return err;
> +
> + return 0;
> +}
> +
> +/**
> + * xe_ras_init - Initialize Xe RAS
> + * @xe: xe device instance
> + *
> + * Initialize the RAS GPU health sysfs interface.
> + */
> +void xe_ras_init(struct xe_device *xe)
> +{
> + int ret;
> +
> + if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
> + return;
> +
> + ret = gpu_health_sysfs_init(xe);
> + if (ret)
> + xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, err=%d\n", ret);
ditto.
> +}
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index ea90593b62dc..8acfd0ffe48e 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -11,5 +11,6 @@ struct xe_sysctrl_event_response;
>
> void xe_ras_counter_threshold_crossed(struct xe_device *xe,
> struct xe_sysctrl_event_response *response);
> +void xe_ras_init(struct xe_device *xe);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index 4e63c67f806a..4767bcf315a3 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -10,6 +10,21 @@
>
> #define XE_RAS_NUM_COUNTERS 16
>
> +/**
> + * enum xe_ras_health_status - Device health status values
> + *
> + * @XE_RAS_HEALTH_STATUS_OK: Device is healthy and operating normally.
> + * @XE_RAS_HEALTH_STATUS_WARNING: Device has minor issues but is still operational.
> + * @XE_RAS_HEALTH_STATUS_CRITICAL: Device is in a critical state and may not be operational.
> + * @XE_RAS_HEALTH_STATUS_MAX: Sentinel value for validation
> + */
> +enum xe_ras_health_status {
> + XE_RAS_HEALTH_STATUS_OK = 0,
> + XE_RAS_HEALTH_STATUS_WARNING,
> + XE_RAS_HEALTH_STATUS_CRITICAL,
> + XE_RAS_HEALTH_STATUS_MAX
> +};
> +
> /**
> * struct xe_ras_error_common - Error fields that are common across all products
> */
> @@ -70,4 +85,49 @@ struct xe_ras_threshold_crossed {
> struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
> } __packed;
>
> +/**
> + * struct xe_ras_get_health_request - Request structure for GFSP GET_HEALTH
> + *
> + * GET_HEALTH takes no input parameters; the reserved payload is kept to
> + * preserve the firmware wire layout and allow future extensions. The
> + * driver must zero all reserved fields.
> + */
> +struct xe_ras_get_health_request {
> + /** @reserved: Reserved for future use. */
> + u32 reserved[2];
> +} __packed;
> +
> +/**
> + * struct xe_ras_get_health_response - Response structure for GFSP GET_HEALTH
> + */
> +struct xe_ras_get_health_response {
> + /** @current_health: Current GPU health, see &enum xe_ras_health_status */
> + u8 current_health;
> + /** @reserved: Reserved for future use */
> + u8 reserved[3];
> +} __packed;
> +
> +/**
> + * struct xe_ras_set_health_request - Request structure for GFSP SET_HEALTH
> + */
> +struct xe_ras_set_health_request {
> + /** @new_health: New GPU health to set, see &enum xe_ras_health_status */
> + u8 new_health;
> + /** @reserved: Reserved for future use */
> + u8 reserved[3];
> +} __packed;
> +
> +/**
> + * struct xe_ras_set_health_response - Response structure for GFSP SET_HEALTH
> + */
> +struct xe_ras_set_health_response {
> + /** @status: Status of set health operation, see &enum xe_ras_response_status */
> + u32 status;
> + /** @current_health: Resulting current GPU health, see &enum xe_ras_health_status */
> + u8 current_health;
> + /** @reserved: Reserved for future use */
> + u8 reserved[3];
> + /** @reserved1: Reserved for future use */
> + u32 reserved1[2];
If firmware wire layout permits then how about combining reserved fields
in single appropriately sized array.
> +} __packed;
Missing blank line here.
Thanks,
Badal
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> index 3caa9f15875f..9507f68bc2eb 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> @@ -293,6 +293,34 @@ static int sysctrl_send_command(struct xe_sysctrl *sc,
> return 0;
> }
>
> +/**
> + * xe_sysctrl_create_command() - Create system controller command
> + * @command: Sysctrl command structure
> + * @group_id: Command group ID
> + * @cmd_id: Command ID
> + * @request: Pointer to request buffer (can be NULL)
> + * @request_len: Size of request buffer
> + * @response: Pointer to response buffer
> + * @response_len: Size of response buffer
> + *
> + * Helper function to build sysctrl command to be sent via %xe_sysctrl_send_command()
> + */
> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
> + void *request, size_t request_len, void *response,
> + size_t response_len)
> +{
> + struct xe_sysctrl_app_msg_hdr header = {0};
> +
> + header.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, group_id) |
> + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_id);
> +
> + command->header = header;
> + command->data_in = request;
> + command->data_in_len = request_len;
> + command->data_out = response;
> + command->data_out_len = response_len;
> +}
> +
> /**
> * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface
> * @sc: System controller structure
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> index f67e9234de48..fb434cc165b2 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> @@ -23,6 +23,9 @@ struct xe_sysctrl_mailbox_command;
> #define XE_SYSCTRL_APP_HDR_VERSION(hdr) \
> FIELD_GET(APP_HDR_VERSION_MASK, (hdr)->data)
>
> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command *command, u8 group_id, u8 cmd_id,
> + void *request, size_t request_len, void *response,
> + size_t response_len);
> void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
> int xe_sysctrl_send_command(struct xe_sysctrl *sc,
> struct xe_sysctrl_mailbox_command *cmd,
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 84d7c647e743..f82e3fb9b5ef 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -23,9 +23,13 @@ enum xe_sysctrl_group {
> * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
> *
> * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
> + * @XE_SYSCTRL_CMD_GET_HEALTH: Retrieve current health status
> + * @XE_SYSCTRL_CMD_SET_HEALTH: Set new health status
> */
> enum xe_sysctrl_gfsp_cmd {
> XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
> + XE_SYSCTRL_CMD_GET_HEALTH = 0x0B,
> + XE_SYSCTRL_CMD_SET_HEALTH = 0x0C,
> };
>
> /**
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/1] drm/xe/xe_ras: Add RAS GPU health indicator
2026-06-17 8:35 ` Nilawar, Badal
@ 2026-06-17 18:48 ` Purkait, Soham
0 siblings, 0 replies; 10+ messages in thread
From: Purkait, Soham @ 2026-06-17 18:48 UTC (permalink / raw)
To: Nilawar, Badal, intel-xe, riana.tauro, anshuman.gupta,
aravind.iddamsetty, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, andi.shyti, rodrigo.vivi
Cc: anoop.c.vijay
Hi Badal,
On 17-06-2026 14:05, Nilawar, Badal wrote:
>
> On 10-06-2026 15:03, Soham Purkait wrote:
>> Add a sysfs interface that reports the current GPU health state and
>> lets admin users and management tools update it but is readable by all
>> users. Requests are routed through the sysctrl mailbox. The interface
>> is present only on platforms that support the GPU health indicator.
>>
>> The interface is a single read/write file at the device level:
>>
>> $ cat /sys/.../device/gpu_health
>> ok
>>
>> $ echo critical > /sys/.../device/gpu_health
>>
>> $ cat /sys/.../device/gpu_health
>> critical
>>
>> v1:
>> - Add enum for health status. (Andi, Rodrigo)
>> - Return error number instead of error message in _show/_store. (Andi)
>> - Move GPU health sysfs init error logging to xe_ras_init. (Andi)
>> - Return only the current health state for sysfs read. (Andi, Rodrigo)
>> - Add documentation for sysfs interface. (Andi, Rodrigo)
>>
>> v2:
>> - Make logs and structures consistent with their counterparts. (Riana)
>> - Drop unnecessary variables. (Andi, Riana)
>> - Add correct KernelVersion. (Raag)
>>
>> Signed-off-by: Soham Purkait <soham.purkait@intel.com>
>> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> ---
>> .../ABI/testing/sysfs-driver-intel-xe-ras | 30 +++
>> drivers/gpu/drm/xe/xe_ras.c | 177 ++++++++++++++++++
>> drivers/gpu/drm/xe/xe_ras.h | 1 +
>> drivers/gpu/drm/xe/xe_ras_types.h | 60 ++++++
>> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 28 +++
>> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 3 +
>> drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 4 +
>> 7 files changed, 303 insertions(+)
>> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-xe-ras
>>
>> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
>> b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
>> new file mode 100644
>> index 000000000000..c7f2cf8bb6ad
>> --- /dev/null
>> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-ras
>> @@ -0,0 +1,30 @@
>> +What: /sys/bus/pci/drivers/xe/.../gpu_health
>> +Date: April 2026
>> +KernelVersion: 7.2
>> +Contact: intel-xe@lists.freedesktop.org
>> +Description:
>> + This file exposes the current GPU health state and allows
>> the GPU
>> + health state to be updated.
>> +
>> + This sysfs file is present only on Intel Xe platforms that
>> support
>> + the GPU health indicator interface for RAS. Reading the current
>> + health state is available to all users, while updating the
>> health
>> + state is restricted to administrative users only.
>> +
>> + Read returns a single line containing one of the valid
>> values for
>> + the current device health state. Writing one of the valid
>> values
>> + updates the current device health state.
>> +
>> + The valid values for the device health state are:
>> +
>> + ok
>> + The device is healthy and operating within normal
>> + parameters.
>> +
>> + warning
>> + The device is experiencing minor issues but remains
>> + operational.
>> +
>> + critical
>> + The device is in a critical state and may not be
>> + operational.
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 4cb16b419b0c..b7efd607aadf 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -4,11 +4,14 @@
>> */
>> #include "xe_device.h"
>> +#include "xe_pm.h"
>> #include "xe_printk.h"
>> #include "xe_ras.h"
>> #include "xe_ras_types.h"
>> #include "xe_sysctrl.h"
>> #include "xe_sysctrl_event_types.h"
>> +#include "xe_sysctrl_mailbox.h"
>> +#include "xe_sysctrl_mailbox_types.h"
>> /* Severity of detected errors */
>> enum xe_ras_severity {
>> @@ -31,6 +34,16 @@ enum xe_ras_component {
>> XE_RAS_COMP_MAX
>> };
>> +/* RAS response status codes */
>> +enum xe_ras_response_status {
>> + XE_RAS_STATUS_SUCCESS = 0,
>> + XE_RAS_STATUS_INVALID_PARAM,
>> + XE_RAS_STATUS_OP_NOT_SUPPORTED,
>> + XE_RAS_STATUS_TIMEOUT,
>> + XE_RAS_STATUS_HARDWARE_FAILURE,
>> + XE_RAS_STATUS_INSUFFICIENT_RESOURCES
>> +};
>> +
>> static const char *const xe_ras_severities[] = {
>> [XE_RAS_SEV_NOT_SUPPORTED] = "Not Supported",
>> [XE_RAS_SEV_CORRECTABLE] = "Correctable Error",
>> @@ -50,6 +63,33 @@ static const char *const xe_ras_components[] = {
>> };
>> static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
>> +static const char * const gpu_health_states[] = {
>> + [XE_RAS_HEALTH_STATUS_OK] = "ok",
>> + [XE_RAS_HEALTH_STATUS_WARNING] = "warning",
>> + [XE_RAS_HEALTH_STATUS_CRITICAL] = "critical"
>> +};
>> +static_assert(ARRAY_SIZE(gpu_health_states) ==
>> XE_RAS_HEALTH_STATUS_MAX);
>> +
>> +static int ras_status_to_errno(u32 status)
>> +{
>> + switch (status) {
>> + case XE_RAS_STATUS_SUCCESS:
>> + return 0;
>> + case XE_RAS_STATUS_INVALID_PARAM:
>> + return -EINVAL;
>> + case XE_RAS_STATUS_OP_NOT_SUPPORTED:
>> + return -EOPNOTSUPP;
>> + case XE_RAS_STATUS_TIMEOUT:
>> + return -ETIMEDOUT;
>> + case XE_RAS_STATUS_HARDWARE_FAILURE:
>> + return -EIO;
>> + case XE_RAS_STATUS_INSUFFICIENT_RESOURCES:
>> + return -ENOSPC;
>> + default:
>> + return -EPROTO;
>> + }
>> +}
>> +
>> static inline const char *sev_to_str(u8 severity)
>> {
>> if (severity >= XE_RAS_SEV_MAX)
>> @@ -91,3 +131,140 @@ void xe_ras_counter_threshold_crossed(struct
>> xe_device *xe,
>> comp_to_str(component), sev_to_str(severity));
>> }
>> }
>> +
>> +static ssize_t gpu_health_show(struct device *dev, struct
>> device_attribute *attr, char *buf)
>> +{
>> + struct xe_ras_get_health_response response = {0};
>> + struct xe_sysctrl_mailbox_command command = {0};
>> + struct xe_ras_get_health_request request = {0};
>> + struct xe_device *xe = kdev_to_xe_device(dev);
>> + enum xe_ras_health_status health;
>> + size_t rlen = 0;
>> + int ret;
>> +
>> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP,
>> XE_SYSCTRL_CMD_GET_HEALTH,
>> + &request, sizeof(request), &response,
>> sizeof(response));
>> + guard(xe_pm_runtime)(xe);
>> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
>> + if (ret) {
>> + xe_err(xe, "sysctrl: failed to send get health command
>> %d\n", ret);
>> + return ret;
>> + }
>> +
>> + if (rlen != sizeof(response)) {
>> + xe_err(xe, "sysctrl: unexpected get health response length
>> %zu (expected %zu)\n",
>> + rlen, sizeof(response));
>> + return -EIO;
>> + }
>> + if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
>> + xe_err(xe, "sysctrl: invalid health state %u\n",
>> + response.current_health);
>> + return -EIO;
>> + }
>> +
>> + health = (enum xe_ras_health_status)response.current_health;
>> +
>> + xe_dbg(xe, "[RAS]: get health:%s\n", gpu_health_states[health]);
>> +
>> + return sysfs_emit(buf, "%s\n", gpu_health_states[health]);
>> +}
>> +
>> +static ssize_t gpu_health_store(struct device *dev, struct
>> device_attribute *attr,
>> + const char *buf, size_t count)
>> +{
>> + struct xe_ras_set_health_response response = {0};
>> + struct xe_sysctrl_mailbox_command command = {0};
>> + struct xe_ras_set_health_request request = {0};
>> + struct xe_device *xe = kdev_to_xe_device(dev);
>> + enum xe_ras_health_status health;
>> + size_t rlen = 0;
>> + int ras_status;
>> + int state;
>> + int ret;
>> +
>> + state = sysfs_match_string(gpu_health_states, buf);
>> + if (state < 0) {
>> + xe_err(xe, "[RAS]: invalid health state '%.*s'\n",
>> + (int)strcspn(buf, "\n"), buf);
>> + return -EINVAL;
>> + }
>> +
>> + request.new_health = (u8)state;
>> +
>> + xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP,
>> XE_SYSCTRL_CMD_SET_HEALTH,
>> + &request, sizeof(request), &response,
>> sizeof(response));
>> + guard(xe_pm_runtime)(xe);
>> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
>> + if (ret) {
>> + xe_err(xe, "sysctrl: failed to send set health command
>> %d\n", ret);
>> + return ret;
>> + }
>> +
>> + if (rlen != sizeof(response)) {
>> + xe_err(xe, "sysctrl: unexpected set health response length
>> %zu (expected %zu)\n",
>> + rlen, sizeof(response));
>> + return -EIO;
>> + }
>> +
>> + ras_status = ras_status_to_errno(response.status);
>> + if (ras_status) {
>> + xe_err(xe, "sysctrl: set health command failed with status
>> %d\n",
>> + response.status);
>> + return ras_status;
>> + }
>> +
>> + if (response.current_health >= XE_RAS_HEALTH_STATUS_MAX) {
>> + xe_err(xe, "sysctrl: invalid health state %u\n",
>> + response.current_health);
>> + return -EIO;
>> + }
>> +
>> + health = (enum xe_ras_health_status)response.current_health;
>> +
>> + xe_dbg(xe, "[RAS]: set health:%s\n", gpu_health_states[health]);
> The [RAS] prefix is redundant here as xe_dbg macro already includes
> driver/subsystem context.
xe_dbg does not print [RAS] prefix by default. This convention is
already being used in upstream: <operation>:<value> <component> <severity>
>> +
>> + return count;
>> +}
>> +
>> +static DEVICE_ATTR_RW(gpu_health);
>> +
>> +static void gpu_health_sysfs_fini(void *arg)
>> +{
>> + struct device *dev = arg;
>> +
>> + device_remove_file(dev, &dev_attr_gpu_health);
>> +}
>> +
>> +static int gpu_health_sysfs_init(struct xe_device *xe)
>> +{
>> + struct device *dev = xe->drm.dev;
>> + int err;
>> +
>> + err = device_create_file(dev, &dev_attr_gpu_health);
>> + if (err)
>> + return err;
>> +
>> + err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev);
>> + if (err)
>> + return err;
>> +
>> + return 0;
>> +}
>> +
>> +/**
>> + * xe_ras_init - Initialize Xe RAS
>> + * @xe: xe device instance
>> + *
>> + * Initialize the RAS GPU health sysfs interface.
>> + */
>> +void xe_ras_init(struct xe_device *xe)
>> +{
>> + int ret;
>> +
>> + if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
>> + return;
>> +
>> + ret = gpu_health_sysfs_init(xe);
>> + if (ret)
>> + xe_err(xe, "[RAS]: failed to initialize GPU health sysfs,
>> err=%d\n", ret);
> ditto.
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
>> index ea90593b62dc..8acfd0ffe48e 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.h
>> +++ b/drivers/gpu/drm/xe/xe_ras.h
>> @@ -11,5 +11,6 @@ struct xe_sysctrl_event_response;
>> void xe_ras_counter_threshold_crossed(struct xe_device *xe,
>> struct xe_sysctrl_event_response *response);
>> +void xe_ras_init(struct xe_device *xe);
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h
>> b/drivers/gpu/drm/xe/xe_ras_types.h
>> index 4e63c67f806a..4767bcf315a3 100644
>> --- a/drivers/gpu/drm/xe/xe_ras_types.h
>> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
>> @@ -10,6 +10,21 @@
>> #define XE_RAS_NUM_COUNTERS 16
>> +/**
>> + * enum xe_ras_health_status - Device health status values
>> + *
>> + * @XE_RAS_HEALTH_STATUS_OK: Device is healthy and operating normally.
>> + * @XE_RAS_HEALTH_STATUS_WARNING: Device has minor issues but is
>> still operational.
>> + * @XE_RAS_HEALTH_STATUS_CRITICAL: Device is in a critical state and
>> may not be operational.
>> + * @XE_RAS_HEALTH_STATUS_MAX: Sentinel value for validation
>> + */
>> +enum xe_ras_health_status {
>> + XE_RAS_HEALTH_STATUS_OK = 0,
>> + XE_RAS_HEALTH_STATUS_WARNING,
>> + XE_RAS_HEALTH_STATUS_CRITICAL,
>> + XE_RAS_HEALTH_STATUS_MAX
>> +};
>> +
>> /**
>> * struct xe_ras_error_common - Error fields that are common across
>> all products
>> */
>> @@ -70,4 +85,49 @@ struct xe_ras_threshold_crossed {
>> struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
>> } __packed;
>> +/**
>> + * struct xe_ras_get_health_request - Request structure for GFSP
>> GET_HEALTH
>> + *
>> + * GET_HEALTH takes no input parameters; the reserved payload is
>> kept to
>> + * preserve the firmware wire layout and allow future extensions. The
>> + * driver must zero all reserved fields.
>> + */
>> +struct xe_ras_get_health_request {
>> + /** @reserved: Reserved for future use. */
>> + u32 reserved[2];
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_get_health_response - Response structure for GFSP
>> GET_HEALTH
>> + */
>> +struct xe_ras_get_health_response {
>> + /** @current_health: Current GPU health, see &enum
>> xe_ras_health_status */
>> + u8 current_health;
>> + /** @reserved: Reserved for future use */
>> + u8 reserved[3];
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_set_health_request - Request structure for GFSP
>> SET_HEALTH
>> + */
>> +struct xe_ras_set_health_request {
>> + /** @new_health: New GPU health to set, see &enum
>> xe_ras_health_status */
>> + u8 new_health;
>> + /** @reserved: Reserved for future use */
>> + u8 reserved[3];
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_set_health_response - Response structure for GFSP
>> SET_HEALTH
>> + */
>> +struct xe_ras_set_health_response {
>> + /** @status: Status of set health operation, see &enum
>> xe_ras_response_status */
>> + u32 status;
>> + /** @current_health: Resulting current GPU health, see &enum
>> xe_ras_health_status */
>> + u8 current_health;
>> + /** @reserved: Reserved for future use */
>> + u8 reserved[3];
>> + /** @reserved1: Reserved for future use */
>> + u32 reserved1[2];
> If firmware wire layout permits then how about combining reserved
> fields in single appropriately sized array.
Regarding the reserved fields, I was thinking to keep it as is (as
documented) to avoid the confusion.
Thanks,
Soham
>> +} __packed;
>
> Missing blank line here.
>
> Thanks,
> Badal
>
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>> index 3caa9f15875f..9507f68bc2eb 100644
>> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>> @@ -293,6 +293,34 @@ static int sysctrl_send_command(struct
>> xe_sysctrl *sc,
>> return 0;
>> }
>> +/**
>> + * xe_sysctrl_create_command() - Create system controller command
>> + * @command: Sysctrl command structure
>> + * @group_id: Command group ID
>> + * @cmd_id: Command ID
>> + * @request: Pointer to request buffer (can be NULL)
>> + * @request_len: Size of request buffer
>> + * @response: Pointer to response buffer
>> + * @response_len: Size of response buffer
>> + *
>> + * Helper function to build sysctrl command to be sent via
>> %xe_sysctrl_send_command()
>> + */
>> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command
>> *command, u8 group_id, u8 cmd_id,
>> + void *request, size_t request_len, void *response,
>> + size_t response_len)
>> +{
>> + struct xe_sysctrl_app_msg_hdr header = {0};
>> +
>> + header.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, group_id) |
>> + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_id);
>> +
>> + command->header = header;
>> + command->data_in = request;
>> + command->data_in_len = request_len;
>> + command->data_out = response;
>> + command->data_out_len = response_len;
>> +}
>> +
>> /**
>> * xe_sysctrl_mailbox_init - Initialize System Controller mailbox
>> interface
>> * @sc: System controller structure
>> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
>> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
>> index f67e9234de48..fb434cc165b2 100644
>> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
>> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
>> @@ -23,6 +23,9 @@ struct xe_sysctrl_mailbox_command;
>> #define XE_SYSCTRL_APP_HDR_VERSION(hdr) \
>> FIELD_GET(APP_HDR_VERSION_MASK, (hdr)->data)
>> +void xe_sysctrl_create_command(struct xe_sysctrl_mailbox_command
>> *command, u8 group_id, u8 cmd_id,
>> + void *request, size_t request_len, void *response,
>> + size_t response_len);
>> void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
>> int xe_sysctrl_send_command(struct xe_sysctrl *sc,
>> struct xe_sysctrl_mailbox_command *cmd,
>> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
>> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
>> index 84d7c647e743..f82e3fb9b5ef 100644
>> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
>> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
>> @@ -23,9 +23,13 @@ enum xe_sysctrl_group {
>> * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
>> *
>> * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
>> + * @XE_SYSCTRL_CMD_GET_HEALTH: Retrieve current health status
>> + * @XE_SYSCTRL_CMD_SET_HEALTH: Set new health status
>> */
>> enum xe_sysctrl_gfsp_cmd {
>> XE_SYSCTRL_CMD_GET_PENDING_EVENT = 0x07,
>> + XE_SYSCTRL_CMD_GET_HEALTH = 0x0B,
>> + XE_SYSCTRL_CMD_SET_HEALTH = 0x0C,
>> };
>> /**
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-06-17 18:49 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-10 9:33 [PATCH v4 0/1] drm/xe: Add support for GPU health indicator Soham Purkait
2026-06-10 9:33 ` [PATCH v4 1/1] drm/xe/xe_ras: Add RAS " Soham Purkait
2026-06-10 10:11 ` Gupta, Anshuman
2026-06-15 12:25 ` Andi Shyti
2026-06-17 8:35 ` Nilawar, Badal
2026-06-17 18:48 ` Purkait, Soham
2026-06-10 9:39 ` ✗ CI.checkpatch: warning for drm/xe: Add support for " Patchwork
2026-06-10 9:41 ` ✓ CI.KUnit: success " Patchwork
2026-06-10 10:25 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-10 16:14 ` ✓ Xe.CI.FULL: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.