[PATCH v2 0/2] thermal: Add support A9

[PATCH v2 0/2] thermal: Add support A9

[Xianwei Zhao via B4 Relay]

Document the thermal controller compatibles for the Amlogic A9 SoC
And add driver support for the Amlogic A9 thermal controller.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
Changes in v2:
- Fix the spelling mistakes (clock-names) and reset-temp properties is visible to old chips.
- Adjust the clock enable sequence in resume func and remove the clock disable in remove func.
- Add the judgment on the divisor zero.
- Add description of support for over-temperature reset for old chips in commit message.
- Link to v1: https://lore.kernel.org/r/20260730-a9-thermal-v1-0-d786d37cba58@amlogic.com

---
Xianwei Zhao (2):
      dt-bindings: thermal: amlogic: Add A9 thermal bindings
      thermal: amlogic: Add support for A9 thermal controller

 .../bindings/thermal/amlogic,thermal.yaml          |  28 +++++-
 drivers/thermal/amlogic_thermal.c                  | 108 ++++++++++++++++++++-
 2 files changed, 132 insertions(+), 4 deletions(-)
---
base-commit: 78bc8af4affb9a732504eb22eeac7d1e50883853
change-id: 20260703-a9-thermal-f62cef6ea91f

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@amlogic.com>

[PATCH v2 0/2] thermal: Add support A9

[Xianwei Zhao via B4 Relay]

Document the thermal controller compatibles for the Amlogic A9 SoC
And add driver support for the Amlogic A9 thermal controller.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
Changes in v2:
- Fix the spelling mistakes (clock-names) and reset-temp properties is visible to old chips.
- Adjust the clock enable sequence in resume func and remove the clock disable in remove func.
- Add the judgment on the divisor zero.
- Add description of support for over-temperature reset for old chips in commit message.
- Link to v1: https://lore.kernel.org/r/20260730-a9-thermal-v1-0-d786d37cba58@amlogic.com

---
Xianwei Zhao (2):
      dt-bindings: thermal: amlogic: Add A9 thermal bindings
      thermal: amlogic: Add support for A9 thermal controller

 .../bindings/thermal/amlogic,thermal.yaml          |  28 +++++-
 drivers/thermal/amlogic_thermal.c                  | 108 ++++++++++++++++++++-
 2 files changed, 132 insertions(+), 4 deletions(-)
---
base-commit: 78bc8af4affb9a732504eb22eeac7d1e50883853
change-id: 20260703-a9-thermal-f62cef6ea91f

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@amlogic.com>



_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

[PATCH v2 0/2] thermal: Add support A9

[Xianwei Zhao]

Document the thermal controller compatibles for the Amlogic A9 SoC
And add driver support for the Amlogic A9 thermal controller.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
Changes in v2:
- Fix the spelling mistakes (clock-names) and reset-temp properties is visible to old chips.
- Adjust the clock enable sequence in resume func and remove the clock disable in remove func.
- Add the judgment on the divisor zero.
- Add description of support for over-temperature reset for old chips in commit message.
- Link to v1: https://lore.kernel.org/r/20260730-a9-thermal-v1-0-d786d37cba58@amlogic.com

---
Xianwei Zhao (2):
      dt-bindings: thermal: amlogic: Add A9 thermal bindings
      thermal: amlogic: Add support for A9 thermal controller

 .../bindings/thermal/amlogic,thermal.yaml          |  28 +++++-
 drivers/thermal/amlogic_thermal.c                  | 108 ++++++++++++++++++++-
 2 files changed, 132 insertions(+), 4 deletions(-)
---
base-commit: 78bc8af4affb9a732504eb22eeac7d1e50883853
change-id: 20260703-a9-thermal-f62cef6ea91f

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@amlogic.com>

[PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Document the thermal controller compatibles for the Amlogic A9 SoC.

Describe the required "core" and "plck" clocks, add the optional
"amlogic,hw-reset-temp" property, and update the schema constraints for
A9-specific thermal controllers.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
index 8cfa44dcda58..f73ee66bcc47 100644
--- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
@@ -23,6 +23,7 @@ properties:
           - const: amlogic,g12a-thermal
       - enum:
           - amlogic,a1-cpu-thermal
+          - amlogic,a9-thermal
           - amlogic,t7-thermal
 
   reg:
@@ -32,7 +33,13 @@ properties:
     maxItems: 1
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: core
+      - const: pclk
 
   power-domains:
     maxItems: 1
@@ -52,6 +59,10 @@ properties:
           - description: phandle to the secure monitor
           - description: sensor index to get specific calibration data
 
+  amlogic,hw-reset-temp:
+    description: The hardware-controlled reset temperature value.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
 required:
   - compatible
   - reg
@@ -73,6 +84,21 @@ allOf:
       required:
         - amlogic,secure-monitor
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - amlogic,a9-thermal
+    then:
+      required:
+        - clock-names
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names: false
+
 unevaluatedProperties: false
 
 examples:

-- 
2.52.0

[PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Document the thermal controller compatibles for the Amlogic A9 SoC.

Describe the required "core" and "plck" clocks, add the optional
"amlogic,hw-reset-temp" property, and update the schema constraints for
A9-specific thermal controllers.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
index 8cfa44dcda58..f73ee66bcc47 100644
--- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
@@ -23,6 +23,7 @@ properties:
           - const: amlogic,g12a-thermal
       - enum:
           - amlogic,a1-cpu-thermal
+          - amlogic,a9-thermal
           - amlogic,t7-thermal
 
   reg:
@@ -32,7 +33,13 @@ properties:
     maxItems: 1
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: core
+      - const: pclk
 
   power-domains:
     maxItems: 1
@@ -52,6 +59,10 @@ properties:
           - description: phandle to the secure monitor
           - description: sensor index to get specific calibration data
 
+  amlogic,hw-reset-temp:
+    description: The hardware-controlled reset temperature value.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
 required:
   - compatible
   - reg
@@ -73,6 +84,21 @@ allOf:
       required:
         - amlogic,secure-monitor
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - amlogic,a9-thermal
+    then:
+      required:
+        - clock-names
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names: false
+
 unevaluatedProperties: false
 
 examples:

-- 
2.52.0



_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

[PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao]

Document the thermal controller compatibles for the Amlogic A9 SoC.

Describe the required "core" and "plck" clocks, add the optional
"amlogic,hw-reset-temp" property, and update the schema constraints for
A9-specific thermal controllers.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
index 8cfa44dcda58..f73ee66bcc47 100644
--- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
@@ -23,6 +23,7 @@ properties:
           - const: amlogic,g12a-thermal
       - enum:
           - amlogic,a1-cpu-thermal
+          - amlogic,a9-thermal
           - amlogic,t7-thermal
 
   reg:
@@ -32,7 +33,13 @@ properties:
     maxItems: 1
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: core
+      - const: pclk
 
   power-domains:
     maxItems: 1
@@ -52,6 +59,10 @@ properties:
           - description: phandle to the secure monitor
           - description: sensor index to get specific calibration data
 
+  amlogic,hw-reset-temp:
+    description: The hardware-controlled reset temperature value.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
 required:
   - compatible
   - reg
@@ -73,6 +84,21 @@ allOf:
       required:
         - amlogic,secure-monitor
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - amlogic,a9-thermal
+    then:
+      required:
+        - clock-names
+    else:
+      properties:
+        clocks:
+          maxItems: 1
+        clock-names: false
+
 unevaluatedProperties: false
 
 examples:

-- 
2.52.0

[PATCH v2 2/2] thermal: amlogic: Add support for A9 thermal controller

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add support for the Amlogic A9 thermal controller.

The A9 thermal controller uses different calibration parameters, requires
separate core and bus clocks, and supports a hardware over-temperature
reset mechanism.

Add support for configuring the hardware reset temperature through the
'amlogic,hw-reset-temp' Device Tree property. Newer chips can specify the
hardware reset temperature through Device Tree, while older chips without
this property continue to use the default value of 110°C for backward
compatibility.

Also restore the hardware reset configuration after resume.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 drivers/thermal/amlogic_thermal.c | 108 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 105 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/amlogic_thermal.c b/drivers/thermal/amlogic_thermal.c
index a0b530624b60..96090c5e6061 100644
--- a/drivers/thermal/amlogic_thermal.c
+++ b/drivers/thermal/amlogic_thermal.c
@@ -45,6 +45,18 @@
 		 TSENSOR_CFG_REG1_DEM_EN |	\
 		 TSENSOR_CFG_REG1_CH_SEL)
 
+#define TSENSOR_CFG_REG2			0x8
+	#define TSENSOR_CFG_REG2_HITEMP_EN	BIT(31)
+	#define TSENSOR_CFG_REG2_REBOOT_EN	BIT(30)
+	#define TSENSOR_CFG_REG2_REBOOT_CODE	GENMASK(15, 4)
+	#define TSENSOR_CFG_REG2_REBOOT_TIME	GENMASK(23, 16)
+	#define TSENSOR_CFG_REG2_ENABLE		\
+		(TSENSOR_CFG_REG2_HITEMP_EN |	\
+		 TSENSOR_CFG_REG2_REBOOT_EN |	\
+		 TSENSOR_CFG_REG2_REBOOT_TIME)
+
+#define TSENSOR_TEMP_CAL		1
+
 #define TSENSOR_STAT0			0x40
 
 #define TSENSOR_STAT9			0x64
@@ -63,6 +75,7 @@
 
 #define TSENSOR_CALIB_OFFSET	1
 #define TSENSOR_CALIB_SHIFT	4
+#define TSENSOR_HW_RESET_DEFAULT_TEMP	110000
 
 /**
  * struct amlogic_thermal_soc_calib_data
@@ -93,6 +106,7 @@ struct amlogic_thermal_data {
 	const struct amlogic_thermal_soc_calib_data *calibration_parameters;
 	const struct regmap_config *regmap_config;
 	bool use_sm;
+	bool has_sysclk;
 };
 
 struct amlogic_thermal {
@@ -101,8 +115,10 @@ struct amlogic_thermal {
 	struct regmap *regmap;
 	struct regmap *sec_ao_map;
 	struct clk *clk;
+	struct clk *sysclk;
 	struct thermal_zone_device *tzd;
 	u32 trim_info;
+	u32 temp_code;
 	struct meson_sm_firmware *sm_fw;
 	u32 tsensor_id;
 };
@@ -138,6 +154,49 @@ static int amlogic_thermal_code_to_millicelsius(struct amlogic_thermal *pdata,
 	return temp;
 }
 
+/*
+ * Calculate a temperature code from a temperature value .
+ * The unit of the temperature is degree milliCelsius.
+ */
+static u32 amlogic_thermal_millicelsius_to_code(struct amlogic_thermal *pdata, int millicelsius)
+{
+	const struct amlogic_thermal_soc_calib_data *param =
+					pdata->data->calibration_parameters;
+	s64 factor, uptat, uefuse;
+	u32 temp_code;
+
+	uefuse = pdata->trim_info & TSENSOR_TRIM_SIGN_MASK ?
+			     ~(pdata->trim_info & TSENSOR_TRIM_TEMP_MASK) + 1 :
+			     (pdata->trim_info & TSENSOR_TRIM_TEMP_MASK);
+
+	factor = param->B + div_s64(millicelsius, 100);
+	factor = BIT(16) * factor;
+	factor = div_s64(factor, param->A);
+	factor = factor - uefuse;
+
+	uptat = param->n * factor;
+	uptat = div_s64(uptat, BIT(16));
+	uptat = param->m - uptat;
+
+	factor = factor * 100;
+	if (!uptat)
+		factor = TSENSOR_TEMP_MASK << 0x4;
+	else
+		factor = div_s64(factor, uptat);
+
+	temp_code = ((factor >> 0x4) & TSENSOR_TEMP_MASK) + TSENSOR_TEMP_CAL;
+
+	return temp_code;
+}
+
+static void amlogic_tsensor_setup_hw_reset(struct amlogic_thermal *data)
+{
+	regmap_update_bits(data->regmap, TSENSOR_CFG_REG2, TSENSOR_CFG_REG2_REBOOT_CODE,
+			   data->temp_code << 0x4);
+	regmap_update_bits(data->regmap, TSENSOR_CFG_REG2,
+			   TSENSOR_CFG_REG2_ENABLE, TSENSOR_CFG_REG2_ENABLE);
+}
+
 static int amlogic_thermal_enable(struct amlogic_thermal *data)
 {
 	int ret;
@@ -254,6 +313,13 @@ static const struct amlogic_thermal_soc_calib_data amlogic_thermal_g12a = {
 	.n = 324,
 };
 
+static const struct amlogic_thermal_soc_calib_data amlogic_thermal_a9 = {
+	.A = 9164,
+	.B = 2747,
+	.m = 370,
+	.n = 270,
+};
+
 static const struct amlogic_thermal_data amlogic_thermal_g12a_cpu_param = {
 	.u_efuse_off = 0x128,
 	.calibration_parameters = &amlogic_thermal_g12a,
@@ -272,6 +338,13 @@ static const struct amlogic_thermal_data amlogic_thermal_a1_cpu_param = {
 	.regmap_config = &amlogic_thermal_regmap_config_g12a,
 };
 
+static const struct amlogic_thermal_data amlogic_thermal_a9_param = {
+	.use_sm			= true,
+	.has_sysclk		= true,
+	.calibration_parameters	= &amlogic_thermal_a9,
+	.regmap_config		= &amlogic_thermal_regmap_config_g12a,
+};
+
 static const struct amlogic_thermal_data amlogic_thermal_t7_param = {
 	.use_sm			= true,
 	.calibration_parameters	= &amlogic_thermal_g12a,
@@ -291,6 +364,10 @@ static const struct of_device_id of_amlogic_thermal_match[] = {
 		.compatible = "amlogic,a1-cpu-thermal",
 		.data = &amlogic_thermal_a1_cpu_param,
 	},
+	{
+		.compatible = "amlogic,a9-thermal",
+		.data = &amlogic_thermal_a9_param,
+	},
 	{
 		.compatible = "amlogic,t7-thermal",
 		.data = &amlogic_thermal_t7_param,
@@ -305,6 +382,7 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	void __iomem *base;
 	int ret;
+	u32 reset_temp;
 
 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 	if (!pdata)
@@ -323,9 +401,24 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 	if (IS_ERR(pdata->regmap))
 		return PTR_ERR(pdata->regmap);
 
-	pdata->clk = devm_clk_get(dev, NULL);
-	if (IS_ERR(pdata->clk))
-		return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");
+	if (pdata->data->has_sysclk) {
+		pdata->clk = devm_clk_get(dev, "core");
+		if (IS_ERR(pdata->clk))
+			return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get core clk\n");
+		pdata->sysclk = devm_clk_get_enabled(dev, "pclk");
+		if (IS_ERR(pdata->sysclk))
+			return dev_err_probe(dev, PTR_ERR(pdata->sysclk), "failed to get pclk\n");
+	} else {
+		pdata->clk = devm_clk_get(dev, NULL);
+		if (IS_ERR(pdata->clk))
+			return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");
+	}
+
+	if (of_property_read_u32(pdev->dev.of_node, "amlogic,hw-reset-temp", &reset_temp)) {
+		dev_dbg(dev, "using default hardware reset temperature\n");
+		reset_temp = TSENSOR_HW_RESET_DEFAULT_TEMP;
+	}
+
 
 	if (pdata->data->use_sm)
 		ret = amlogic_thermal_probe_sm(pdev, pdata);
@@ -346,6 +439,10 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 
 	devm_thermal_add_hwmon_sysfs(&pdev->dev, pdata->tzd);
 
+	pdata->temp_code = amlogic_thermal_millicelsius_to_code(pdata, reset_temp);
+
+	amlogic_tsensor_setup_hw_reset(pdata);
+
 	ret = amlogic_thermal_enable(pdata);
 
 	return ret;
@@ -363,6 +460,8 @@ static int amlogic_thermal_suspend(struct device *dev)
 	struct amlogic_thermal *data = dev_get_drvdata(dev);
 
 	amlogic_thermal_disable(data);
+	if (data->data->has_sysclk)
+		clk_disable_unprepare(data->sysclk);
 
 	return 0;
 }
@@ -371,6 +470,9 @@ static int amlogic_thermal_resume(struct device *dev)
 {
 	struct amlogic_thermal *data = dev_get_drvdata(dev);
 
+	if (data->data->has_sysclk)
+		clk_prepare_enable(data->sysclk);
+	amlogic_tsensor_setup_hw_reset(data);
 	return amlogic_thermal_enable(data);
 }
 

-- 
2.52.0

[PATCH v2 2/2] thermal: amlogic: Add support for A9 thermal controller

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add support for the Amlogic A9 thermal controller.

The A9 thermal controller uses different calibration parameters, requires
separate core and bus clocks, and supports a hardware over-temperature
reset mechanism.

Add support for configuring the hardware reset temperature through the
'amlogic,hw-reset-temp' Device Tree property. Newer chips can specify the
hardware reset temperature through Device Tree, while older chips without
this property continue to use the default value of 110°C for backward
compatibility.

Also restore the hardware reset configuration after resume.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 drivers/thermal/amlogic_thermal.c | 108 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 105 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/amlogic_thermal.c b/drivers/thermal/amlogic_thermal.c
index a0b530624b60..96090c5e6061 100644
--- a/drivers/thermal/amlogic_thermal.c
+++ b/drivers/thermal/amlogic_thermal.c
@@ -45,6 +45,18 @@
 		 TSENSOR_CFG_REG1_DEM_EN |	\
 		 TSENSOR_CFG_REG1_CH_SEL)
 
+#define TSENSOR_CFG_REG2			0x8
+	#define TSENSOR_CFG_REG2_HITEMP_EN	BIT(31)
+	#define TSENSOR_CFG_REG2_REBOOT_EN	BIT(30)
+	#define TSENSOR_CFG_REG2_REBOOT_CODE	GENMASK(15, 4)
+	#define TSENSOR_CFG_REG2_REBOOT_TIME	GENMASK(23, 16)
+	#define TSENSOR_CFG_REG2_ENABLE		\
+		(TSENSOR_CFG_REG2_HITEMP_EN |	\
+		 TSENSOR_CFG_REG2_REBOOT_EN |	\
+		 TSENSOR_CFG_REG2_REBOOT_TIME)
+
+#define TSENSOR_TEMP_CAL		1
+
 #define TSENSOR_STAT0			0x40
 
 #define TSENSOR_STAT9			0x64
@@ -63,6 +75,7 @@
 
 #define TSENSOR_CALIB_OFFSET	1
 #define TSENSOR_CALIB_SHIFT	4
+#define TSENSOR_HW_RESET_DEFAULT_TEMP	110000
 
 /**
  * struct amlogic_thermal_soc_calib_data
@@ -93,6 +106,7 @@ struct amlogic_thermal_data {
 	const struct amlogic_thermal_soc_calib_data *calibration_parameters;
 	const struct regmap_config *regmap_config;
 	bool use_sm;
+	bool has_sysclk;
 };
 
 struct amlogic_thermal {
@@ -101,8 +115,10 @@ struct amlogic_thermal {
 	struct regmap *regmap;
 	struct regmap *sec_ao_map;
 	struct clk *clk;
+	struct clk *sysclk;
 	struct thermal_zone_device *tzd;
 	u32 trim_info;
+	u32 temp_code;
 	struct meson_sm_firmware *sm_fw;
 	u32 tsensor_id;
 };
@@ -138,6 +154,49 @@ static int amlogic_thermal_code_to_millicelsius(struct amlogic_thermal *pdata,
 	return temp;
 }
 
+/*
+ * Calculate a temperature code from a temperature value .
+ * The unit of the temperature is degree milliCelsius.
+ */
+static u32 amlogic_thermal_millicelsius_to_code(struct amlogic_thermal *pdata, int millicelsius)
+{
+	const struct amlogic_thermal_soc_calib_data *param =
+					pdata->data->calibration_parameters;
+	s64 factor, uptat, uefuse;
+	u32 temp_code;
+
+	uefuse = pdata->trim_info & TSENSOR_TRIM_SIGN_MASK ?
+			     ~(pdata->trim_info & TSENSOR_TRIM_TEMP_MASK) + 1 :
+			     (pdata->trim_info & TSENSOR_TRIM_TEMP_MASK);
+
+	factor = param->B + div_s64(millicelsius, 100);
+	factor = BIT(16) * factor;
+	factor = div_s64(factor, param->A);
+	factor = factor - uefuse;
+
+	uptat = param->n * factor;
+	uptat = div_s64(uptat, BIT(16));
+	uptat = param->m - uptat;
+
+	factor = factor * 100;
+	if (!uptat)
+		factor = TSENSOR_TEMP_MASK << 0x4;
+	else
+		factor = div_s64(factor, uptat);
+
+	temp_code = ((factor >> 0x4) & TSENSOR_TEMP_MASK) + TSENSOR_TEMP_CAL;
+
+	return temp_code;
+}
+
+static void amlogic_tsensor_setup_hw_reset(struct amlogic_thermal *data)
+{
+	regmap_update_bits(data->regmap, TSENSOR_CFG_REG2, TSENSOR_CFG_REG2_REBOOT_CODE,
+			   data->temp_code << 0x4);
+	regmap_update_bits(data->regmap, TSENSOR_CFG_REG2,
+			   TSENSOR_CFG_REG2_ENABLE, TSENSOR_CFG_REG2_ENABLE);
+}
+
 static int amlogic_thermal_enable(struct amlogic_thermal *data)
 {
 	int ret;
@@ -254,6 +313,13 @@ static const struct amlogic_thermal_soc_calib_data amlogic_thermal_g12a = {
 	.n = 324,
 };
 
+static const struct amlogic_thermal_soc_calib_data amlogic_thermal_a9 = {
+	.A = 9164,
+	.B = 2747,
+	.m = 370,
+	.n = 270,
+};
+
 static const struct amlogic_thermal_data amlogic_thermal_g12a_cpu_param = {
 	.u_efuse_off = 0x128,
 	.calibration_parameters = &amlogic_thermal_g12a,
@@ -272,6 +338,13 @@ static const struct amlogic_thermal_data amlogic_thermal_a1_cpu_param = {
 	.regmap_config = &amlogic_thermal_regmap_config_g12a,
 };
 
+static const struct amlogic_thermal_data amlogic_thermal_a9_param = {
+	.use_sm			= true,
+	.has_sysclk		= true,
+	.calibration_parameters	= &amlogic_thermal_a9,
+	.regmap_config		= &amlogic_thermal_regmap_config_g12a,
+};
+
 static const struct amlogic_thermal_data amlogic_thermal_t7_param = {
 	.use_sm			= true,
 	.calibration_parameters	= &amlogic_thermal_g12a,
@@ -291,6 +364,10 @@ static const struct of_device_id of_amlogic_thermal_match[] = {
 		.compatible = "amlogic,a1-cpu-thermal",
 		.data = &amlogic_thermal_a1_cpu_param,
 	},
+	{
+		.compatible = "amlogic,a9-thermal",
+		.data = &amlogic_thermal_a9_param,
+	},
 	{
 		.compatible = "amlogic,t7-thermal",
 		.data = &amlogic_thermal_t7_param,
@@ -305,6 +382,7 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	void __iomem *base;
 	int ret;
+	u32 reset_temp;
 
 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 	if (!pdata)
@@ -323,9 +401,24 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 	if (IS_ERR(pdata->regmap))
 		return PTR_ERR(pdata->regmap);
 
-	pdata->clk = devm_clk_get(dev, NULL);
-	if (IS_ERR(pdata->clk))
-		return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");
+	if (pdata->data->has_sysclk) {
+		pdata->clk = devm_clk_get(dev, "core");
+		if (IS_ERR(pdata->clk))
+			return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get core clk\n");
+		pdata->sysclk = devm_clk_get_enabled(dev, "pclk");
+		if (IS_ERR(pdata->sysclk))
+			return dev_err_probe(dev, PTR_ERR(pdata->sysclk), "failed to get pclk\n");
+	} else {
+		pdata->clk = devm_clk_get(dev, NULL);
+		if (IS_ERR(pdata->clk))
+			return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");
+	}
+
+	if (of_property_read_u32(pdev->dev.of_node, "amlogic,hw-reset-temp", &reset_temp)) {
+		dev_dbg(dev, "using default hardware reset temperature\n");
+		reset_temp = TSENSOR_HW_RESET_DEFAULT_TEMP;
+	}
+
 
 	if (pdata->data->use_sm)
 		ret = amlogic_thermal_probe_sm(pdev, pdata);
@@ -346,6 +439,10 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 
 	devm_thermal_add_hwmon_sysfs(&pdev->dev, pdata->tzd);
 
+	pdata->temp_code = amlogic_thermal_millicelsius_to_code(pdata, reset_temp);
+
+	amlogic_tsensor_setup_hw_reset(pdata);
+
 	ret = amlogic_thermal_enable(pdata);
 
 	return ret;
@@ -363,6 +460,8 @@ static int amlogic_thermal_suspend(struct device *dev)
 	struct amlogic_thermal *data = dev_get_drvdata(dev);
 
 	amlogic_thermal_disable(data);
+	if (data->data->has_sysclk)
+		clk_disable_unprepare(data->sysclk);
 
 	return 0;
 }
@@ -371,6 +470,9 @@ static int amlogic_thermal_resume(struct device *dev)
 {
 	struct amlogic_thermal *data = dev_get_drvdata(dev);
 
+	if (data->data->has_sysclk)
+		clk_prepare_enable(data->sysclk);
+	amlogic_tsensor_setup_hw_reset(data);
 	return amlogic_thermal_enable(data);
 }
 

-- 
2.52.0



_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

[PATCH v2 2/2] thermal: amlogic: Add support for A9 thermal controller

[Xianwei Zhao]

Add support for the Amlogic A9 thermal controller.

The A9 thermal controller uses different calibration parameters, requires
separate core and bus clocks, and supports a hardware over-temperature
reset mechanism.

Add support for configuring the hardware reset temperature through the
'amlogic,hw-reset-temp' Device Tree property. Newer chips can specify the
hardware reset temperature through Device Tree, while older chips without
this property continue to use the default value of 110°C for backward
compatibility.

Also restore the hardware reset configuration after resume.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 drivers/thermal/amlogic_thermal.c | 108 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 105 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/amlogic_thermal.c b/drivers/thermal/amlogic_thermal.c
index a0b530624b60..96090c5e6061 100644
--- a/drivers/thermal/amlogic_thermal.c
+++ b/drivers/thermal/amlogic_thermal.c
@@ -45,6 +45,18 @@
 		 TSENSOR_CFG_REG1_DEM_EN |	\
 		 TSENSOR_CFG_REG1_CH_SEL)
 
+#define TSENSOR_CFG_REG2			0x8
+	#define TSENSOR_CFG_REG2_HITEMP_EN	BIT(31)
+	#define TSENSOR_CFG_REG2_REBOOT_EN	BIT(30)
+	#define TSENSOR_CFG_REG2_REBOOT_CODE	GENMASK(15, 4)
+	#define TSENSOR_CFG_REG2_REBOOT_TIME	GENMASK(23, 16)
+	#define TSENSOR_CFG_REG2_ENABLE		\
+		(TSENSOR_CFG_REG2_HITEMP_EN |	\
+		 TSENSOR_CFG_REG2_REBOOT_EN |	\
+		 TSENSOR_CFG_REG2_REBOOT_TIME)
+
+#define TSENSOR_TEMP_CAL		1
+
 #define TSENSOR_STAT0			0x40
 
 #define TSENSOR_STAT9			0x64
@@ -63,6 +75,7 @@
 
 #define TSENSOR_CALIB_OFFSET	1
 #define TSENSOR_CALIB_SHIFT	4
+#define TSENSOR_HW_RESET_DEFAULT_TEMP	110000
 
 /**
  * struct amlogic_thermal_soc_calib_data
@@ -93,6 +106,7 @@ struct amlogic_thermal_data {
 	const struct amlogic_thermal_soc_calib_data *calibration_parameters;
 	const struct regmap_config *regmap_config;
 	bool use_sm;
+	bool has_sysclk;
 };
 
 struct amlogic_thermal {
@@ -101,8 +115,10 @@ struct amlogic_thermal {
 	struct regmap *regmap;
 	struct regmap *sec_ao_map;
 	struct clk *clk;
+	struct clk *sysclk;
 	struct thermal_zone_device *tzd;
 	u32 trim_info;
+	u32 temp_code;
 	struct meson_sm_firmware *sm_fw;
 	u32 tsensor_id;
 };
@@ -138,6 +154,49 @@ static int amlogic_thermal_code_to_millicelsius(struct amlogic_thermal *pdata,
 	return temp;
 }
 
+/*
+ * Calculate a temperature code from a temperature value .
+ * The unit of the temperature is degree milliCelsius.
+ */
+static u32 amlogic_thermal_millicelsius_to_code(struct amlogic_thermal *pdata, int millicelsius)
+{
+	const struct amlogic_thermal_soc_calib_data *param =
+					pdata->data->calibration_parameters;
+	s64 factor, uptat, uefuse;
+	u32 temp_code;
+
+	uefuse = pdata->trim_info & TSENSOR_TRIM_SIGN_MASK ?
+			     ~(pdata->trim_info & TSENSOR_TRIM_TEMP_MASK) + 1 :
+			     (pdata->trim_info & TSENSOR_TRIM_TEMP_MASK);
+
+	factor = param->B + div_s64(millicelsius, 100);
+	factor = BIT(16) * factor;
+	factor = div_s64(factor, param->A);
+	factor = factor - uefuse;
+
+	uptat = param->n * factor;
+	uptat = div_s64(uptat, BIT(16));
+	uptat = param->m - uptat;
+
+	factor = factor * 100;
+	if (!uptat)
+		factor = TSENSOR_TEMP_MASK << 0x4;
+	else
+		factor = div_s64(factor, uptat);
+
+	temp_code = ((factor >> 0x4) & TSENSOR_TEMP_MASK) + TSENSOR_TEMP_CAL;
+
+	return temp_code;
+}
+
+static void amlogic_tsensor_setup_hw_reset(struct amlogic_thermal *data)
+{
+	regmap_update_bits(data->regmap, TSENSOR_CFG_REG2, TSENSOR_CFG_REG2_REBOOT_CODE,
+			   data->temp_code << 0x4);
+	regmap_update_bits(data->regmap, TSENSOR_CFG_REG2,
+			   TSENSOR_CFG_REG2_ENABLE, TSENSOR_CFG_REG2_ENABLE);
+}
+
 static int amlogic_thermal_enable(struct amlogic_thermal *data)
 {
 	int ret;
@@ -254,6 +313,13 @@ static const struct amlogic_thermal_soc_calib_data amlogic_thermal_g12a = {
 	.n = 324,
 };
 
+static const struct amlogic_thermal_soc_calib_data amlogic_thermal_a9 = {
+	.A = 9164,
+	.B = 2747,
+	.m = 370,
+	.n = 270,
+};
+
 static const struct amlogic_thermal_data amlogic_thermal_g12a_cpu_param = {
 	.u_efuse_off = 0x128,
 	.calibration_parameters = &amlogic_thermal_g12a,
@@ -272,6 +338,13 @@ static const struct amlogic_thermal_data amlogic_thermal_a1_cpu_param = {
 	.regmap_config = &amlogic_thermal_regmap_config_g12a,
 };
 
+static const struct amlogic_thermal_data amlogic_thermal_a9_param = {
+	.use_sm			= true,
+	.has_sysclk		= true,
+	.calibration_parameters	= &amlogic_thermal_a9,
+	.regmap_config		= &amlogic_thermal_regmap_config_g12a,
+};
+
 static const struct amlogic_thermal_data amlogic_thermal_t7_param = {
 	.use_sm			= true,
 	.calibration_parameters	= &amlogic_thermal_g12a,
@@ -291,6 +364,10 @@ static const struct of_device_id of_amlogic_thermal_match[] = {
 		.compatible = "amlogic,a1-cpu-thermal",
 		.data = &amlogic_thermal_a1_cpu_param,
 	},
+	{
+		.compatible = "amlogic,a9-thermal",
+		.data = &amlogic_thermal_a9_param,
+	},
 	{
 		.compatible = "amlogic,t7-thermal",
 		.data = &amlogic_thermal_t7_param,
@@ -305,6 +382,7 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	void __iomem *base;
 	int ret;
+	u32 reset_temp;
 
 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 	if (!pdata)
@@ -323,9 +401,24 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 	if (IS_ERR(pdata->regmap))
 		return PTR_ERR(pdata->regmap);
 
-	pdata->clk = devm_clk_get(dev, NULL);
-	if (IS_ERR(pdata->clk))
-		return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");
+	if (pdata->data->has_sysclk) {
+		pdata->clk = devm_clk_get(dev, "core");
+		if (IS_ERR(pdata->clk))
+			return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get core clk\n");
+		pdata->sysclk = devm_clk_get_enabled(dev, "pclk");
+		if (IS_ERR(pdata->sysclk))
+			return dev_err_probe(dev, PTR_ERR(pdata->sysclk), "failed to get pclk\n");
+	} else {
+		pdata->clk = devm_clk_get(dev, NULL);
+		if (IS_ERR(pdata->clk))
+			return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");
+	}
+
+	if (of_property_read_u32(pdev->dev.of_node, "amlogic,hw-reset-temp", &reset_temp)) {
+		dev_dbg(dev, "using default hardware reset temperature\n");
+		reset_temp = TSENSOR_HW_RESET_DEFAULT_TEMP;
+	}
+
 
 	if (pdata->data->use_sm)
 		ret = amlogic_thermal_probe_sm(pdev, pdata);
@@ -346,6 +439,10 @@ static int amlogic_thermal_probe(struct platform_device *pdev)
 
 	devm_thermal_add_hwmon_sysfs(&pdev->dev, pdata->tzd);
 
+	pdata->temp_code = amlogic_thermal_millicelsius_to_code(pdata, reset_temp);
+
+	amlogic_tsensor_setup_hw_reset(pdata);
+
 	ret = amlogic_thermal_enable(pdata);
 
 	return ret;
@@ -363,6 +460,8 @@ static int amlogic_thermal_suspend(struct device *dev)
 	struct amlogic_thermal *data = dev_get_drvdata(dev);
 
 	amlogic_thermal_disable(data);
+	if (data->data->has_sysclk)
+		clk_disable_unprepare(data->sysclk);
 
 	return 0;
 }
@@ -371,6 +470,9 @@ static int amlogic_thermal_resume(struct device *dev)
 {
 	struct amlogic_thermal *data = dev_get_drvdata(dev);
 
+	if (data->data->has_sysclk)
+		clk_prepare_enable(data->sysclk);
+	amlogic_tsensor_setup_hw_reset(data);
 	return amlogic_thermal_enable(data);
 }
 

-- 
2.52.0

Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Krzysztof Kozlowski]

On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
> Document the thermal controller compatibles for the Amlogic A9 SoC.
> 
> Describe the required "core" and "plck" clocks, add the optional
> "amlogic,hw-reset-temp" property, and update the schema constraints for
> A9-specific thermal controllers.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> ---
>  .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> index 8cfa44dcda58..f73ee66bcc47 100644
> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> @@ -23,6 +23,7 @@ properties:
>            - const: amlogic,g12a-thermal
>        - enum:
>            - amlogic,a1-cpu-thermal
> +          - amlogic,a9-thermal
>            - amlogic,t7-thermal
>  
>    reg:
> @@ -32,7 +33,13 @@ properties:
>      maxItems: 1
>  
>    clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: core
> +      - const: pclk
>  
>    power-domains:
>      maxItems: 1
> @@ -52,6 +59,10 @@ properties:
>            - description: phandle to the secure monitor
>            - description: sensor index to get specific calibration data
>  
> +  amlogic,hw-reset-temp:
> +    description: The hardware-controlled reset temperature value.
> +    $ref: /schemas/types.yaml#/definitions/uint32

Thermal zones define that, not custom properties.

> +
>  required:
>    - compatible
>    - reg
> @@ -73,6 +84,21 @@ allOf:
>        required:
>          - amlogic,secure-monitor
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - amlogic,a9-thermal

Why is one clock valid as well for the new device?

Best regards,
Krzysztof

Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Krzysztof Kozlowski]

On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
> Document the thermal controller compatibles for the Amlogic A9 SoC.
> 
> Describe the required "core" and "plck" clocks, add the optional
> "amlogic,hw-reset-temp" property, and update the schema constraints for
> A9-specific thermal controllers.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> ---
>  .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> index 8cfa44dcda58..f73ee66bcc47 100644
> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> @@ -23,6 +23,7 @@ properties:
>            - const: amlogic,g12a-thermal
>        - enum:
>            - amlogic,a1-cpu-thermal
> +          - amlogic,a9-thermal
>            - amlogic,t7-thermal
>  
>    reg:
> @@ -32,7 +33,13 @@ properties:
>      maxItems: 1
>  
>    clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: core
> +      - const: pclk
>  
>    power-domains:
>      maxItems: 1
> @@ -52,6 +59,10 @@ properties:
>            - description: phandle to the secure monitor
>            - description: sensor index to get specific calibration data
>  
> +  amlogic,hw-reset-temp:
> +    description: The hardware-controlled reset temperature value.
> +    $ref: /schemas/types.yaml#/definitions/uint32

Thermal zones define that, not custom properties.

> +
>  required:
>    - compatible
>    - reg
> @@ -73,6 +84,21 @@ allOf:
>        required:
>          - amlogic,secure-monitor
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - amlogic,a9-thermal

Why is one clock valid as well for the new device?

Best regards,
Krzysztof


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Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao]

Hi Krzysztof,
    Thanks for your review.

On 2026/8/13 16:28, Krzysztof Kozlowski wrote:
> On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
>> Document the thermal controller compatibles for the Amlogic A9 SoC.
>>
>> Describe the required "core" and "plck" clocks, add the optional
>> "amlogic,hw-reset-temp" property, and update the schema constraints for
>> A9-specific thermal controllers.
>>
>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>> ---
>>   .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>> index 8cfa44dcda58..f73ee66bcc47 100644
>> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>> @@ -23,6 +23,7 @@ properties:
>>             - const: amlogic,g12a-thermal
>>         - enum:
>>             - amlogic,a1-cpu-thermal
>> +          - amlogic,a9-thermal
>>             - amlogic,t7-thermal
>>
>>     reg:
>> @@ -32,7 +33,13 @@ properties:
>>       maxItems: 1
>>
>>     clocks:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
>> +
>> +  clock-names:
>> +    items:
>> +      - const: core
>> +      - const: pclk
>>
>>     power-domains:
>>       maxItems: 1
>> @@ -52,6 +59,10 @@ properties:
>>             - description: phandle to the secure monitor
>>             - description: sensor index to get specific calibration data
>>
>> +  amlogic,hw-reset-temp:
>> +    description: The hardware-controlled reset temperature value.
>> +    $ref: /schemas/types.yaml#/definitions/uint32
> Thermal zones define that, not custom properties.
> 

There are some differences here. The thermal zone goes through a 
software-controlled process and eventually triggers a restart or 
shutdown. There is some time between the temperature reaching the 
threshold and the actual restart or shutdown. In contrast, this 
attribute configures a hardware-level protection mechanism that directly 
triggers a restart when the temperature reaches the configured threshold.

If that's the case, do I also get it from Thermal zones?

>> +
>>   required:
>>     - compatible
>>     - reg
>> @@ -73,6 +84,21 @@ allOf:
>>         required:
>>           - amlogic,secure-monitor
>>
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - amlogic,a9-thermal
> Why is one clock valid as well for the new device?

The new device requires two clocks. I will add restrictive conditions 
accordingly.

> 
> Best regards,
> Krzysztof

Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao]

Hi Krzysztof,
    Thanks for your review.

On 2026/8/13 16:28, Krzysztof Kozlowski wrote:
> On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
>> Document the thermal controller compatibles for the Amlogic A9 SoC.
>>
>> Describe the required "core" and "plck" clocks, add the optional
>> "amlogic,hw-reset-temp" property, and update the schema constraints for
>> A9-specific thermal controllers.
>>
>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>> ---
>>   .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>> index 8cfa44dcda58..f73ee66bcc47 100644
>> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>> @@ -23,6 +23,7 @@ properties:
>>             - const: amlogic,g12a-thermal
>>         - enum:
>>             - amlogic,a1-cpu-thermal
>> +          - amlogic,a9-thermal
>>             - amlogic,t7-thermal
>>
>>     reg:
>> @@ -32,7 +33,13 @@ properties:
>>       maxItems: 1
>>
>>     clocks:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
>> +
>> +  clock-names:
>> +    items:
>> +      - const: core
>> +      - const: pclk
>>
>>     power-domains:
>>       maxItems: 1
>> @@ -52,6 +59,10 @@ properties:
>>             - description: phandle to the secure monitor
>>             - description: sensor index to get specific calibration data
>>
>> +  amlogic,hw-reset-temp:
>> +    description: The hardware-controlled reset temperature value.
>> +    $ref: /schemas/types.yaml#/definitions/uint32
> Thermal zones define that, not custom properties.
> 

There are some differences here. The thermal zone goes through a 
software-controlled process and eventually triggers a restart or 
shutdown. There is some time between the temperature reaching the 
threshold and the actual restart or shutdown. In contrast, this 
attribute configures a hardware-level protection mechanism that directly 
triggers a restart when the temperature reaches the configured threshold.

If that's the case, do I also get it from Thermal zones?

>> +
>>   required:
>>     - compatible
>>     - reg
>> @@ -73,6 +84,21 @@ allOf:
>>         required:
>>           - amlogic,secure-monitor
>>
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - amlogic,a9-thermal
> Why is one clock valid as well for the new device?

The new device requires two clocks. I will add restrictive conditions 
accordingly.

> 
> Best regards,
> Krzysztof

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Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Krzysztof Kozlowski]

On 20/08/2026 08:38, Xianwei Zhao wrote:
> Hi Krzysztof,
>     Thanks for your review.
> 
> On 2026/8/13 16:28, Krzysztof Kozlowski wrote:
>> On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
>>> Document the thermal controller compatibles for the Amlogic A9 SoC.
>>>
>>> Describe the required "core" and "plck" clocks, add the optional
>>> "amlogic,hw-reset-temp" property, and update the schema constraints for
>>> A9-specific thermal controllers.
>>>
>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>> ---
>>>   .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>> index 8cfa44dcda58..f73ee66bcc47 100644
>>> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>> @@ -23,6 +23,7 @@ properties:
>>>             - const: amlogic,g12a-thermal
>>>         - enum:
>>>             - amlogic,a1-cpu-thermal
>>> +          - amlogic,a9-thermal
>>>             - amlogic,t7-thermal
>>>
>>>     reg:
>>> @@ -32,7 +33,13 @@ properties:
>>>       maxItems: 1
>>>
>>>     clocks:
>>> -    maxItems: 1
>>> +    minItems: 1
>>> +    maxItems: 2
>>> +
>>> +  clock-names:
>>> +    items:
>>> +      - const: core
>>> +      - const: pclk
>>>
>>>     power-domains:
>>>       maxItems: 1
>>> @@ -52,6 +59,10 @@ properties:
>>>             - description: phandle to the secure monitor
>>>             - description: sensor index to get specific calibration data
>>>
>>> +  amlogic,hw-reset-temp:
>>> +    description: The hardware-controlled reset temperature value.
>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> Thermal zones define that, not custom properties.
>>
> 
> There are some differences here. The thermal zone goes through a 
> software-controlled process and eventually triggers a restart or 
> shutdown. There is some time between the temperature reaching the 
> threshold and the actual restart or shutdown. In contrast, this 

This feels like Linux problem, not binding? Fix Linux.

> attribute configures a hardware-level protection mechanism that directly 
> triggers a restart when the temperature reaches the configured threshold.
> 
> If that's the case, do I also get it from Thermal zones?


Thermal zones define your hardware temperature constraints, not custom
properties.


Best regards,
Krzysztof

Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Krzysztof Kozlowski]

On 20/08/2026 08:38, Xianwei Zhao wrote:
> Hi Krzysztof,
>     Thanks for your review.
> 
> On 2026/8/13 16:28, Krzysztof Kozlowski wrote:
>> On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
>>> Document the thermal controller compatibles for the Amlogic A9 SoC.
>>>
>>> Describe the required "core" and "plck" clocks, add the optional
>>> "amlogic,hw-reset-temp" property, and update the schema constraints for
>>> A9-specific thermal controllers.
>>>
>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>> ---
>>>   .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>> index 8cfa44dcda58..f73ee66bcc47 100644
>>> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>> @@ -23,6 +23,7 @@ properties:
>>>             - const: amlogic,g12a-thermal
>>>         - enum:
>>>             - amlogic,a1-cpu-thermal
>>> +          - amlogic,a9-thermal
>>>             - amlogic,t7-thermal
>>>
>>>     reg:
>>> @@ -32,7 +33,13 @@ properties:
>>>       maxItems: 1
>>>
>>>     clocks:
>>> -    maxItems: 1
>>> +    minItems: 1
>>> +    maxItems: 2
>>> +
>>> +  clock-names:
>>> +    items:
>>> +      - const: core
>>> +      - const: pclk
>>>
>>>     power-domains:
>>>       maxItems: 1
>>> @@ -52,6 +59,10 @@ properties:
>>>             - description: phandle to the secure monitor
>>>             - description: sensor index to get specific calibration data
>>>
>>> +  amlogic,hw-reset-temp:
>>> +    description: The hardware-controlled reset temperature value.
>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> Thermal zones define that, not custom properties.
>>
> 
> There are some differences here. The thermal zone goes through a 
> software-controlled process and eventually triggers a restart or 
> shutdown. There is some time between the temperature reaching the 
> threshold and the actual restart or shutdown. In contrast, this 

This feels like Linux problem, not binding? Fix Linux.

> attribute configures a hardware-level protection mechanism that directly 
> triggers a restart when the temperature reaches the configured threshold.
> 
> If that's the case, do I also get it from Thermal zones?


Thermal zones define your hardware temperature constraints, not custom
properties.


Best regards,
Krzysztof

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Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao]

On 2026/8/20 14:49, Krzysztof Kozlowski wrote:
> On 20/08/2026 08:38, Xianwei Zhao wrote:
>> Hi Krzysztof,
>>      Thanks for your review.
>>
>> On 2026/8/13 16:28, Krzysztof Kozlowski wrote:
>>> On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
>>>> Document the thermal controller compatibles for the Amlogic A9 SoC.
>>>>
>>>> Describe the required "core" and "plck" clocks, add the optional
>>>> "amlogic,hw-reset-temp" property, and update the schema constraints for
>>>> A9-specific thermal controllers.
>>>>
>>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>>> ---
>>>>    .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>>>>    1 file changed, 27 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>>> index 8cfa44dcda58..f73ee66bcc47 100644
>>>> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>>> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>>> @@ -23,6 +23,7 @@ properties:
>>>>              - const: amlogic,g12a-thermal
>>>>          - enum:
>>>>              - amlogic,a1-cpu-thermal
>>>> +          - amlogic,a9-thermal
>>>>              - amlogic,t7-thermal
>>>>
>>>>      reg:
>>>> @@ -32,7 +33,13 @@ properties:
>>>>        maxItems: 1
>>>>
>>>>      clocks:
>>>> -    maxItems: 1
>>>> +    minItems: 1
>>>> +    maxItems: 2
>>>> +
>>>> +  clock-names:
>>>> +    items:
>>>> +      - const: core
>>>> +      - const: pclk
>>>>
>>>>      power-domains:
>>>>        maxItems: 1
>>>> @@ -52,6 +59,10 @@ properties:
>>>>              - description: phandle to the secure monitor
>>>>              - description: sensor index to get specific calibration data
>>>>
>>>> +  amlogic,hw-reset-temp:
>>>> +    description: The hardware-controlled reset temperature value.
>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>> Thermal zones define that, not custom properties.
>>>
>> There are some differences here. The thermal zone goes through a
>> software-controlled process and eventually triggers a restart or
>> shutdown. There is some time between the temperature reaching the
>> threshold and the actual restart or shutdown. In contrast, this
> This feels like Linux problem, not binding? Fix Linux.
> 
>> attribute configures a hardware-level protection mechanism that directly
>> triggers a restart when the temperature reaches the configured threshold.
>>
>> If that's the case, do I also get it from Thermal zones?
> 
> Thermal zones define your hardware temperature constraints, not custom
> properties.
> 

I will remove "amlogic,hw-reset-temp" property.

> 
> Best regards,
> Krzysztof

Re: [PATCH v2 1/2] dt-bindings: thermal: amlogic: Add A9 thermal bindings

[Xianwei Zhao]

On 2026/8/20 14:49, Krzysztof Kozlowski wrote:
> On 20/08/2026 08:38, Xianwei Zhao wrote:
>> Hi Krzysztof,
>>      Thanks for your review.
>>
>> On 2026/8/13 16:28, Krzysztof Kozlowski wrote:
>>> On Tue, Aug 11, 2026 at 08:37:43AM +0000, Xianwei Zhao wrote:
>>>> Document the thermal controller compatibles for the Amlogic A9 SoC.
>>>>
>>>> Describe the required "core" and "plck" clocks, add the optional
>>>> "amlogic,hw-reset-temp" property, and update the schema constraints for
>>>> A9-specific thermal controllers.
>>>>
>>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>>> ---
>>>>    .../bindings/thermal/amlogic,thermal.yaml          | 28 +++++++++++++++++++++-
>>>>    1 file changed, 27 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>>> index 8cfa44dcda58..f73ee66bcc47 100644
>>>> --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>>> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>>>> @@ -23,6 +23,7 @@ properties:
>>>>              - const: amlogic,g12a-thermal
>>>>          - enum:
>>>>              - amlogic,a1-cpu-thermal
>>>> +          - amlogic,a9-thermal
>>>>              - amlogic,t7-thermal
>>>>
>>>>      reg:
>>>> @@ -32,7 +33,13 @@ properties:
>>>>        maxItems: 1
>>>>
>>>>      clocks:
>>>> -    maxItems: 1
>>>> +    minItems: 1
>>>> +    maxItems: 2
>>>> +
>>>> +  clock-names:
>>>> +    items:
>>>> +      - const: core
>>>> +      - const: pclk
>>>>
>>>>      power-domains:
>>>>        maxItems: 1
>>>> @@ -52,6 +59,10 @@ properties:
>>>>              - description: phandle to the secure monitor
>>>>              - description: sensor index to get specific calibration data
>>>>
>>>> +  amlogic,hw-reset-temp:
>>>> +    description: The hardware-controlled reset temperature value.
>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>> Thermal zones define that, not custom properties.
>>>
>> There are some differences here. The thermal zone goes through a
>> software-controlled process and eventually triggers a restart or
>> shutdown. There is some time between the temperature reaching the
>> threshold and the actual restart or shutdown. In contrast, this
> This feels like Linux problem, not binding? Fix Linux.
> 
>> attribute configures a hardware-level protection mechanism that directly
>> triggers a restart when the temperature reaches the configured threshold.
>>
>> If that's the case, do I also get it from Thermal zones?
> 
> Thermal zones define your hardware temperature constraints, not custom
> properties.
> 

I will remove "amlogic,hw-reset-temp" property.

> 
> Best regards,
> Krzysztof

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