From: Dawid Osuchowski <dawid.osuchowski@linux.intel.com>
To: Karol Wachowski <karol.wachowski@linux.intel.com>,
dri-devel@lists.freedesktop.org
Cc: oded.gabbay@gmail.com, jeff.hugo@oss.qualcomm.com,
lizhi.hou@amd.com, andrzej.kacprowski@linux.intel.com
Subject: Re: [PATCH] accel/ivpu: Limit DMA address width to 42 bits on 40XX and later
Date: Tue, 6 Oct 2026 11:42:12 +0200 [thread overview]
Message-ID: <7f0de0ca-87d6-41c2-a19a-028bbac8650f@linux.intel.com> (raw)
In-Reply-To: <20261006093740.2304835-1-karol.wachowski@linux.intel.com>
On 2026-10-06 11:37 AM, Karol Wachowski wrote:
> On 40XX and later the NPU does not treat address bits 42 and above as
> part of the memory address, as the hardware uses them internally, but
> ivpu sets a 48-bit DMA mask for these generations.
>
> In practice the IOMMU capabilities already limit the DMA addresses to
> 42 bits, so this does not fix an observed problem. Set the DMA mask to
> 42 bits anyway, so the driver does not depend on the IOMMU
> configuration to stay within the range the NPU can address. 37XX keeps
> its 38-bit mask.
>
Reviewed-by: Dawid Osuchowski <dawid.osuchowski@linux.intel.com>
> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
> ---
> drivers/accel/ivpu/ivpu_drv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
> index ab1a9448c2cc..6b71edf566e7 100644
> --- a/drivers/accel/ivpu/ivpu_drv.c
> +++ b/drivers/accel/ivpu/ivpu_drv.c
> @@ -709,7 +709,7 @@ static int ivpu_pci_init(struct ivpu_device *vdev)
> }
>
> if (ivpu_hw_ip_gen(vdev) >= IVPU_HW_IP_40XX)
> - dma_bits = 48;
> + dma_bits = 42;
> else
> dma_bits = 38;
>
next prev parent reply other threads:[~2026-10-06 9:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-06 9:37 [PATCH] accel/ivpu: Limit DMA address width to 42 bits on 40XX and later Karol Wachowski
2026-10-06 9:42 ` Dawid Osuchowski [this message]
2026-10-08 8:20 ` Wachowski, Karol
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