From: Claudiu Beznea <claudiu.beznea@kernel.org>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
robh@kernel.org, bhelgaas@google.com, p.zabel@pengutronix.de,
geert+renesas@glider.be, magnus.damm@gmail.com,
claudiu.beznea@tuxon.dev, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH v7 07/14] PCI: rzg3s-host: Use cached MSI address in .irq_compose_msi_msg()
Date: Tue, 20 Oct 2026 12:10:58 +0300 [thread overview]
Message-ID: <7f7c4992-14b1-4cc4-ae6b-8e110be20177@kernel.org> (raw)
In-Reply-To: <CA+V-a8sQe-bb7AEagc8QzQYVVY27+aVF2v=x1SxNtXQagpSOUw@mail.gmail.com>
Hi, Prabhakar,
On 10/20/26 11:45, Lad, Prabhakar wrote:
> Hi Claudiu,
>
> Thank you for the patch.
>
> On Mon, Oct 19, 2026 at 7:57 AM Claudiu Beznea
> <claudiu.beznea@kernel.org> wrote:
>> From: Claudiu Beznea<claudiu.beznea.uj@bp.renesas.com>
>>
>> The MSI window address is already cached in msi->window_base when the
>> MSI window is configured. Use it to fill msg->address_lo and
>> msg->address_hi in .irq_compose_msi_msg() instead of reading it back
>> from the controller registers.
>>
>> This avoids unnecessary register accesses.
>>
>> Signed-off-by: Claudiu Beznea<claudiu.beznea.uj@bp.renesas.com>
>> ---
>>
>> Changes in v7:
>> - none, this patch is new
>>
>> drivers/pci/controller/pcie-rzg3s-host.c | 14 ++------------
>> 1 file changed, 2 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c
>> index b0a150262959..6acb0231a067 100644
>> --- a/drivers/pci/controller/pcie-rzg3s-host.c
>> +++ b/drivers/pci/controller/pcie-rzg3s-host.c
>> @@ -660,19 +660,9 @@ static void rzg3s_pcie_irq_compose_msi_msg(struct irq_data *data,
>> struct msi_msg *msg)
>> {
>> struct rzg3s_pcie_msi *msi = irq_data_get_irq_chip_data(data);
>> - struct rzg3s_pcie_host *host = rzg3s_msi_to_host(msi);
>> - u32 lo, hi;
>> -
>> - /*
>> - * Enable and msg data enable bits are part of the address lo. Drop
>> - * them along with the unused bit.
>> - */
>> - lo = readl_relaxed(host->axi + RZG3S_PCI_MSIRCVWADRL) &
>> - RZG3S_PCI_MSIRCVWADRL_MASK;
> We need to drop RZG3S_PCI_MSIRCVWADRL_MASK macro, as this now triggers
> the below warning:
>
> drivers/pci/controller/pcie-rzg3s-host.c:66:9: warning: macro
> ‘RZG3S_PCI_MSIRCVWADRL_MASK’ is not used [-Wunused-macros]
> 66 | #define RZG3S_PCI_MSIRCVWADRL_MASK GENMASK(31, 3)
Will update it in the next version.
Thank you for your review,
Claudiu
next prev parent reply other threads:[~2026-10-20 9:11 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-19 6:50 [PATCH v7 00/14] PCI: rzg3s-host: Add PCIe hotplug support Claudiu Beznea
2026-10-19 6:50 ` [PATCH v7 01/14] PCI: rzg3s-host: Follow hardware manual clock/reset initialization order Claudiu Beznea
2026-10-19 6:57 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 02/14] PCI: rzg3s-host: Fix runtime PM handling in the NOIRQ suspend/resume phase Claudiu Beznea
2026-10-19 6:57 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 03/14] PCI: rzg3s-host: Don't mix goto-based unwinding and cleanup helpers Claudiu Beznea
2026-10-19 6:54 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 04/14] PCI: rzg3s-host: Create the INTx IRQ domain before setting the chained handlers Claudiu Beznea
2026-10-19 6:56 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 05/14] PCI: rzg3s-host: Initialize the IRQ domains after the IRQs are masked Claudiu Beznea
2026-10-19 7:03 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 06/14] PCI: rzg3s-host: Drop read-modify-write approach for the R/W1C registers Claudiu Beznea
2026-10-19 6:54 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 07/14] PCI: rzg3s-host: Use cached MSI address in .irq_compose_msi_msg() Claudiu Beznea
2026-10-19 6:54 ` sashiko-bot
2026-10-20 8:45 ` Lad, Prabhakar
2026-10-20 9:10 ` Claudiu Beznea [this message]
2026-10-19 6:50 ` [PATCH v7 08/14] PCI: rzg3s-host: Drop nop instructions Claudiu Beznea
2026-10-19 6:55 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 09/14] PCI: rzg3s-host: Move host configuration code together Claudiu Beznea
2026-10-19 6:55 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 10/14] PCI: rzg3s-host: Move suspend/resume code into dedicated functions Claudiu Beznea
2026-10-19 6:57 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 11/14] PCI: rzg3s-host: Move IRQ domain setup code Claudiu Beznea
2026-10-19 6:55 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 12/14] PCI: rzg3s-host: Add helper to wait for link up Claudiu Beznea
2026-10-19 6:55 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 13/14] PCI: rzg3s-host: Re-enumerate the bus on PCIe link-state changes Claudiu Beznea
2026-10-19 7:30 ` sashiko-bot
2026-10-19 6:50 ` [PATCH v7 14/14] PCI: rzg3s-host: Add bridge::reset_root_port() Claudiu Beznea
2026-10-19 7:25 ` sashiko-bot
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