From: Kevin Hilman <khilman@kernel.org>
To: Abhilash Kesavan <kesavan.abhilash@gmail.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>,
Tomasz Figa <tomasz.figa@gmail.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Mike Turquette <mturquette@linaro.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Kukjin Kim <kgene@kernel.org>, Olof Johansson <olof@lixom.net>,
Doug Anderson <dianders@chromium.org>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
Tyler Baker <tyler.baker@linaro.org>,
Chanwoo Choi <cw00.choi@samsung.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend
Date: Tue, 31 Mar 2015 21:03:31 -0700 [thread overview]
Message-ID: <7h1tk47awc.fsf@deeprootsystems.com> (raw)
In-Reply-To: <CAM4voanzd-iiyTbGvZpTz4nmULJu9_VUFz3EibLB5L295K4P-Q@mail.gmail.com> (Abhilash Kesavan's message of "Wed, 1 Apr 2015 08:49:14 +0530")
Abhilash Kesavan <kesavan.abhilash@gmail.com> writes:
> On Wed, Apr 1, 2015 at 2:32 AM, Kevin Hilman <khilman@kernel.org> wrote:
>> Javier Martinez Canillas <javier.martinez@collabora.co.uk> writes:
>>
>> [...]
>>
>>> Unfortunately I don't fully understand why this clock needs to be
>>> enabled. It would be good if someone at Samsung can explain in more
>>> detail what the real problem really is.
>>
>> +1
>>
>> Maybe Abhilash can shed some light here?
>>
>> We really should know *why* this is needed because having the fix in the
>> clock driver just doesn't seem right. It seems like the DMA driver
>> should be managing this clock.
>
> I think my last mail might not have reached you (was accidentally sent
> as html).
Yeah, I saw it a bit later in Javier's reply. Thanks for doing the
research and reporting back.
> We are gating the aclk266_g2d clock without checking the
> CG_STATUS0 register bits as specified in the UM. It looks like we need
> to keep several clocks alive or gate them only after checking the
> CG_STATUSx register bits.
I dont' know much about this clock hardware, but to me it sounds like a
clock driver bug. The suspend fix Javier is proposing would fix it, but
to me it sounds like the clock driver needs to actually start checking
these CG_STATUSx bits before gating clocks.
Otherwise, we might fix this current bug but a similar one will come and
bite us another day.
Kevin
WARNING: multiple messages have this Message-ID (diff)
From: khilman@kernel.org (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend
Date: Tue, 31 Mar 2015 21:03:31 -0700 [thread overview]
Message-ID: <7h1tk47awc.fsf@deeprootsystems.com> (raw)
In-Reply-To: <CAM4voanzd-iiyTbGvZpTz4nmULJu9_VUFz3EibLB5L295K4P-Q@mail.gmail.com> (Abhilash Kesavan's message of "Wed, 1 Apr 2015 08:49:14 +0530")
Abhilash Kesavan <kesavan.abhilash@gmail.com> writes:
> On Wed, Apr 1, 2015 at 2:32 AM, Kevin Hilman <khilman@kernel.org> wrote:
>> Javier Martinez Canillas <javier.martinez@collabora.co.uk> writes:
>>
>> [...]
>>
>>> Unfortunately I don't fully understand why this clock needs to be
>>> enabled. It would be good if someone at Samsung can explain in more
>>> detail what the real problem really is.
>>
>> +1
>>
>> Maybe Abhilash can shed some light here?
>>
>> We really should know *why* this is needed because having the fix in the
>> clock driver just doesn't seem right. It seems like the DMA driver
>> should be managing this clock.
>
> I think my last mail might not have reached you (was accidentally sent
> as html).
Yeah, I saw it a bit later in Javier's reply. Thanks for doing the
research and reporting back.
> We are gating the aclk266_g2d clock without checking the
> CG_STATUS0 register bits as specified in the UM. It looks like we need
> to keep several clocks alive or gate them only after checking the
> CG_STATUSx register bits.
I dont' know much about this clock hardware, but to me it sounds like a
clock driver bug. The suspend fix Javier is proposing would fix it, but
to me it sounds like the clock driver needs to actually start checking
these CG_STATUSx bits before gating clocks.
Otherwise, we might fix this current bug but a similar one will come and
bite us another day.
Kevin
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@kernel.org>
To: Abhilash Kesavan <kesavan.abhilash@gmail.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>,
Tomasz Figa <tomasz.figa@gmail.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Mike Turquette <mturquette@linaro.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Kukjin Kim <kgene@kernel.org>, Olof Johansson <olof@lixom.net>,
Doug Anderson <dianders@chromium.org>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
Tyler Baker <tyler.baker@linaro.org>,
Chanwoo Choi <cw00.choi@samsung.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"linux-samsung-soc\@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend
Date: Tue, 31 Mar 2015 21:03:31 -0700 [thread overview]
Message-ID: <7h1tk47awc.fsf@deeprootsystems.com> (raw)
In-Reply-To: <CAM4voanzd-iiyTbGvZpTz4nmULJu9_VUFz3EibLB5L295K4P-Q@mail.gmail.com> (Abhilash Kesavan's message of "Wed, 1 Apr 2015 08:49:14 +0530")
Abhilash Kesavan <kesavan.abhilash@gmail.com> writes:
> On Wed, Apr 1, 2015 at 2:32 AM, Kevin Hilman <khilman@kernel.org> wrote:
>> Javier Martinez Canillas <javier.martinez@collabora.co.uk> writes:
>>
>> [...]
>>
>>> Unfortunately I don't fully understand why this clock needs to be
>>> enabled. It would be good if someone at Samsung can explain in more
>>> detail what the real problem really is.
>>
>> +1
>>
>> Maybe Abhilash can shed some light here?
>>
>> We really should know *why* this is needed because having the fix in the
>> clock driver just doesn't seem right. It seems like the DMA driver
>> should be managing this clock.
>
> I think my last mail might not have reached you (was accidentally sent
> as html).
Yeah, I saw it a bit later in Javier's reply. Thanks for doing the
research and reporting back.
> We are gating the aclk266_g2d clock without checking the
> CG_STATUS0 register bits as specified in the UM. It looks like we need
> to keep several clocks alive or gate them only after checking the
> CG_STATUSx register bits.
I dont' know much about this clock hardware, but to me it sounds like a
clock driver bug. The suspend fix Javier is proposing would fix it, but
to me it sounds like the clock driver needs to actually start checking
these CG_STATUSx bits before gating clocks.
Otherwise, we might fix this current bug but a similar one will come and
bite us another day.
Kevin
next prev parent reply other threads:[~2015-04-01 4:03 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-30 15:53 [RFC PATCH v3 0/2] ARM: EXYNOS: Fix Suspend-to-RAM on Exynos5420 Javier Martinez Canillas
2015-03-30 15:53 ` Javier Martinez Canillas
2015-03-30 15:53 ` [RFC PATCH v3 1/2] clk: samsung: Add a clock lookup function Javier Martinez Canillas
2015-03-30 15:53 ` Javier Martinez Canillas
2015-03-30 16:02 ` Tomasz Figa
2015-03-30 16:02 ` Tomasz Figa
2015-03-30 16:08 ` Javier Martinez Canillas
2015-03-30 16:08 ` Javier Martinez Canillas
2015-03-31 1:40 ` Michael Turquette
2015-03-31 1:40 ` Michael Turquette
2015-03-31 8:59 ` Javier Martinez Canillas
2015-03-31 8:59 ` Javier Martinez Canillas
2015-04-01 1:29 ` Michael Turquette
2015-04-01 1:29 ` Michael Turquette
2015-04-01 8:26 ` Javier Martinez Canillas
2015-04-01 8:26 ` Javier Martinez Canillas
2015-03-30 15:53 ` [RFC PATCH v3 2/2] clk: exynos5420: Make sure MDMA0 clock is enabled during suspend Javier Martinez Canillas
2015-03-30 15:53 ` Javier Martinez Canillas
2015-03-30 16:07 ` Tomasz Figa
2015-03-30 16:07 ` Tomasz Figa
2015-03-30 16:16 ` Javier Martinez Canillas
2015-03-30 16:16 ` Javier Martinez Canillas
[not found] ` <CAM4voanL3A=dS8Z-ovi_-EDi9ctyaxZkvjajp+3ZjyNAnqR1aQ@mail.gmail.com>
2015-03-31 20:00 ` Javier Martinez Canillas
2015-03-31 20:00 ` Javier Martinez Canillas
2015-04-01 11:03 ` Sylwester Nawrocki
2015-04-01 11:03 ` Sylwester Nawrocki
2015-04-01 11:44 ` Javier Martinez Canillas
2015-04-01 11:44 ` Javier Martinez Canillas
2015-04-01 17:31 ` Sylwester Nawrocki
2015-04-01 17:31 ` Sylwester Nawrocki
2015-04-01 22:31 ` Javier Martinez Canillas
2015-04-01 22:31 ` Javier Martinez Canillas
2015-04-02 12:22 ` Abhilash Kesavan
2015-04-02 12:22 ` Abhilash Kesavan
2015-04-07 10:59 ` Javier Martinez Canillas
2015-04-07 10:59 ` Javier Martinez Canillas
2015-04-07 11:56 ` Javier Martinez Canillas
2015-04-07 11:56 ` Javier Martinez Canillas
2015-04-07 12:46 ` Tomasz Figa
2015-04-07 12:46 ` Tomasz Figa
2015-04-07 14:11 ` Javier Martinez Canillas
2015-04-07 14:11 ` Javier Martinez Canillas
2015-04-07 14:38 ` Abhilash Kesavan
2015-04-07 14:38 ` Abhilash Kesavan
2015-04-07 15:00 ` Javier Martinez Canillas
2015-04-07 15:00 ` Javier Martinez Canillas
2015-04-08 1:50 ` Abhilash Kesavan
2015-04-08 1:50 ` Abhilash Kesavan
2015-04-07 18:51 ` Kevin Hilman
2015-04-07 18:51 ` Kevin Hilman
2015-04-07 18:51 ` Kevin Hilman
2015-04-07 21:28 ` Tomasz Figa
2015-04-07 21:28 ` Tomasz Figa
2015-04-08 5:36 ` Javier Martinez Canillas
2015-04-08 5:36 ` Javier Martinez Canillas
2015-04-07 14:11 ` Abhilash Kesavan
2015-04-07 14:11 ` Abhilash Kesavan
2015-04-07 14:26 ` Javier Martinez Canillas
2015-04-07 14:26 ` Javier Martinez Canillas
2015-03-31 21:02 ` Kevin Hilman
2015-03-31 21:02 ` Kevin Hilman
2015-03-31 21:02 ` Kevin Hilman
2015-04-01 3:19 ` Abhilash Kesavan
2015-04-01 3:19 ` Abhilash Kesavan
2015-04-01 4:03 ` Kevin Hilman [this message]
2015-04-01 4:03 ` Kevin Hilman
2015-04-01 4:03 ` Kevin Hilman
2015-04-01 9:16 ` Krzysztof Kozlowski
2015-04-01 9:16 ` Krzysztof Kozlowski
2015-04-01 19:02 ` Michael Turquette
2015-04-01 19:02 ` Michael Turquette
2015-04-01 19:02 ` Michael Turquette
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