All of lore.kernel.org
 help / color / mirror / Atom feed
From: khilman@baylibre.com (Kevin Hilman)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH 0/2] update the L2 cache settings on Meson8/Meson8b
Date: Wed, 06 Dec 2017 11:44:48 -0800	[thread overview]
Message-ID: <7ha7yvsksv.fsf@baylibre.com> (raw)
In-Reply-To: <20171031222316.24548-1-martin.blumenstingl@googlemail.com> (Martin Blumenstingl's message of "Tue, 31 Oct 2017 23:23:14 +0100")

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> The L2 cache settings on our mainline kernel did not match the
> configuration from Amlogic's vendor kernel.
>
> This was boot-tested on a Meson8 (actually Meson8m2, but both use
> the same CPU cores and L2 cache configuration) and a Meson8b board.

Boot tested on meson8b-odroidc1, and applied to v4.16/dt,

Thanks,

Kevin

WARNING: multiple messages have this Message-ID (diff)
From: khilman@baylibre.com (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/2] update the L2 cache settings on Meson8/Meson8b
Date: Wed, 06 Dec 2017 11:44:48 -0800	[thread overview]
Message-ID: <7ha7yvsksv.fsf@baylibre.com> (raw)
In-Reply-To: <20171031222316.24548-1-martin.blumenstingl@googlemail.com> (Martin Blumenstingl's message of "Tue, 31 Oct 2017 23:23:14 +0100")

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> The L2 cache settings on our mainline kernel did not match the
> configuration from Amlogic's vendor kernel.
>
> This was boot-tested on a Meson8 (actually Meson8m2, but both use
> the same CPU cores and L2 cache configuration) and a Meson8b board.

Boot tested on meson8b-odroidc1, and applied to v4.16/dt,

Thanks,

Kevin

  parent reply	other threads:[~2017-12-06 19:44 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-31 22:23 [PATCH 0/2] update the L2 cache settings on Meson8/Meson8b Martin Blumenstingl
2017-10-31 22:23 ` Martin Blumenstingl
2017-10-31 22:23 ` [PATCH 1/2] ARM: dts: meson8b: add more L2 cache settings Martin Blumenstingl
2017-10-31 22:23   ` Martin Blumenstingl
2017-10-31 22:23 ` [PATCH 2/2] ARM: dts: meson8: " Martin Blumenstingl
2017-10-31 22:23   ` Martin Blumenstingl
2017-12-06 19:44 ` Kevin Hilman [this message]
2017-12-06 19:44   ` [PATCH 0/2] update the L2 cache settings on Meson8/Meson8b Kevin Hilman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=7ha7yvsksv.fsf@baylibre.com \
    --to=khilman@baylibre.com \
    --cc=linus-amlogic@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.