From: khilman@kernel.org (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/3] Add code to release secondary cores from holding pen.
Date: Tue, 09 Jun 2015 08:43:28 -0700 [thread overview]
Message-ID: <7hd214sx9b.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1433856824-30689-1-git-send-email-peter.griffin@linaro.org> (Peter Griffin's message of "Tue, 9 Jun 2015 14:33:41 +0100")
Peter Griffin <peter.griffin@linaro.org> writes:
> Hi Maxime, Patrice, Srini, Kevin, Olof & Arnd,
>
> This patchset adds in the necessary code to manage the holding pen for STi
> platforms.
>
> Due to all the STi upstream devs using JTAG to boot the STi boards, there
> is currently a SMP bug when booting upstream kernels via u-boot where
> only the primary core is brought up.
>
> This hasn't been noticed until now because when booting via JTAG the
> stlinux_arm_boot script sets the PC of the secondary cores directly.
>
> With these patches applied booting via u-boot now works correctly.
>
> [ 0.045456] CPU: Testing write buffer coherency: ok
> [ 0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
> [ 0.045734] Setting up static identity map for 0x40209000 - 0x40209098
> [ 0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
> [ 0.065081] Brought up 2 CPUs
> [ 0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
> [ 0.065092] CPU: All CPU(s) started in SVC mode.
>
> Kevin / Olof / Arnd - Can you put this fix into the next ARM SoC fixes pull
> request (if there is one)?
At this stage of the cycle (we're already at -rc7) we limit things to
strictly regression fixes, and seems this has been broken for some time,
so I think this will have to wait for v4.2.
After addresing the comments, Maxime should queue this up for arm-soc so
we can get it in early in the v4.2-rc cycle.
Kevin
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
srinivas.kandagatla-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
patrice.chotard-qxv4g6HH51o@public.gmane.org,
maxime.coquelin-qxv4g6HH51o@public.gmane.org,
arnd-r2nGTMty4D4@public.gmane.org,
olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org,
lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 0/3] Add code to release secondary cores from holding pen.
Date: Tue, 09 Jun 2015 08:43:28 -0700 [thread overview]
Message-ID: <7hd214sx9b.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1433856824-30689-1-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> (Peter Griffin's message of "Tue, 9 Jun 2015 14:33:41 +0100")
Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> writes:
> Hi Maxime, Patrice, Srini, Kevin, Olof & Arnd,
>
> This patchset adds in the necessary code to manage the holding pen for STi
> platforms.
>
> Due to all the STi upstream devs using JTAG to boot the STi boards, there
> is currently a SMP bug when booting upstream kernels via u-boot where
> only the primary core is brought up.
>
> This hasn't been noticed until now because when booting via JTAG the
> stlinux_arm_boot script sets the PC of the secondary cores directly.
>
> With these patches applied booting via u-boot now works correctly.
>
> [ 0.045456] CPU: Testing write buffer coherency: ok
> [ 0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
> [ 0.045734] Setting up static identity map for 0x40209000 - 0x40209098
> [ 0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
> [ 0.065081] Brought up 2 CPUs
> [ 0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
> [ 0.065092] CPU: All CPU(s) started in SVC mode.
>
> Kevin / Olof / Arnd - Can you put this fix into the next ARM SoC fixes pull
> request (if there is one)?
At this stage of the cycle (we're already at -rc7) we limit things to
strictly regression fixes, and seems this has been broken for some time,
so I think this will have to wait for v4.2.
After addresing the comments, Maxime should queue this up for arm-soc so
we can get it in early in the v4.2-rc cycle.
Kevin
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WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@kernel.org>
To: Peter Griffin <peter.griffin@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com,
patrice.chotard@st.com, maxime.coquelin@st.com, arnd@arndb.de,
olof@lixom.net, lee.jones@linaro.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 0/3] Add code to release secondary cores from holding pen.
Date: Tue, 09 Jun 2015 08:43:28 -0700 [thread overview]
Message-ID: <7hd214sx9b.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1433856824-30689-1-git-send-email-peter.griffin@linaro.org> (Peter Griffin's message of "Tue, 9 Jun 2015 14:33:41 +0100")
Peter Griffin <peter.griffin@linaro.org> writes:
> Hi Maxime, Patrice, Srini, Kevin, Olof & Arnd,
>
> This patchset adds in the necessary code to manage the holding pen for STi
> platforms.
>
> Due to all the STi upstream devs using JTAG to boot the STi boards, there
> is currently a SMP bug when booting upstream kernels via u-boot where
> only the primary core is brought up.
>
> This hasn't been noticed until now because when booting via JTAG the
> stlinux_arm_boot script sets the PC of the secondary cores directly.
>
> With these patches applied booting via u-boot now works correctly.
>
> [ 0.045456] CPU: Testing write buffer coherency: ok
> [ 0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
> [ 0.045734] Setting up static identity map for 0x40209000 - 0x40209098
> [ 0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
> [ 0.065081] Brought up 2 CPUs
> [ 0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
> [ 0.065092] CPU: All CPU(s) started in SVC mode.
>
> Kevin / Olof / Arnd - Can you put this fix into the next ARM SoC fixes pull
> request (if there is one)?
At this stage of the cycle (we're already at -rc7) we limit things to
strictly regression fixes, and seems this has been broken for some time,
so I think this will have to wait for v4.2.
After addresing the comments, Maxime should queue this up for arm-soc so
we can get it in early in the v4.2-rc cycle.
Kevin
next prev parent reply other threads:[~2015-06-09 15:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-09 13:33 [PATCH v2 0/3] Add code to release secondary cores from holding pen Peter Griffin
2015-06-09 13:33 ` Peter Griffin
2015-06-09 13:33 ` Peter Griffin
2015-06-09 13:33 ` [PATCH v2 1/3] ARM: STi: " Peter Griffin
2015-06-09 13:33 ` Peter Griffin
2015-06-09 13:59 ` Russell King - ARM Linux
2015-06-09 13:59 ` Russell King - ARM Linux
2015-06-09 21:37 ` Peter Griffin
2015-06-09 21:37 ` Peter Griffin
2015-07-22 9:17 ` Maxime Coquelin
2015-07-22 9:17 ` Maxime Coquelin
2015-07-22 9:17 ` Maxime Coquelin
2015-06-09 13:33 ` [PATCH v2 2/3] ARM: STi: DT: STiH407: Add cpu-release-addr dt property Peter Griffin
2015-06-09 13:33 ` Peter Griffin
2015-07-22 9:11 ` Maxime Coquelin
2015-07-22 9:11 ` Maxime Coquelin
2015-07-22 9:11 ` Maxime Coquelin
2015-06-09 13:33 ` [PATCH v2 3/3] ARM: STi: DT: STiH418: " Peter Griffin
2015-06-09 13:33 ` Peter Griffin
2015-07-22 9:12 ` Maxime Coquelin
2015-07-22 9:12 ` Maxime Coquelin
2015-07-22 9:12 ` Maxime Coquelin
2015-06-09 15:43 ` Kevin Hilman [this message]
2015-06-09 15:43 ` [PATCH v2 0/3] Add code to release secondary cores from holding pen Kevin Hilman
2015-06-09 15:43 ` Kevin Hilman
2015-06-09 21:50 ` Peter Griffin
2015-06-09 21:50 ` Peter Griffin
2015-06-09 21:50 ` Peter Griffin
2015-06-10 8:03 ` Maxime Coquelin
2015-06-10 8:03 ` Maxime Coquelin
2015-06-10 8:03 ` Maxime Coquelin
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