* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: linus-amlogic This attempt will try to add new DT files to support Meson-AXG SoC. Due to the AXG series has new memory layout, we decide to start a new DT structure without sharing with previous meson-gx.dtsi 1) in the first patch, we try to document the new Meson-AXG bindings 2) in the second patch, we try to bring up a minimal serial console, so it's capable of running a minimal system (in ramdisk). Yixun Lan (2): dt-bindings: arm: amlogic: Add Meson AXG binding arm64: dts: meson-axg: add initial A113D SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 ++++++++++++++++++++++ 4 files changed, 233 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi -- 2.14.1 ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: Kevin Hilman, Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland Cc: Neil Armstrong, Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Andreas Färber, Yixun Lan This attempt will try to add new DT files to support Meson-AXG SoC. Due to the AXG series has new memory layout, we decide to start a new DT structure without sharing with previous meson-gx.dtsi 1) in the first patch, we try to document the new Meson-AXG bindings 2) in the second patch, we try to bring up a minimal serial console, so it's capable of running a minimal system (in ramdisk). Yixun Lan (2): dt-bindings: arm: amlogic: Add Meson AXG binding arm64: dts: meson-axg: add initial A113D SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 ++++++++++++++++++++++ 4 files changed, 233 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: linux-arm-kernel This attempt will try to add new DT files to support Meson-AXG SoC. Due to the AXG series has new memory layout, we decide to start a new DT structure without sharing with previous meson-gx.dtsi 1) in the first patch, we try to document the new Meson-AXG bindings 2) in the second patch, we try to bring up a minimal serial console, so it's capable of running a minimal system (in ramdisk). Yixun Lan (2): dt-bindings: arm: amlogic: Add Meson AXG binding arm64: dts: meson-axg: add initial A113D SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 ++++++++++++++++++++++ 4 files changed, 233 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi -- 2.14.1 ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding 2017-10-13 23:13 ` Yixun Lan (?) @ 2017-10-13 23:13 ` Yixun Lan -1 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: linus-amlogic Introduce new bindings for the Meson AXG SoC which now have different memory layout. Signed-off-by: Yixun Lan <dlan@gentoo.org> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index 4e4bc0bae597..89ee830bd55c 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -41,6 +41,10 @@ Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: Required root node property: compatible: "amlogic,s912", "amlogic,meson-gxm"; +Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: + Required root node property: + compatible: "amlogic,a113d", "amlogic,meson-axg"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -74,6 +78,8 @@ Board compatible values (alphabetically, grouped by SoC): - "kingnovel,r-box-pro" (Meson gxm S912) - "nexbox,a1" (Meson gxm s912) + - "amlogic,s400" (Meson axg a113d) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 2.14.1 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: Kevin Hilman, Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland Cc: Neil Armstrong, Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Andreas Färber, Yixun Lan Introduce new bindings for the Meson AXG SoC which now have different memory layout. Signed-off-by: Yixun Lan <dlan-aBrp7R+bbdUdnm+yROfE0A@public.gmane.org> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index 4e4bc0bae597..89ee830bd55c 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -41,6 +41,10 @@ Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: Required root node property: compatible: "amlogic,s912", "amlogic,meson-gxm"; +Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: + Required root node property: + compatible: "amlogic,a113d", "amlogic,meson-axg"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -74,6 +78,8 @@ Board compatible values (alphabetically, grouped by SoC): - "kingnovel,r-box-pro" (Meson gxm S912) - "nexbox,a1" (Meson gxm s912) + - "amlogic,s400" (Meson axg a113d) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: linux-arm-kernel Introduce new bindings for the Meson AXG SoC which now have different memory layout. Signed-off-by: Yixun Lan <dlan@gentoo.org> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index 4e4bc0bae597..89ee830bd55c 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -41,6 +41,10 @@ Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: Required root node property: compatible: "amlogic,s912", "amlogic,meson-gxm"; +Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: + Required root node property: + compatible: "amlogic,a113d", "amlogic,meson-axg"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -74,6 +78,8 @@ Board compatible values (alphabetically, grouped by SoC): - "kingnovel,r-box-pro" (Meson gxm S912) - "nexbox,a1" (Meson gxm s912) + - "amlogic,s400" (Meson axg a113d) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 2.14.1 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding 2017-10-13 23:13 ` Yixun Lan (?) @ 2017-10-18 1:45 ` Rob Herring -1 siblings, 0 replies; 21+ messages in thread From: Rob Herring @ 2017-10-18 1:45 UTC (permalink / raw) To: linus-amlogic On Sat, Oct 14, 2017 at 07:13:12AM +0800, Yixun Lan wrote: > Introduce new bindings for the Meson AXG SoC which now have > different memory layout. > > Signed-off-by: Yixun Lan <dlan@gentoo.org> > --- > Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ > 1 file changed, 6 insertions(+) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding @ 2017-10-18 1:45 ` Rob Herring 0 siblings, 0 replies; 21+ messages in thread From: Rob Herring @ 2017-10-18 1:45 UTC (permalink / raw) To: Yixun Lan Cc: Kevin Hilman, Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Mark Rutland, Neil Armstrong, Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Andreas Färber On Sat, Oct 14, 2017 at 07:13:12AM +0800, Yixun Lan wrote: > Introduce new bindings for the Meson AXG SoC which now have > different memory layout. > > Signed-off-by: Yixun Lan <dlan-aBrp7R+bbdUdnm+yROfE0A@public.gmane.org> > --- > Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ > 1 file changed, 6 insertions(+) Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding @ 2017-10-18 1:45 ` Rob Herring 0 siblings, 0 replies; 21+ messages in thread From: Rob Herring @ 2017-10-18 1:45 UTC (permalink / raw) To: linux-arm-kernel On Sat, Oct 14, 2017 at 07:13:12AM +0800, Yixun Lan wrote: > Introduce new bindings for the Meson AXG SoC which now have > different memory layout. > > Signed-off-by: Yixun Lan <dlan@gentoo.org> > --- > Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ > 1 file changed, 6 insertions(+) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 2/2] arm64: dts: meson-axg: add initial A113D SoC DT support 2017-10-13 23:13 ` Yixun Lan (?) @ 2017-10-13 23:13 ` Yixun Lan -1 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: linus-amlogic Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Yixun Lan <dlan@gentoo.org> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 +++++++++++++++++++++++++ 3 files changed, 227 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 7a9f48c27b1f..aedecf088272 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts new file mode 100644 index 000000000000..70eca1f8736a --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include "meson-axg.dtsi" + +/ { + compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg"; + model = "Amlogic Meson AXG S400 Development Board"; + + aliases { + serial0 = &uart_AO; + }; +}; + +&uart_AO { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi new file mode 100644 index 000000000000..003832890d2b --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,meson-axg"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 16 MiB reserved for Hardware ROM Firmware */ + hwrom_reserved: hwrom at 0 { + reg = <0x0 0x0 0x0 0x1000000>; + no-map; + }; + + /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon at 05000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus at ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + + uart_A: serial at 24000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x24000 0x0 0x14>; + interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + uart_B: serial at 23000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x23000 0x0 0x14>; + interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + }; + + gic: interrupt-controller at ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + mailbox: mailbox at ff63dc00 { + compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; + reg = <0 0xff63dc00 0 0x400>; + interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; + #mbox-cells = <1>; + }; + + sram: sram at fffc0000 { + compatible = "amlogic,meson-axg-sram", "mmio-sram"; + reg = <0x0 0xfffc0000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0xfffc0000 0x20000>; + + cpu_scp_lpri: scp-shmem at 0 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13000 0x400>; + }; + + cpu_scp_hpri: scp-shmem at 200 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13400 0x400>; + }; + }; + + aobus: aobus at ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial at 3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial at 4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + }; +}; -- 2.14.1 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/2] arm64: dts: meson-axg: add initial A113D SoC DT support @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: Kevin Hilman, Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland Cc: Neil Armstrong, Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Andreas Färber, Yixun Lan Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Yixun Lan <dlan-aBrp7R+bbdUdnm+yROfE0A@public.gmane.org> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 +++++++++++++++++++++++++ 3 files changed, 227 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 7a9f48c27b1f..aedecf088272 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts new file mode 100644 index 000000000000..70eca1f8736a --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include "meson-axg.dtsi" + +/ { + compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg"; + model = "Amlogic Meson AXG S400 Development Board"; + + aliases { + serial0 = &uart_AO; + }; +}; + +&uart_AO { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi new file mode 100644 index 000000000000..003832890d2b --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,meson-axg"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 16 MiB reserved for Hardware ROM Firmware */ + hwrom_reserved: hwrom@0 { + reg = <0x0 0x0 0x0 0x1000000>; + no-map; + }; + + /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@05000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus@ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + + uart_A: serial@24000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x24000 0x0 0x14>; + interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + uart_B: serial@23000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x23000 0x0 0x14>; + interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + }; + + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + mailbox: mailbox@ff63dc00 { + compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; + reg = <0 0xff63dc00 0 0x400>; + interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; + #mbox-cells = <1>; + }; + + sram: sram@fffc0000 { + compatible = "amlogic,meson-axg-sram", "mmio-sram"; + reg = <0x0 0xfffc0000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0xfffc0000 0x20000>; + + cpu_scp_lpri: scp-shmem@0 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13000 0x400>; + }; + + cpu_scp_hpri: scp-shmem@200 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13400 0x400>; + }; + }; + + aobus: aobus@ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial@3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial@4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + }; +}; -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/2] arm64: dts: meson-axg: add initial A113D SoC DT support @ 2017-10-13 23:13 ` Yixun Lan 0 siblings, 0 replies; 21+ messages in thread From: Yixun Lan @ 2017-10-13 23:13 UTC (permalink / raw) To: linux-arm-kernel Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Yixun Lan <dlan@gentoo.org> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 +++++++++++++++++++++++++ 3 files changed, 227 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 7a9f48c27b1f..aedecf088272 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts new file mode 100644 index 000000000000..70eca1f8736a --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +/dts-v1/; + +#include "meson-axg.dtsi" + +/ { + compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg"; + model = "Amlogic Meson AXG S400 Development Board"; + + aliases { + serial0 = &uart_AO; + }; +}; + +&uart_AO { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi new file mode 100644 index 000000000000..003832890d2b --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,meson-axg"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 16 MiB reserved for Hardware ROM Firmware */ + hwrom_reserved: hwrom at 0 { + reg = <0x0 0x0 0x0 0x1000000>; + no-map; + }; + + /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon at 05000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus at ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + + uart_A: serial at 24000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x24000 0x0 0x14>; + interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + uart_B: serial at 23000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x23000 0x0 0x14>; + interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + }; + + gic: interrupt-controller at ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + mailbox: mailbox at ff63dc00 { + compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; + reg = <0 0xff63dc00 0 0x400>; + interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; + #mbox-cells = <1>; + }; + + sram: sram at fffc0000 { + compatible = "amlogic,meson-axg-sram", "mmio-sram"; + reg = <0x0 0xfffc0000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0xfffc0000 0x20000>; + + cpu_scp_lpri: scp-shmem at 0 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13000 0x400>; + }; + + cpu_scp_hpri: scp-shmem at 200 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13400 0x400>; + }; + }; + + aobus: aobus at ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial at 3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial at 4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + }; +}; -- 2.14.1 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC 2017-10-13 23:13 ` Yixun Lan (?) @ 2017-10-14 22:32 ` Andreas Färber -1 siblings, 0 replies; 21+ messages in thread From: Andreas Färber @ 2017-10-14 22:32 UTC (permalink / raw) To: linus-amlogic Am 14.10.2017 um 01:13 schrieb Yixun Lan: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support Reviewed-by: Andreas F?rber <afaerber@suse.de> Regards, Andreas -- SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Graham Norton HRB 21284 (AG N?rnberg) ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-14 22:32 ` Andreas Färber 0 siblings, 0 replies; 21+ messages in thread From: Andreas Färber @ 2017-10-14 22:32 UTC (permalink / raw) To: Yixun Lan, Kevin Hilman, Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland Cc: Neil Armstrong, Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Am 14.10.2017 um 01:13 schrieb Yixun Lan: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support Reviewed-by: Andreas Färber <afaerber-l3A5Bk7waGM@public.gmane.org> Regards, Andreas -- SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Felix Imendörffer, Jane Smithard, Graham Norton HRB 21284 (AG Nürnberg) -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-14 22:32 ` Andreas Färber 0 siblings, 0 replies; 21+ messages in thread From: Andreas Färber @ 2017-10-14 22:32 UTC (permalink / raw) To: linux-arm-kernel Am 14.10.2017 um 01:13 schrieb Yixun Lan: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support Reviewed-by: Andreas F?rber <afaerber@suse.de> Regards, Andreas -- SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Graham Norton HRB 21284 (AG N?rnberg) ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC 2017-10-13 23:13 ` Yixun Lan (?) @ 2017-10-16 9:34 ` Neil Armstrong -1 siblings, 0 replies; 21+ messages in thread From: Neil Armstrong @ 2017-10-16 9:34 UTC (permalink / raw) To: linus-amlogic On 14/10/2017 01:13, Yixun Lan wrote: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support > > Documentation/devicetree/bindings/arm/amlogic.txt | 6 + > arch/arm64/boot/dts/amlogic/Makefile | 1 + > arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 ++++++++++++++++++++++ > 4 files changed, 233 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-16 9:34 ` Neil Armstrong 0 siblings, 0 replies; 21+ messages in thread From: Neil Armstrong @ 2017-10-16 9:34 UTC (permalink / raw) To: Yixun Lan, Kevin Hilman, Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland Cc: Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Andreas Färber On 14/10/2017 01:13, Yixun Lan wrote: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support > > Documentation/devicetree/bindings/arm/amlogic.txt | 6 + > arch/arm64/boot/dts/amlogic/Makefile | 1 + > arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 ++++++++++++++++++++++ > 4 files changed, 233 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > Reviewed-by: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-16 9:34 ` Neil Armstrong 0 siblings, 0 replies; 21+ messages in thread From: Neil Armstrong @ 2017-10-16 9:34 UTC (permalink / raw) To: linux-arm-kernel On 14/10/2017 01:13, Yixun Lan wrote: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support > > Documentation/devicetree/bindings/arm/amlogic.txt | 6 + > arch/arm64/boot/dts/amlogic/Makefile | 1 + > arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 22 +++ > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 204 ++++++++++++++++++++++ > 4 files changed, 233 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC 2017-10-13 23:13 ` Yixun Lan (?) @ 2017-10-19 10:18 ` Kevin Hilman -1 siblings, 0 replies; 21+ messages in thread From: Kevin Hilman @ 2017-10-19 10:18 UTC (permalink / raw) To: linus-amlogic Yixun Lan <dlan@gentoo.org> writes: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support Applied to v4.15/dt64 with reviews and acks. Kevin ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-19 10:18 ` Kevin Hilman 0 siblings, 0 replies; 21+ messages in thread From: Kevin Hilman @ 2017-10-19 10:18 UTC (permalink / raw) To: Yixun Lan Cc: Carlo Caione, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland, Neil Armstrong, Jerome Brunet, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Andreas Färber Yixun Lan <dlan-aBrp7R+bbdUdnm+yROfE0A@public.gmane.org> writes: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support Applied to v4.15/dt64 with reviews and acks. Kevin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/2] Introduce new DT files for Meson-AXG SoC @ 2017-10-19 10:18 ` Kevin Hilman 0 siblings, 0 replies; 21+ messages in thread From: Kevin Hilman @ 2017-10-19 10:18 UTC (permalink / raw) To: linux-arm-kernel Yixun Lan <dlan@gentoo.org> writes: > This attempt will try to add new DT files to support Meson-AXG SoC. > Due to the AXG series has new memory layout, we decide to start a new > DT structure without sharing with previous meson-gx.dtsi > > 1) in the first patch, we try to document the new Meson-AXG bindings > 2) in the second patch, we try to bring up a minimal serial console, > so it's capable of running a minimal system (in ramdisk). > > Yixun Lan (2): > dt-bindings: arm: amlogic: Add Meson AXG binding > arm64: dts: meson-axg: add initial A113D SoC DT support Applied to v4.15/dt64 with reviews and acks. Kevin ^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2017-10-19 10:18 UTC | newest] Thread overview: 21+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-10-13 23:13 [PATCH 0/2] Introduce new DT files for Meson-AXG SoC Yixun Lan 2017-10-13 23:13 ` Yixun Lan 2017-10-13 23:13 ` Yixun Lan 2017-10-13 23:13 ` [PATCH 1/2] dt-bindings: arm: amlogic: Add Meson AXG binding Yixun Lan 2017-10-13 23:13 ` Yixun Lan 2017-10-13 23:13 ` Yixun Lan 2017-10-18 1:45 ` Rob Herring 2017-10-18 1:45 ` Rob Herring 2017-10-18 1:45 ` Rob Herring 2017-10-13 23:13 ` [PATCH 2/2] arm64: dts: meson-axg: add initial A113D SoC DT support Yixun Lan 2017-10-13 23:13 ` Yixun Lan 2017-10-13 23:13 ` Yixun Lan 2017-10-14 22:32 ` [PATCH 0/2] Introduce new DT files for Meson-AXG SoC Andreas Färber 2017-10-14 22:32 ` Andreas Färber 2017-10-14 22:32 ` Andreas Färber 2017-10-16 9:34 ` Neil Armstrong 2017-10-16 9:34 ` Neil Armstrong 2017-10-16 9:34 ` Neil Armstrong 2017-10-19 10:18 ` Kevin Hilman 2017-10-19 10:18 ` Kevin Hilman 2017-10-19 10:18 ` Kevin Hilman
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