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From: Kevin Hilman <khilman@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>, jbrunet@baylibre.com
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	martin.blumenstingl@googlemail.com, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC/RFT v2 12/14] arm64: dts: meson-g12a: enable DVFS on G12A boards
Date: Fri, 28 Jun 2019 11:08:22 -0700	[thread overview]
Message-ID: <7himspr3ah.fsf@baylibre.com> (raw)
In-Reply-To: <20190626090632.7540-13-narmstrong@baylibre.com>

Neil Armstrong <narmstrong@baylibre.com> writes:

> Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board
> by setting the clock, OPP and supply for each CPU cores.
>
> The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM
> output clocked at 800KHz with an inverse duty-cycle.
>
> DVFS has been tested by running the arm64 cpuburn at [1] and cycling
> between all the possible cpufreq translations and checking the final
> frequency using the clock-measurer, script at [2].
>
> [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
> [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

[...]

> @@ -297,6 +316,34 @@
>  	status = "okay";
>  };
>  
> +&cpu0 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu1 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu2 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu3 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};

Just curious where this max clock transtion (clock-latency) value came
from.  Were you able to measure that somehow?

Kevin

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>, jbrunet@baylibre.com
Cc: linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, martin.blumenstingl@googlemail.com,
	linux-gpio@vger.kernel.org,
	Neil Armstrong <narmstrong@baylibre.com>
Subject: Re: [RFC/RFT v2 12/14] arm64: dts: meson-g12a: enable DVFS on G12A boards
Date: Fri, 28 Jun 2019 11:08:22 -0700	[thread overview]
Message-ID: <7himspr3ah.fsf@baylibre.com> (raw)
In-Reply-To: <20190626090632.7540-13-narmstrong@baylibre.com>

Neil Armstrong <narmstrong@baylibre.com> writes:

> Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board
> by setting the clock, OPP and supply for each CPU cores.
>
> The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM
> output clocked at 800KHz with an inverse duty-cycle.
>
> DVFS has been tested by running the arm64 cpuburn at [1] and cycling
> between all the possible cpufreq translations and checking the final
> frequency using the clock-measurer, script at [2].
>
> [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
> [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

[...]

> @@ -297,6 +316,34 @@
>  	status = "okay";
>  };
>  
> +&cpu0 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu1 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu2 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu3 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};

Just curious where this max clock transtion (clock-latency) value came
from.  Were you able to measure that somehow?

Kevin

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>, jbrunet@baylibre.com
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	martin.blumenstingl@googlemail.com, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC/RFT v2 12/14] arm64: dts: meson-g12a: enable DVFS on G12A boards
Date: Fri, 28 Jun 2019 11:08:22 -0700	[thread overview]
Message-ID: <7himspr3ah.fsf@baylibre.com> (raw)
In-Reply-To: <20190626090632.7540-13-narmstrong@baylibre.com>

Neil Armstrong <narmstrong@baylibre.com> writes:

> Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board
> by setting the clock, OPP and supply for each CPU cores.
>
> The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM
> output clocked at 800KHz with an inverse duty-cycle.
>
> DVFS has been tested by running the arm64 cpuburn at [1] and cycling
> between all the possible cpufreq translations and checking the final
> frequency using the clock-measurer, script at [2].
>
> [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
> [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

[...]

> @@ -297,6 +316,34 @@
>  	status = "okay";
>  };
>  
> +&cpu0 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu1 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu2 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};
> +
> +&cpu3 {
> +	cpu-supply = <&vddcpu>;
> +	operating-points-v2 = <&cpu_opp_table>;
> +	clocks = <&clkc CLKID_CPU_CLK>;
> +	clock-latency = <50000>;
> +};

Just curious where this max clock transtion (clock-latency) value came
from.  Were you able to measure that somehow?

Kevin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-06-28 18:08 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-26  9:06 [RFC/RFT v2 00/14] arm64: g12a: add support for DVFS Neil Armstrong
2019-06-26  9:06 ` Neil Armstrong
2019-06-26  9:06 ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 01/14] pinctrl: meson-g12a: add pwm_a on GPIOE_2 pinmux Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-28 17:59   ` Kevin Hilman
2019-06-28 17:59     ` Kevin Hilman
2019-06-28 17:59     ` Kevin Hilman
2019-06-26  9:06 ` [RFC/RFT v2 02/14] clk: core: introduce clk_hw_set_parent() Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 03/14] clk: meson: regmap: export regmap_div ops functions Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 04/14] clk: meson: eeclk: add setup callback Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 05/14] soc: amlogic: meson-clk-measure: protect measure with a mutex Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-28 17:57   ` Kevin Hilman
2019-06-28 17:57     ` Kevin Hilman
2019-06-28 17:57     ` Kevin Hilman
2019-06-26  9:06 ` [RFC/RFT v2 06/14] soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-28 17:58   ` Kevin Hilman
2019-06-28 17:58     ` Kevin Hilman
2019-06-28 17:58     ` Kevin Hilman
2019-06-26  9:06 ` [RFC/RFT v2 07/14] clk: meson: g12a: add notifiers to handle cpu clock change Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 08/14] clk: meson: g12a: expose CPUB clock ID for G12B Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 09/14] arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsi Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 10/14] arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmux Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 11/14] arm64: dts: meson-g12a: add cpus OPP table Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 12/14] arm64: dts: meson-g12a: enable DVFS on G12A boards Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-28 18:08   ` Kevin Hilman [this message]
2019-06-28 18:08     ` Kevin Hilman
2019-06-28 18:08     ` Kevin Hilman
2019-07-01  9:07     ` Neil Armstrong
2019-07-01  9:07       ` Neil Armstrong
2019-07-01  9:07       ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 13/14] arm64: dts: meson-g12b: add cpus OPP tables Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06 ` [RFC/RFT v2 14/14] arm64: dts: meson-g12b-odroid-n2: enable DVFS Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-26  9:06   ` Neil Armstrong
2019-06-28 18:13 ` [RFC/RFT v2 00/14] arm64: g12a: add support for DVFS Kevin Hilman
2019-06-28 18:13   ` Kevin Hilman
2019-06-28 18:13   ` Kevin Hilman

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