* [PATCH v3 0/3] ARM64: dts: meson-axg: add AO clock driver @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linus-amlogic These patches try to add AO clock driver for the Amlogic's AXG SoC, while adding this driver, we found the pclk for uart AO controller was wrong, so fix it here. Note, this patch actually depend on AO clock driver[2] Please take these patches untill AO clock driver is merged. changes since v2 at [1]: - previous the DTS patches sit in two seperate series, merge them into one patch set. changes since v1 at [0]: - [0] https://lkml.kernel.org/r/20180209070026.193879-1-yixun.lan at amlogic.com [1] https://lkml.kernel.org/r/20180323143816.200573-1-yixun.lan at amlogic.com https://lkml.kernel.org/r/20180326081809.49493-4-yixun.lan at amlogic.com [2] https://lkml.kernel.org/r/20180328025050.221585-1-yixun.lan at amlogic.com Qiufang Dai (1): arm64: dts: meson-axg: add AO clock driver DT info Yixun Lan (2): ARM64: dts: meson-axg: add an 32K alt aoclk ARM64: dts: meson: fix clock source of the pclk for UART_AO arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 23 +++++++++++++++++++++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 25 insertions(+), 6 deletions(-) -- 2.15.1 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/3] ARM64: dts: meson-axg: add AO clock driver @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Yixun Lan, Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree These patches try to add AO clock driver for the Amlogic's AXG SoC, while adding this driver, we found the pclk for uart AO controller was wrong, so fix it here. Note, this patch actually depend on AO clock driver[2] Please take these patches untill AO clock driver is merged. changes since v2 at [1]: - previous the DTS patches sit in two seperate series, merge them into one patch set. changes since v1 at [0]: - [0] https://lkml.kernel.org/r/20180209070026.193879-1-yixun.lan@amlogic.com [1] https://lkml.kernel.org/r/20180323143816.200573-1-yixun.lan@amlogic.com https://lkml.kernel.org/r/20180326081809.49493-4-yixun.lan@amlogic.com [2] https://lkml.kernel.org/r/20180328025050.221585-1-yixun.lan@amlogic.com Qiufang Dai (1): arm64: dts: meson-axg: add AO clock driver DT info Yixun Lan (2): ARM64: dts: meson-axg: add an 32K alt aoclk ARM64: dts: meson: fix clock source of the pclk for UART_AO arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 23 +++++++++++++++++++++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 25 insertions(+), 6 deletions(-) -- 2.15.1 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/3] ARM64: dts: meson-axg: add AO clock driver @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Yixun Lan, Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree These patches try to add AO clock driver for the Amlogic's AXG SoC, while adding this driver, we found the pclk for uart AO controller was wrong, so fix it here. Note, this patch actually depend on AO clock driver[2] Please take these patches untill AO clock driver is merged. changes since v2 at [1]: - previous the DTS patches sit in two seperate series, merge them into one patch set. changes since v1 at [0]: - [0] https://lkml.kernel.org/r/20180209070026.193879-1-yixun.lan@amlogic.com [1] https://lkml.kernel.org/r/20180323143816.200573-1-yixun.lan@amlogic.com https://lkml.kernel.org/r/20180326081809.49493-4-yixun.lan@amlogic.com [2] https://lkml.kernel.org/r/20180328025050.221585-1-yixun.lan@amlogic.com Qiufang Dai (1): arm64: dts: meson-axg: add AO clock driver DT info Yixun Lan (2): ARM64: dts: meson-axg: add an 32K alt aoclk ARM64: dts: meson: fix clock source of the pclk for UART_AO arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 23 +++++++++++++++++++++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 25 insertions(+), 6 deletions(-) -- 2.15.1 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/3] ARM64: dts: meson-axg: add AO clock driver @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linux-arm-kernel These patches try to add AO clock driver for the Amlogic's AXG SoC, while adding this driver, we found the pclk for uart AO controller was wrong, so fix it here. Note, this patch actually depend on AO clock driver[2] Please take these patches untill AO clock driver is merged. changes since v2 at [1]: - previous the DTS patches sit in two seperate series, merge them into one patch set. changes since v1 at [0]: - [0] https://lkml.kernel.org/r/20180209070026.193879-1-yixun.lan at amlogic.com [1] https://lkml.kernel.org/r/20180323143816.200573-1-yixun.lan at amlogic.com https://lkml.kernel.org/r/20180326081809.49493-4-yixun.lan at amlogic.com [2] https://lkml.kernel.org/r/20180328025050.221585-1-yixun.lan at amlogic.com Qiufang Dai (1): arm64: dts: meson-axg: add AO clock driver DT info Yixun Lan (2): ARM64: dts: meson-axg: add an 32K alt aoclk ARM64: dts: meson: fix clock source of the pclk for UART_AO arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 23 +++++++++++++++++++++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 25 insertions(+), 6 deletions(-) -- 2.15.1 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info 2018-03-28 3:01 ` Yixun Lan (?) (?) @ 2018-03-28 3:01 ` Yixun Lan -1 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linus-amlogic From: Qiufang Dai <qiufang.dai@amlogic.com> This add the AO (Always-On part) clock DT info for Meson-AXG SoC Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b58808eb3cc8..b0eff7d7f771 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/axg-clkc.h> +#include <dt-bindings/clock/axg-aoclkc.h> / { compatible = "amlogic,meson-axg"; @@ -688,6 +689,17 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + sysctrl_AO: sys-ctrl at 0 { + compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd"; + reg = <0x0 0x0 0x0 0x100>; + + clkc_AO: clock-controller { + compatible = "amlogic,meson-axg-aoclkc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + pinctrl_aobus: pinctrl at 14 { compatible = "amlogic,meson-axg-aobus-pinctrl"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Qiufang Dai, Yixun Lan, Carlo Caione, Rob Herring, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree From: Qiufang Dai <qiufang.dai@amlogic.com> This add the AO (Always-On part) clock DT info for Meson-AXG SoC Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b58808eb3cc8..b0eff7d7f771 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/axg-clkc.h> +#include <dt-bindings/clock/axg-aoclkc.h> / { compatible = "amlogic,meson-axg"; @@ -688,6 +689,17 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + sysctrl_AO: sys-ctrl@0 { + compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd"; + reg = <0x0 0x0 0x0 0x100>; + + clkc_AO: clock-controller { + compatible = "amlogic,meson-axg-aoclkc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + pinctrl_aobus: pinctrl@14 { compatible = "amlogic,meson-axg-aobus-pinctrl"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Qiufang Dai, Yixun Lan, Carlo Caione, Rob Herring, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree From: Qiufang Dai <qiufang.dai@amlogic.com> This add the AO (Always-On part) clock DT info for Meson-AXG SoC Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b58808eb3cc8..b0eff7d7f771 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/axg-clkc.h> +#include <dt-bindings/clock/axg-aoclkc.h> / { compatible = "amlogic,meson-axg"; @@ -688,6 +689,17 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + sysctrl_AO: sys-ctrl@0 { + compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd"; + reg = <0x0 0x0 0x0 0x100>; + + clkc_AO: clock-controller { + compatible = "amlogic,meson-axg-aoclkc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + pinctrl_aobus: pinctrl@14 { compatible = "amlogic,meson-axg-aobus-pinctrl"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linux-arm-kernel From: Qiufang Dai <qiufang.dai@amlogic.com> This add the AO (Always-On part) clock DT info for Meson-AXG SoC Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b58808eb3cc8..b0eff7d7f771 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/axg-clkc.h> +#include <dt-bindings/clock/axg-aoclkc.h> / { compatible = "amlogic,meson-axg"; @@ -688,6 +689,17 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + sysctrl_AO: sys-ctrl at 0 { + compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd"; + reg = <0x0 0x0 0x0 0x100>; + + clkc_AO: clock-controller { + compatible = "amlogic,meson-axg-aoclkc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + pinctrl_aobus: pinctrl at 14 { compatible = "amlogic,meson-axg-aobus-pinctrl"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info 2018-03-28 3:01 ` Yixun Lan (?) (?) @ 2018-03-29 8:59 ` kbuild test robot -1 siblings, 0 replies; 24+ messages in thread From: kbuild test robot @ 2018-03-29 8:59 UTC (permalink / raw) To: linus-amlogic Hi Qiufang, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v4.16-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Yixun-Lan/ARM64-dts-meson-axg-add-AO-clock-driver/20180329-134803 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm64-defconfig (attached as .config) compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm64 All errors (new ones prefixed by >>): In file included from arch/arm64/boot/dts/amlogic/meson-axg-s400.dts:9:0: >> arch/arm64/boot/dts/amlogic/meson-axg.dtsi:11:10: fatal error: dt-bindings/clock/axg-aoclkc.h: No such file or directory #include <dt-bindings/clock/axg-aoclkc.h> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +11 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > 11 #include <dt-bindings/clock/axg-aoclkc.h> 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation -------------- next part -------------- A non-text attachment was scrubbed... Name: .config.gz Type: application/gzip Size: 37934 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-amlogic/attachments/20180329/321d2e53/attachment.gz> ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info @ 2018-03-29 8:59 ` kbuild test robot 0 siblings, 0 replies; 24+ messages in thread From: kbuild test robot @ 2018-03-29 8:59 UTC (permalink / raw) To: Yixun Lan Cc: kbuild-all, Kevin Hilman, Qiufang Dai, Yixun Lan, Carlo Caione, Rob Herring, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree [-- Attachment #1: Type: text/plain, Size: 1409 bytes --] Hi Qiufang, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v4.16-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Yixun-Lan/ARM64-dts-meson-axg-add-AO-clock-driver/20180329-134803 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm64-defconfig (attached as .config) compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm64 All errors (new ones prefixed by >>): In file included from arch/arm64/boot/dts/amlogic/meson-axg-s400.dts:9:0: >> arch/arm64/boot/dts/amlogic/meson-axg.dtsi:11:10: fatal error: dt-bindings/clock/axg-aoclkc.h: No such file or directory #include <dt-bindings/clock/axg-aoclkc.h> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +11 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > 11 #include <dt-bindings/clock/axg-aoclkc.h> 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 37934 bytes --] ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info @ 2018-03-29 8:59 ` kbuild test robot 0 siblings, 0 replies; 24+ messages in thread From: kbuild test robot @ 2018-03-29 8:59 UTC (permalink / raw) Cc: kbuild-all, Kevin Hilman, Qiufang Dai, Yixun Lan, Carlo Caione, Rob Herring, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree [-- Attachment #1: Type: text/plain, Size: 1409 bytes --] Hi Qiufang, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v4.16-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Yixun-Lan/ARM64-dts-meson-axg-add-AO-clock-driver/20180329-134803 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm64-defconfig (attached as .config) compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm64 All errors (new ones prefixed by >>): In file included from arch/arm64/boot/dts/amlogic/meson-axg-s400.dts:9:0: >> arch/arm64/boot/dts/amlogic/meson-axg.dtsi:11:10: fatal error: dt-bindings/clock/axg-aoclkc.h: No such file or directory #include <dt-bindings/clock/axg-aoclkc.h> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +11 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > 11 #include <dt-bindings/clock/axg-aoclkc.h> 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 37934 bytes --] ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info @ 2018-03-29 8:59 ` kbuild test robot 0 siblings, 0 replies; 24+ messages in thread From: kbuild test robot @ 2018-03-29 8:59 UTC (permalink / raw) To: linux-arm-kernel Hi Qiufang, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v4.16-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Yixun-Lan/ARM64-dts-meson-axg-add-AO-clock-driver/20180329-134803 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm64-defconfig (attached as .config) compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm64 All errors (new ones prefixed by >>): In file included from arch/arm64/boot/dts/amlogic/meson-axg-s400.dts:9:0: >> arch/arm64/boot/dts/amlogic/meson-axg.dtsi:11:10: fatal error: dt-bindings/clock/axg-aoclkc.h: No such file or directory #include <dt-bindings/clock/axg-aoclkc.h> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +11 arch/arm64/boot/dts/amlogic/meson-axg.dtsi > 11 #include <dt-bindings/clock/axg-aoclkc.h> 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation -------------- next part -------------- A non-text attachment was scrubbed... Name: .config.gz Type: application/gzip Size: 37934 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20180329/321d2e53/attachment-0001.gz> ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk 2018-03-28 3:01 ` Yixun Lan (?) (?) @ 2018-03-28 3:01 ` Yixun Lan -1 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linus-amlogic The ao_clk81 in AO domain have two clock source, one from a 32K alt crystal we name it as ao_alt_clk, another is the clk81 signal from EE domain. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b0eff7d7f771..40ca49fb94a6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -108,6 +108,13 @@ #clock-cells = <0>; }; + ao_alt_xtal: ao_alt_xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "ao_alt_xtal"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Yixun Lan, Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree The ao_clk81 in AO domain have two clock source, one from a 32K alt crystal we name it as ao_alt_clk, another is the clk81 signal from EE domain. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b0eff7d7f771..40ca49fb94a6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -108,6 +108,13 @@ #clock-cells = <0>; }; + ao_alt_xtal: ao_alt_xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "ao_alt_xtal"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Yixun Lan, Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree The ao_clk81 in AO domain have two clock source, one from a 32K alt crystal we name it as ao_alt_clk, another is the clk81 signal from EE domain. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b0eff7d7f771..40ca49fb94a6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -108,6 +108,13 @@ #clock-cells = <0>; }; + ao_alt_xtal: ao_alt_xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "ao_alt_xtal"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linux-arm-kernel The ao_clk81 in AO domain have two clock source, one from a 32K alt crystal we name it as ao_alt_clk, another is the clk81 signal from EE domain. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b0eff7d7f771..40ca49fb94a6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -108,6 +108,13 @@ #clock-cells = <0>; }; + ao_alt_xtal: ao_alt_xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "ao_alt_xtal"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk 2018-03-28 3:01 ` Yixun Lan (?) (?) @ 2018-04-27 19:03 ` Kevin Hilman -1 siblings, 0 replies; 24+ messages in thread From: Kevin Hilman @ 2018-04-27 19:03 UTC (permalink / raw) To: linus-amlogic Yixun Lan <yixun.lan@amlogic.com> writes: > The ao_clk81 in AO domain have two clock source, > one from a 32K alt crystal we name it as ao_alt_clk, > another is the clk81 signal from EE domain. > > Acked-by: Jerome Brunet <jbrunet@baylibre.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> As this one is a stanadlone, I've applied it to v4.18/dt64, Thanks, Kevin > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index b0eff7d7f771..40ca49fb94a6 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -108,6 +108,13 @@ > #clock-cells = <0>; > }; > > + ao_alt_xtal: ao_alt_xtal-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000000>; > + clock-output-names = "ao_alt_xtal"; > + #clock-cells = <0>; > + }; > + > soc { > compatible = "simple-bus"; > #address-cells = <2>; ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk @ 2018-04-27 19:03 ` Kevin Hilman 0 siblings, 0 replies; 24+ messages in thread From: Kevin Hilman @ 2018-04-27 19:03 UTC (permalink / raw) To: Yixun Lan Cc: Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree Yixun Lan <yixun.lan@amlogic.com> writes: > The ao_clk81 in AO domain have two clock source, > one from a 32K alt crystal we name it as ao_alt_clk, > another is the clk81 signal from EE domain. > > Acked-by: Jerome Brunet <jbrunet@baylibre.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> As this one is a stanadlone, I've applied it to v4.18/dt64, Thanks, Kevin > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index b0eff7d7f771..40ca49fb94a6 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -108,6 +108,13 @@ > #clock-cells = <0>; > }; > > + ao_alt_xtal: ao_alt_xtal-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000000>; > + clock-output-names = "ao_alt_xtal"; > + #clock-cells = <0>; > + }; > + > soc { > compatible = "simple-bus"; > #address-cells = <2>; ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk @ 2018-04-27 19:03 ` Kevin Hilman 0 siblings, 0 replies; 24+ messages in thread From: Kevin Hilman @ 2018-04-27 19:03 UTC (permalink / raw) To: Yixun Lan Cc: Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree Yixun Lan <yixun.lan@amlogic.com> writes: > The ao_clk81 in AO domain have two clock source, > one from a 32K alt crystal we name it as ao_alt_clk, > another is the clk81 signal from EE domain. > > Acked-by: Jerome Brunet <jbrunet@baylibre.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> As this one is a stanadlone, I've applied it to v4.18/dt64, Thanks, Kevin > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index b0eff7d7f771..40ca49fb94a6 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -108,6 +108,13 @@ > #clock-cells = <0>; > }; > > + ao_alt_xtal: ao_alt_xtal-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000000>; > + clock-output-names = "ao_alt_xtal"; > + #clock-cells = <0>; > + }; > + > soc { > compatible = "simple-bus"; > #address-cells = <2>; ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk @ 2018-04-27 19:03 ` Kevin Hilman 0 siblings, 0 replies; 24+ messages in thread From: Kevin Hilman @ 2018-04-27 19:03 UTC (permalink / raw) To: linux-arm-kernel Yixun Lan <yixun.lan@amlogic.com> writes: > The ao_clk81 in AO domain have two clock source, > one from a 32K alt crystal we name it as ao_alt_clk, > another is the clk81 signal from EE domain. > > Acked-by: Jerome Brunet <jbrunet@baylibre.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> As this one is a stanadlone, I've applied it to v4.18/dt64, Thanks, Kevin > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index b0eff7d7f771..40ca49fb94a6 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -108,6 +108,13 @@ > #clock-cells = <0>; > }; > > + ao_alt_xtal: ao_alt_xtal-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000000>; > + clock-output-names = "ao_alt_xtal"; > + #clock-cells = <0>; > + }; > + > soc { > compatible = "simple-bus"; > #address-cells = <2>; ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO 2018-03-28 3:01 ` Yixun Lan (?) (?) @ 2018-03-28 3:01 ` Yixun Lan -1 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linus-amlogic >From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 40ca49fb94a6..dc6ca0895f11 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -798,7 +798,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; @@ -807,7 +807,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x4000 0x0 0x18>; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 562c26a0ba33..ea6898f62044 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -749,12 +749,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index e1a39cbed8c9..472106ce9a75 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -697,12 +697,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Yixun Lan, Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree >From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 40ca49fb94a6..dc6ca0895f11 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -798,7 +798,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; @@ -807,7 +807,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x4000 0x0 0x18>; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 562c26a0ba33..ea6898f62044 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -749,12 +749,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index e1a39cbed8c9..472106ce9a75 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -697,12 +697,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: Kevin Hilman Cc: Yixun Lan, Carlo Caione, Rob Herring, Qiufang Dai, linux-amlogic, linux-arm-kernel, linux-kernel, devicetree >From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 40ca49fb94a6..dc6ca0895f11 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -798,7 +798,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; @@ -807,7 +807,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x4000 0x0 0x18>; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 562c26a0ba33..ea6898f62044 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -749,12 +749,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index e1a39cbed8c9..472106ce9a75 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -697,12 +697,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO @ 2018-03-28 3:01 ` Yixun Lan 0 siblings, 0 replies; 24+ messages in thread From: Yixun Lan @ 2018-03-28 3:01 UTC (permalink / raw) To: linux-arm-kernel >From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 40ca49fb94a6..dc6ca0895f11 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -798,7 +798,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; @@ -807,7 +807,7 @@ compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x4000 0x0 0x18>; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 562c26a0ba33..ea6898f62044 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -749,12 +749,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index e1a39cbed8c9..472106ce9a75 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -697,12 +697,12 @@ }; &uart_AO { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; &uart_AO_B { - clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>; + clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; -- 2.15.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
end of thread, other threads:[~2018-04-27 19:03 UTC | newest] Thread overview: 24+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-03-28 3:01 [PATCH v3 0/3] ARM64: dts: meson-axg: add AO clock driver Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-29 8:59 ` kbuild test robot 2018-03-29 8:59 ` kbuild test robot 2018-03-29 8:59 ` kbuild test robot 2018-03-29 8:59 ` kbuild test robot 2018-03-28 3:01 ` [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-04-27 19:03 ` Kevin Hilman 2018-04-27 19:03 ` Kevin Hilman 2018-04-27 19:03 ` Kevin Hilman 2018-04-27 19:03 ` Kevin Hilman 2018-03-28 3:01 ` [PATCH v3 3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan 2018-03-28 3:01 ` Yixun Lan
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.