From: Kevin Hilman <khilman@baylibre.com>
To: Jerome Brunet <jbrunet@baylibre.com>
Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH] arm64: dts: meson: sm1: set gpio interrupt controller compatible
Date: Thu, 05 Sep 2019 13:40:09 -0700 [thread overview]
Message-ID: <7hpnkeqxxy.fsf@baylibre.com> (raw)
In-Reply-To: <20190902160334.14321-1-jbrunet@baylibre.com>
Jerome Brunet <jbrunet@baylibre.com> writes:
> Set the appropriate gpio interrupt controller compatible for the
> sm1 SoC family. This newer version of the controller can now
> trig irq on both edge of the input signal
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Queued.
I may do a late round for the dev cycle of v5.4, otherwise this will go
for v5.5. If it goes for v5.5, it should probably have a Fixes tag, no?
Kevin
> ---
> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> index 521573f3a5ba..6152e928aef2 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> @@ -134,6 +134,11 @@
> power-domains = <&pwrc PWRC_SM1_ETH_ID>;
> };
>
> +&gpio_intc {
> + compatible = "amlogic,meson-sm1-gpio-intc",
> + "amlogic,meson-gpio-intc";
> +};
> +
> &pwrc {
> compatible = "amlogic,meson-sm1-pwrc";
> };
> --
> 2.21.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: meson: sm1: set gpio interrupt controller compatible
Date: Thu, 05 Sep 2019 13:40:09 -0700 [thread overview]
Message-ID: <7hpnkeqxxy.fsf@baylibre.com> (raw)
In-Reply-To: <20190902160334.14321-1-jbrunet@baylibre.com>
Jerome Brunet <jbrunet@baylibre.com> writes:
> Set the appropriate gpio interrupt controller compatible for the
> sm1 SoC family. This newer version of the controller can now
> trig irq on both edge of the input signal
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Queued.
I may do a late round for the dev cycle of v5.4, otherwise this will go
for v5.5. If it goes for v5.5, it should probably have a Fixes tag, no?
Kevin
> ---
> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> index 521573f3a5ba..6152e928aef2 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> @@ -134,6 +134,11 @@
> power-domains = <&pwrc PWRC_SM1_ETH_ID>;
> };
>
> +&gpio_intc {
> + compatible = "amlogic,meson-sm1-gpio-intc",
> + "amlogic,meson-gpio-intc";
> +};
> +
> &pwrc {
> compatible = "amlogic,meson-sm1-pwrc";
> };
> --
> 2.21.0
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Jerome Brunet <jbrunet@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: meson: sm1: set gpio interrupt controller compatible
Date: Thu, 05 Sep 2019 13:40:09 -0700 [thread overview]
Message-ID: <7hpnkeqxxy.fsf@baylibre.com> (raw)
In-Reply-To: <20190902160334.14321-1-jbrunet@baylibre.com>
Jerome Brunet <jbrunet@baylibre.com> writes:
> Set the appropriate gpio interrupt controller compatible for the
> sm1 SoC family. This newer version of the controller can now
> trig irq on both edge of the input signal
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Queued.
I may do a late round for the dev cycle of v5.4, otherwise this will go
for v5.5. If it goes for v5.5, it should probably have a Fixes tag, no?
Kevin
> ---
> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> index 521573f3a5ba..6152e928aef2 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> @@ -134,6 +134,11 @@
> power-domains = <&pwrc PWRC_SM1_ETH_ID>;
> };
>
> +&gpio_intc {
> + compatible = "amlogic,meson-sm1-gpio-intc",
> + "amlogic,meson-gpio-intc";
> +};
> +
> &pwrc {
> compatible = "amlogic,meson-sm1-pwrc";
> };
> --
> 2.21.0
next prev parent reply other threads:[~2019-09-05 20:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-02 16:03 [PATCH] arm64: dts: meson: sm1: set gpio interrupt controller compatible Jerome Brunet
2019-09-02 16:03 ` Jerome Brunet
2019-09-05 20:40 ` Kevin Hilman [this message]
2019-09-05 20:40 ` Kevin Hilman
2019-09-05 20:40 ` Kevin Hilman
2019-09-06 8:47 ` Jerome Brunet
2019-09-06 8:47 ` Jerome Brunet
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7hpnkeqxxy.fsf@baylibre.com \
--to=khilman@baylibre.com \
--cc=devicetree@vger.kernel.org \
--cc=jbrunet@baylibre.com \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.