* [PATCH 1/3] ARM: dts: r8a7791: Don't disable referenced optional clocks
2016-04-21 3:44 [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Simon Horman
@ 2016-04-21 3:44 ` Simon Horman
2016-04-21 3:44 ` Simon Horman
` (3 subsequent siblings)
4 siblings, 0 replies; 17+ messages in thread
From: Simon Horman @ 2016-04-21 3:44 UTC (permalink / raw)
To: linux-arm-kernel
From: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
clk_get on a disabled clock node will return EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their clocks property.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them to prevent this.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 1 +
arch/arm/boot/dts/r8a7791-porter.dts | 1 +
arch/arm/boot/dts/r8a7791.dtsi | 5 +----
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 0ad71b81d3a2..cc6e28f81fe4 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -661,6 +661,7 @@
};
&pcie_bus_clk {
+ clock-frequency = <100000000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 6c08314427d6..76c5b2ef8b7e 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -414,6 +414,7 @@
};
&pcie_bus_clk {
+ clock-frequency = <100000000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 6439f0569fe2..1cd1b6a3a72a 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1083,9 +1083,8 @@
pcie_bus_clk: pcie_bus_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <100000000>;
+ clock-frequency = <0>;
clock-output-names = "pcie_bus";
- status = "disabled";
};
/* External SCIF clock */
@@ -1094,7 +1093,6 @@
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- status = "disabled";
};
/* External USB clock - can be overridden by the board */
@@ -1112,7 +1110,6 @@
/* This value must be overridden by the board. */
clock-frequency = <0>;
clock-output-names = "can_clk";
- status = "disabled";
};
/* Special CPG clocks */
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 2/3] Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
2016-04-21 3:44 [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Simon Horman
@ 2016-04-21 3:44 ` Simon Horman
2016-04-21 3:44 ` Simon Horman
` (3 subsequent siblings)
4 siblings, 0 replies; 17+ messages in thread
From: Simon Horman @ 2016-04-21 3:44 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Sjoerd Simons, Simon Horman
From: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
This reverts commit 19417bd9c511 ("ARM: dts: porter: Enable SCIF_CLK
frequency and pins") as according to
http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf
the external oscillator for SCIF_CLK is not mounted on the porter boards.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-porter.dts | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 76c5b2ef8b7e..a9285d9a57cd 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -143,19 +143,11 @@
};
&pfc {
- pinctrl-0 = <&scif_clk_pins>;
- pinctrl-names = "default";
-
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
- scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
- };
-
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
@@ -229,11 +221,6 @@
status = "okay";
};
-&scif_clk {
- clock-frequency = <14745600>;
- status = "okay";
-};
-
ðer {
pinctrl-0 = <ðer_pins &phy1_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 2/3] Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
@ 2016-04-21 3:44 ` Simon Horman
0 siblings, 0 replies; 17+ messages in thread
From: Simon Horman @ 2016-04-21 3:44 UTC (permalink / raw)
To: linux-arm-kernel
From: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
This reverts commit 19417bd9c511 ("ARM: dts: porter: Enable SCIF_CLK
frequency and pins") as according to
http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf
the external oscillator for SCIF_CLK is not mounted on the porter boards.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791-porter.dts | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 76c5b2ef8b7e..a9285d9a57cd 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -143,19 +143,11 @@
};
&pfc {
- pinctrl-0 = <&scif_clk_pins>;
- pinctrl-names = "default";
-
scif0_pins: serial0 {
renesas,groups = "scif0_data_d";
renesas,function = "scif0";
};
- scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
- };
-
ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth";
@@ -229,11 +221,6 @@
status = "okay";
};
-&scif_clk {
- clock-frequency = <14745600>;
- status = "okay";
-};
-
ðer {
pinctrl-0 = <ðer_pins &phy1_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/3] ARM: shmobile: timer: Fix preset_lpj leading to too short delays
2016-04-21 3:44 [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Simon Horman
@ 2016-04-21 3:44 ` Simon Horman
2016-04-21 3:44 ` Simon Horman
` (3 subsequent siblings)
4 siblings, 0 replies; 17+ messages in thread
From: Simon Horman @ 2016-04-21 3:44 UTC (permalink / raw)
To: linux-renesas-soc
Cc: linux-arm-kernel, Magnus Damm, Geert Uytterhoeven, Simon Horman
From: Geert Uytterhoeven <geert+renesas@glider.be>
On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.
This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
- All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
CPU clock cycle,
- As of commit 11d4bb1bd067f9d0 ("ARM: 7907/1: lib: delay-loop: Add
align directive to fix BogoMIPS calculation"), Cortex A8 runs
__loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.
On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/timer.c | 28 +++++++++++-----------------
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index ad008e4b0c49..67d79f9c6bad 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
void __init shmobile_init_delay(void)
{
struct device_node *np, *cpus;
- bool is_a7_a8_a9 = false;
- bool is_a15 = false;
+ unsigned int div = 0;
bool has_arch_timer = false;
u32 max_freq = 0;
@@ -55,27 +54,22 @@ void __init shmobile_init_delay(void)
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
- if (of_device_is_compatible(np, "arm,cortex-a8") ||
- of_device_is_compatible(np, "arm,cortex-a9")) {
- is_a7_a8_a9 = true;
- } else if (of_device_is_compatible(np, "arm,cortex-a7")) {
- is_a7_a8_a9 = true;
- has_arch_timer = true;
- } else if (of_device_is_compatible(np, "arm,cortex-a15")) {
- is_a15 = true;
+ if (of_device_is_compatible(np, "arm,cortex-a8")) {
+ div = 2;
+ } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
+ div = 1;
+ } else if (of_device_is_compatible(np, "arm,cortex-a7") ||
+ of_device_is_compatible(np, "arm,cortex-a15")) {
+ div = 1;
has_arch_timer = true;
}
}
of_node_put(cpus);
- if (!max_freq)
+ if (!max_freq || !div)
return;
- if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
- if (is_a7_a8_a9)
- shmobile_setup_delay_hz(max_freq, 1, 3);
- else if (is_a15)
- shmobile_setup_delay_hz(max_freq, 2, 4);
- }
+ if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+ shmobile_setup_delay_hz(max_freq, 1, div);
}
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 3/3] ARM: shmobile: timer: Fix preset_lpj leading to too short delays
@ 2016-04-21 3:44 ` Simon Horman
0 siblings, 0 replies; 17+ messages in thread
From: Simon Horman @ 2016-04-21 3:44 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.
This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
- All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
CPU clock cycle,
- As of commit 11d4bb1bd067f9d0 ("ARM: 7907/1: lib: delay-loop: Add
align directive to fix BogoMIPS calculation"), Cortex A8 runs
__loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.
On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/timer.c | 28 +++++++++++-----------------
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index ad008e4b0c49..67d79f9c6bad 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
void __init shmobile_init_delay(void)
{
struct device_node *np, *cpus;
- bool is_a7_a8_a9 = false;
- bool is_a15 = false;
+ unsigned int div = 0;
bool has_arch_timer = false;
u32 max_freq = 0;
@@ -55,27 +54,22 @@ void __init shmobile_init_delay(void)
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
- if (of_device_is_compatible(np, "arm,cortex-a8") ||
- of_device_is_compatible(np, "arm,cortex-a9")) {
- is_a7_a8_a9 = true;
- } else if (of_device_is_compatible(np, "arm,cortex-a7")) {
- is_a7_a8_a9 = true;
- has_arch_timer = true;
- } else if (of_device_is_compatible(np, "arm,cortex-a15")) {
- is_a15 = true;
+ if (of_device_is_compatible(np, "arm,cortex-a8")) {
+ div = 2;
+ } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
+ div = 1;
+ } else if (of_device_is_compatible(np, "arm,cortex-a7") ||
+ of_device_is_compatible(np, "arm,cortex-a15")) {
+ div = 1;
has_arch_timer = true;
}
}
of_node_put(cpus);
- if (!max_freq)
+ if (!max_freq || !div)
return;
- if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
- if (is_a7_a8_a9)
- shmobile_setup_delay_hz(max_freq, 1, 3);
- else if (is_a15)
- shmobile_setup_delay_hz(max_freq, 2, 4);
- }
+ if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+ shmobile_setup_delay_hz(max_freq, 1, div);
}
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [GIT PULL] Renesas ARM Based SoC Fixes for v4.6
2016-04-21 3:44 [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Simon Horman
` (2 preceding siblings ...)
2016-04-21 3:44 ` Simon Horman
@ 2016-04-22 15:37 ` Kevin Hilman
2016-04-22 17:09 ` Kevin Hilman
2016-04-25 0:07 ` [GIT PULL v2] " Simon Horman
4 siblings, 1 reply; 17+ messages in thread
From: Kevin Hilman @ 2016-04-22 15:37 UTC (permalink / raw)
To: linux-arm-kernel
Simon Horman <horms+renesas@verge.net.au> writes:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC fixes for v4.6.
>
>
> The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
>
> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-fixes-for-v4.6
>
> for you to fetch changes up to c531fb27e9699eaee478ee5686a3cca5dee73602:
>
> ARM: shmobile: timer: Fix preset_lpj leading to too short delays (2016-04-20 08:52:55 +1000)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Fixes for v4.6
>
> * Correct preset_lpj calculation which may lead to too short delays
> * Correct handling of optional clocks on r8a7791 to restore
> access to the serial port the porter board
>
> ----------------------------------------------------------------
Applied to fixes,
Kevin
^ permalink raw reply [flat|nested] 17+ messages in thread* [GIT PULL] Renesas ARM Based SoC Fixes for v4.6
2016-04-22 15:37 ` [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Kevin Hilman
@ 2016-04-22 17:09 ` Kevin Hilman
0 siblings, 0 replies; 17+ messages in thread
From: Kevin Hilman @ 2016-04-22 17:09 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
Kevin Hilman <khilman@baylibre.com> writes:
> Simon Horman <horms+renesas@verge.net.au> writes:
>
>> Hi Olof, Hi Kevin, Hi Arnd,
>>
>> Please consider these Renesas ARM based SoC fixes for v4.6.
>>
>>
>> The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
>>
>> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
>>
>> are available in the git repository at:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-fixes-for-v4.6
>>
>> for you to fetch changes up to c531fb27e9699eaee478ee5686a3cca5dee73602:
>>
>> ARM: shmobile: timer: Fix preset_lpj leading to too short delays (2016-04-20 08:52:55 +1000)
>>
>> ----------------------------------------------------------------
>> Renesas ARM Based SoC Fixes for v4.6
>>
>> * Correct preset_lpj calculation which may lead to too short delays
>> * Correct handling of optional clocks on r8a7791 to restore
>> access to the serial port the porter board
>>
>> ----------------------------------------------------------------
>
> Applied to fixes,
>
Note that when merging arm-soc/fixes back into our for-next branch, your
fixes conflict with some other stuff you have queued up for v4.7.
Please double-check my conflict resolutions in for-next.
Thanks,
Kevin
^ permalink raw reply [flat|nested] 17+ messages in thread
* [GIT PULL v2] Renesas ARM Based SoC Fixes for v4.6
2016-04-21 3:44 [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Simon Horman
` (3 preceding siblings ...)
2016-04-22 15:37 ` [GIT PULL] Renesas ARM Based SoC Fixes for v4.6 Kevin Hilman
@ 2016-04-25 0:07 ` Simon Horman
4 siblings, 0 replies; 17+ messages in thread
From: Simon Horman @ 2016-04-25 0:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Thu, Apr 21, 2016 at 01:44:30PM +1000, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC fixes for v4.6.
I apologise for not making this clearer in the initial posting.
This is v2 of this pull request. The changes since v1 are:
* Include "ARM: dts: r8a7791: Don't disable referenced optional clocks"
which is needed as a companion to 'Revert "ARM: dts: porter: Enable
SCIF_CLK frequency and pins"' to resolve re-enable serial on the
porter board.
* Include 'Correct preset_lpj calculation which may lead to too short delays'
this was previously part of a separate pull request, which is being
reworked. On Geert's advice I have promoted it to be a fix for v4.6
rather than an enhancement for v4.7.
> The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
>
> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-fixes-for-v4.6
>
> for you to fetch changes up to c531fb27e9699eaee478ee5686a3cca5dee73602:
>
> ARM: shmobile: timer: Fix preset_lpj leading to too short delays (2016-04-20 08:52:55 +1000)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Fixes for v4.6
>
> * Correct preset_lpj calculation which may lead to too short delays
> * Correct handling of optional clocks on r8a7791 to restore
> access to the serial port the porter board
>
> ----------------------------------------------------------------
> Geert Uytterhoeven (1):
> ARM: shmobile: timer: Fix preset_lpj leading to too short delays
>
> Sjoerd Simons (2):
> ARM: dts: r8a7791: Don't disable referenced optional clocks
> Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
>
> arch/arm/boot/dts/r8a7791-koelsch.dts | 1 +
> arch/arm/boot/dts/r8a7791-porter.dts | 14 +-------------
> arch/arm/boot/dts/r8a7791.dtsi | 5 +----
> arch/arm/mach-shmobile/timer.c | 28 +++++++++++-----------------
> 4 files changed, 14 insertions(+), 34 deletions(-)
>
^ permalink raw reply [flat|nested] 17+ messages in thread