* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: linus-amlogic This attempt will try to add new DT files to support Meson-G12A SoC. 1) first, Please notice that, in this patch series, the DT node about 16M reserved memory for hwrom is removed, since it's not needed by G12A SoC. 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is merged. In this version, it rely on bootloader to enable the pclk gate which belong to AO clock domain. Please add clk_ignore_unused to bootargs. Changes since v4 [3]: - add chosen and memory node Changes since v3 [2]: - collect Rob's Reviewed-by - test on latest v4.20/integ Changes since v2 [1]: - reorder subnodes - collect Rob's Reviewed-by Changes since v1 [0]: - fix signoff typo - order subnodes by addresses when there is one and alphabetically when there is none [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan at amlogic.com [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan at amlogic.com [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan at amlogic.com [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan at amlogic.com Jianxin Pan (2): dt-bindings: arm: amlogic: Add Meson G12A binding arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ 4 files changed, 208 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi -- 1.9.1 ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: Kevin Hilman, linux-amlogic Cc: Jianxin Pan, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel This attempt will try to add new DT files to support Meson-G12A SoC. 1) first, Please notice that, in this patch series, the DT node about 16M reserved memory for hwrom is removed, since it's not needed by G12A SoC. 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is merged. In this version, it rely on bootloader to enable the pclk gate which belong to AO clock domain. Please add clk_ignore_unused to bootargs. Changes since v4 [3]: - add chosen and memory node Changes since v3 [2]: - collect Rob's Reviewed-by - test on latest v4.20/integ Changes since v2 [1]: - reorder subnodes - collect Rob's Reviewed-by Changes since v1 [0]: - fix signoff typo - order subnodes by addresses when there is one and alphabetically when there is none [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan@amlogic.com [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan@amlogic.com [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan@amlogic.com [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan@amlogic.com Jianxin Pan (2): dt-bindings: arm: amlogic: Add Meson G12A binding arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ 4 files changed, 208 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi -- 1.9.1 ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: Kevin Hilman, linux-amlogic Cc: Jianxin Pan, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel This attempt will try to add new DT files to support Meson-G12A SoC. 1) first, Please notice that, in this patch series, the DT node about 16M reserved memory for hwrom is removed, since it's not needed by G12A SoC. 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is merged. In this version, it rely on bootloader to enable the pclk gate which belong to AO clock domain. Please add clk_ignore_unused to bootargs. Changes since v4 [3]: - add chosen and memory node Changes since v3 [2]: - collect Rob's Reviewed-by - test on latest v4.20/integ Changes since v2 [1]: - reorder subnodes - collect Rob's Reviewed-by Changes since v1 [0]: - fix signoff typo - order subnodes by addresses when there is one and alphabetically when there is none [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan@amlogic.com [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan@amlogic.com [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan@amlogic.com [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan@amlogic.com Jianxin Pan (2): dt-bindings: arm: amlogic: Add Meson G12A binding arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ 4 files changed, 208 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi -- 1.9.1 ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: linux-arm-kernel This attempt will try to add new DT files to support Meson-G12A SoC. 1) first, Please notice that, in this patch series, the DT node about 16M reserved memory for hwrom is removed, since it's not needed by G12A SoC. 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is merged. In this version, it rely on bootloader to enable the pclk gate which belong to AO clock domain. Please add clk_ignore_unused to bootargs. Changes since v4 [3]: - add chosen and memory node Changes since v3 [2]: - collect Rob's Reviewed-by - test on latest v4.20/integ Changes since v2 [1]: - reorder subnodes - collect Rob's Reviewed-by Changes since v1 [0]: - fix signoff typo - order subnodes by addresses when there is one and alphabetically when there is none [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan at amlogic.com [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan at amlogic.com [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan at amlogic.com [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan at amlogic.com Jianxin Pan (2): dt-bindings: arm: amlogic: Add Meson G12A binding arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Documentation/devicetree/bindings/arm/amlogic.txt | 6 + arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ 4 files changed, 208 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi -- 1.9.1 ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 1/2] dt-bindings: arm: amlogic: Add Meson G12A binding 2018-09-21 8:34 ` Jianxin Pan (?) (?) @ 2018-09-21 8:34 ` Jianxin Pan -1 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: linus-amlogic Introduce new bindings for the Meson G12A SoC Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index b5c2b5c..cf4bbc7 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -57,6 +57,10 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: Required root node property: compatible: "amlogic,a113d", "amlogic,meson-axg"; +Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties: + Required root node property: + compatible: "amlogic,g12a"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -101,6 +105,8 @@ Board compatible values (alphabetically, grouped by SoC): - "amlogic,s400" (Meson axg a113d) + - "amlogic,u200" (Meson g12a s905d2) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 1/2] dt-bindings: arm: amlogic: Add Meson G12A binding @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: Kevin Hilman, linux-amlogic Cc: Jianxin Pan, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel Introduce new bindings for the Meson G12A SoC Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index b5c2b5c..cf4bbc7 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -57,6 +57,10 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: Required root node property: compatible: "amlogic,a113d", "amlogic,meson-axg"; +Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties: + Required root node property: + compatible: "amlogic,g12a"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -101,6 +105,8 @@ Board compatible values (alphabetically, grouped by SoC): - "amlogic,s400" (Meson axg a113d) + - "amlogic,u200" (Meson g12a s905d2) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 1/2] dt-bindings: arm: amlogic: Add Meson G12A binding @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: Kevin Hilman, linux-amlogic Cc: Jianxin Pan, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel Introduce new bindings for the Meson G12A SoC Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index b5c2b5c..cf4bbc7 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -57,6 +57,10 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: Required root node property: compatible: "amlogic,a113d", "amlogic,meson-axg"; +Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties: + Required root node property: + compatible: "amlogic,g12a"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -101,6 +105,8 @@ Board compatible values (alphabetically, grouped by SoC): - "amlogic,s400" (Meson axg a113d) + - "amlogic,u200" (Meson g12a s905d2) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 1/2] dt-bindings: arm: amlogic: Add Meson G12A binding @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: linux-arm-kernel Introduce new bindings for the Meson G12A SoC Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt index b5c2b5c..cf4bbc7 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.txt +++ b/Documentation/devicetree/bindings/arm/amlogic.txt @@ -57,6 +57,10 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: Required root node property: compatible: "amlogic,a113d", "amlogic,meson-axg"; +Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties: + Required root node property: + compatible: "amlogic,g12a"; + Board compatible values (alphabetically, grouped by SoC): - "geniatech,atv1200" (Meson6) @@ -101,6 +105,8 @@ Board compatible values (alphabetically, grouped by SoC): - "amlogic,s400" (Meson axg a113d) + - "amlogic,u200" (Meson g12a s905d2) + Amlogic Meson Firmware registers Interface ------------------------------------------ -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 2/2] arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support 2018-09-21 8:34 ` Jianxin Pan (?) (?) @ 2018-09-21 8:34 ` Jianxin Pan -1 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: linus-amlogic Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++++ 3 files changed, 202 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index a97c0e2..c31f29d6 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts new file mode 100644 index 0000000..c44dbdd --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" + +/ { + compatible = "amlogic,u200", "amlogic,g12a"; + model = "Amlogic Meson G12A U200 Development Board"; + + aliases { + serial0 = &uart_AO; + }; + chosen { + stdout-path = "serial0:115200n8"; + }; + memory at 0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; +}; + +&uart_AO { + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi new file mode 100644 index 0000000..3b82a97 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,g12a"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon at 5000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + periphs: periphs at ff634000 { + compatible = "simple-bus"; + reg = <0x0 0xff634000 0x0 0x2000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; + }; + + hiubus: bus at ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + }; + + aobus: bus at ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial at 3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial at 4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + + gic: interrupt-controller at ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + cbus: bus at ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + }; + + apb: apb at ffe00000 { + compatible = "simple-bus"; + reg = <0x0 0xffe00000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 2/2] arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: Kevin Hilman, linux-amlogic Cc: Jianxin Pan, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++++ 3 files changed, 202 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index a97c0e2..c31f29d6 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts new file mode 100644 index 0000000..c44dbdd --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" + +/ { + compatible = "amlogic,u200", "amlogic,g12a"; + model = "Amlogic Meson G12A U200 Development Board"; + + aliases { + serial0 = &uart_AO; + }; + chosen { + stdout-path = "serial0:115200n8"; + }; + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; +}; + +&uart_AO { + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi new file mode 100644 index 0000000..3b82a97 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,g12a"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@5000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + periphs: periphs@ff634000 { + compatible = "simple-bus"; + reg = <0x0 0xff634000 0x0 0x2000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; + }; + + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + }; + + aobus: bus@ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial@3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial@4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + cbus: bus@ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + }; + + apb: apb@ffe00000 { + compatible = "simple-bus"; + reg = <0x0 0xffe00000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 2/2] arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: Kevin Hilman, linux-amlogic Cc: Jianxin Pan, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++++ 3 files changed, 202 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index a97c0e2..c31f29d6 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts new file mode 100644 index 0000000..c44dbdd --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" + +/ { + compatible = "amlogic,u200", "amlogic,g12a"; + model = "Amlogic Meson G12A U200 Development Board"; + + aliases { + serial0 = &uart_AO; + }; + chosen { + stdout-path = "serial0:115200n8"; + }; + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; +}; + +&uart_AO { + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi new file mode 100644 index 0000000..3b82a97 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,g12a"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@5000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + periphs: periphs@ff634000 { + compatible = "simple-bus"; + reg = <0x0 0xff634000 0x0 0x2000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; + }; + + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + }; + + aobus: bus@ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial@3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial@4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + cbus: bus@ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + }; + + apb: apb@ffe00000 { + compatible = "simple-bus"; + reg = <0x0 0xffe00000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 2/2] arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support @ 2018-09-21 8:34 ` Jianxin Pan 0 siblings, 0 replies; 19+ messages in thread From: Jianxin Pan @ 2018-09-21 8:34 UTC (permalink / raw) To: linux-arm-kernel Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC, which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++++ 3 files changed, 202 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index a97c0e2..c31f29d6 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts new file mode 100644 index 0000000..c44dbdd --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" + +/ { + compatible = "amlogic,u200", "amlogic,g12a"; + model = "Amlogic Meson G12A U200 Development Board"; + + aliases { + serial0 = &uart_AO; + }; + chosen { + stdout-path = "serial0:115200n8"; + }; + memory at 0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; +}; + +&uart_AO { + status = "okay"; +}; + diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi new file mode 100644 index 0000000..3b82a97 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,g12a"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 3 MiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon at 5000000 { + reg = <0x0 0x05000000 0x0 0x300000>; + no-map; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + periphs: periphs at ff634000 { + compatible = "simple-bus"; + reg = <0x0 0xff634000 0x0 0x2000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; + }; + + hiubus: bus at ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + }; + + aobus: bus at ff800000 { + compatible = "simple-bus"; + reg = <0x0 0xff800000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; + + uart_AO: serial at 3000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x3000 0x0 0x18>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + + uart_AO_B: serial at 4000 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; + reg = <0x0 0x4000 0x0 0x18>; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; + }; + }; + + gic: interrupt-controller at ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, + <0x0 0xffc02000 0 0x2000>, + <0x0 0xffc04000 0 0x2000>, + <0x0 0xffc06000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + cbus: bus at ffd00000 { + compatible = "simple-bus"; + reg = <0x0 0xffd00000 0x0 0x25000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>; + }; + + apb: apb at ffe00000 { + compatible = "simple-bus"; + reg = <0x0 0xffe00000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC 2018-09-21 8:34 ` Jianxin Pan (?) @ 2018-09-21 8:38 ` Neil Armstrong -1 siblings, 0 replies; 19+ messages in thread From: Neil Armstrong @ 2018-09-21 8:38 UTC (permalink / raw) To: linus-amlogic Hi Jianxin, On 21/09/2018 10:34, Jianxin Pan wrote: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. > > Changes since v4 [3]: > - add chosen and memory node > > Changes since v3 [2]: > - collect Rob's Reviewed-by > - test on latest v4.20/integ > > Changes since v2 [1]: > - reorder subnodes > - collect Rob's Reviewed-by > > Changes since v1 [0]: > - fix signoff typo > - order subnodes by addresses when there is one and alphabetically when there is none > > > [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan at amlogic.com > [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan at amlogic.com > [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan at amlogic.com > [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan at amlogic.com > For the whole serie : Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Thanks, Neil > Jianxin Pan (2): > dt-bindings: arm: amlogic: Add Meson G12A binding > arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support > > Documentation/devicetree/bindings/arm/amlogic.txt | 6 + > arch/arm64/boot/dts/amlogic/Makefile | 1 + > arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ > arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ > 4 files changed, 208 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-21 8:38 ` Neil Armstrong 0 siblings, 0 replies; 19+ messages in thread From: Neil Armstrong @ 2018-09-21 8:38 UTC (permalink / raw) To: Jianxin Pan, Kevin Hilman, linux-amlogic Cc: devicetree, Hanjie Lin, Victor Wan, Yixun Lan, linux-kernel, Qiufang Dai, Rob Herring, Jian Hu, Carlo Caione, linux-arm-kernel, Jerome Brunet Hi Jianxin, On 21/09/2018 10:34, Jianxin Pan wrote: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. > > Changes since v4 [3]: > - add chosen and memory node > > Changes since v3 [2]: > - collect Rob's Reviewed-by > - test on latest v4.20/integ > > Changes since v2 [1]: > - reorder subnodes > - collect Rob's Reviewed-by > > Changes since v1 [0]: > - fix signoff typo > - order subnodes by addresses when there is one and alphabetically when there is none > > > [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan@amlogic.com > [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan@amlogic.com > [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan@amlogic.com > [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan@amlogic.com > For the whole serie : Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Thanks, Neil > Jianxin Pan (2): > dt-bindings: arm: amlogic: Add Meson G12A binding > arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support > > Documentation/devicetree/bindings/arm/amlogic.txt | 6 + > arch/arm64/boot/dts/amlogic/Makefile | 1 + > arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ > arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ > 4 files changed, 208 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-21 8:38 ` Neil Armstrong 0 siblings, 0 replies; 19+ messages in thread From: Neil Armstrong @ 2018-09-21 8:38 UTC (permalink / raw) To: linux-arm-kernel Hi Jianxin, On 21/09/2018 10:34, Jianxin Pan wrote: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. > > Changes since v4 [3]: > - add chosen and memory node > > Changes since v3 [2]: > - collect Rob's Reviewed-by > - test on latest v4.20/integ > > Changes since v2 [1]: > - reorder subnodes > - collect Rob's Reviewed-by > > Changes since v1 [0]: > - fix signoff typo > - order subnodes by addresses when there is one and alphabetically when there is none > > > [0] https://lore.kernel.org/lkml/1533802951-49919-2-git-send-email-jianxin.pan at amlogic.com > [1] https://lore.kernel.org/lkml/1534160901-22889-1-git-send-email-jianxin.pan at amlogic.com > [2] https://lore.kernel.org/lkml/1534243121-33589-1-git-send-email-jianxin.pan at amlogic.com > [3] https://lore.kernel.org/lkml/1537427368-11104-1-git-send-email-jianxin.pan at amlogic.com > For the whole serie : Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Thanks, Neil > Jianxin Pan (2): > dt-bindings: arm: amlogic: Add Meson G12A binding > arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support > > Documentation/devicetree/bindings/arm/amlogic.txt | 6 + > arch/arm64/boot/dts/amlogic/Makefile | 1 + > arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 29 ++++ > arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 172 ++++++++++++++++++++++ > 4 files changed, 208 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC 2018-09-21 8:34 ` Jianxin Pan (?) (?) @ 2018-09-26 9:08 ` Kevin Hilman -1 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2018-09-26 9:08 UTC (permalink / raw) To: linus-amlogic Jianxin Pan <jianxin.pan@amlogic.com> writes: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. Applied to v4.20/dt64, added Neils' Reviewed-by tag. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-26 9:08 ` Kevin Hilman 0 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2018-09-26 9:08 UTC (permalink / raw) To: Jianxin Pan Cc: linux-amlogic, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel Jianxin Pan <jianxin.pan@amlogic.com> writes: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. Applied to v4.20/dt64, added Neils' Reviewed-by tag. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-26 9:08 ` Kevin Hilman 0 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2018-09-26 9:08 UTC (permalink / raw) To: Jianxin Pan Cc: linux-amlogic, Rob Herring, Neil Armstrong, Jerome Brunet, Carlo Caione, Jian Hu, Yixun Lan, Hanjie Lin, Qiufang Dai, Victor Wan, devicetree, linux-arm-kernel, linux-kernel Jianxin Pan <jianxin.pan@amlogic.com> writes: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. Applied to v4.20/dt64, added Neils' Reviewed-by tag. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC @ 2018-09-26 9:08 ` Kevin Hilman 0 siblings, 0 replies; 19+ messages in thread From: Kevin Hilman @ 2018-09-26 9:08 UTC (permalink / raw) To: linux-arm-kernel Jianxin Pan <jianxin.pan@amlogic.com> writes: > This attempt will try to add new DT files to support Meson-G12A SoC. > > 1) first, Please notice that, in this patch series, the DT node about 16M reserved > memory for hwrom is removed, since it's not needed by G12A SoC. > 2) second, the pclk for uart_AO need to be fixed once G12A clock_ao driver is > merged. In this version, it rely on bootloader to enable the pclk gate which > belong to AO clock domain. Please add clk_ignore_unused to bootargs. Applied to v4.20/dt64, added Neils' Reviewed-by tag. Kevin ^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2018-09-26 9:08 UTC | newest] Thread overview: 19+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-09-21 8:34 [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` [PATCH v5 1/2] dt-bindings: arm: amlogic: Add Meson G12A binding Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` [PATCH v5 2/2] arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:34 ` Jianxin Pan 2018-09-21 8:38 ` [PATCH v5 0/2] arm64: dts: meson-g12a: Introduce new DT files for Meson-G12A SoC Neil Armstrong 2018-09-21 8:38 ` Neil Armstrong 2018-09-21 8:38 ` Neil Armstrong 2018-09-26 9:08 ` Kevin Hilman 2018-09-26 9:08 ` Kevin Hilman 2018-09-26 9:08 ` Kevin Hilman 2018-09-26 9:08 ` Kevin Hilman
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