Re: [PATCH v2 3/9] drm/xe/hwmon: expose fanN_max

["Purkait, Soham" <soham.purkait@intel.com>]

Hi Karthik,

On 17-07-2026 09:47, Karthik Poosa wrote:
> Expose fan maximum RPM via fanN_max.
>
> The value is derived from the firmware-reported maximum fan RPS and
> converted to RPM in the fan hwmon read path.
>
> Update Xe hwmon ABI documentation for fanN_max.
>
> v2: Use xe helper for dmesg logs.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> Assisted-by: Codex:gpt-5-4
> ---
>   .../ABI/testing/sysfs-driver-intel-xe-hwmon    |  8 ++++++++
>   drivers/gpu/drm/xe/xe_hwmon.c                  | 18 +++++++++++++++++-
>   drivers/gpu/drm/xe/xe_pcode_api.h              |  1 +
>   3 files changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> index 0da739d9a816..ec0b94d76e22 100644
> --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> @@ -266,6 +266,14 @@ Description:	RO. Fan 3 speed in RPM.
>   
>   		Only supported for particular Intel Xe graphics platforms.
>   
> +What:           /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan[1-3]_max
> +Date:           July 2026
> +KernelVersion:  7.2
> +Contact:        intel-xe@lists.freedesktop.org
> +Description:    RO. Maximum fan speed in RPM for each fan channel.
> +
> +                Only supported for particular Intel Xe graphics platforms.
> +
>   What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_cap
>   Date:		May 2025
>   KernelVersion:	6.15
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 0a416e3e7b8c..769f4d1da83e 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -165,6 +165,8 @@ struct xe_hwmon_fan_info {
>   			u8 speed;
>   		} fcp[MAX_FAN_CONTROL_POINTS];
>   	} fan_table[FAN_TABLE_MAX];
> +		/** @max_rps: maximum fan RPS */
> +		u32 max_rps;
nit: fix indentation.

Thanks,
Soham
>   	/** @min_pwm: minimum fan PWM */
>   	u32 min_pwm;
>   };
> @@ -799,7 +801,8 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
>   	HWMON_CHANNEL_INFO(curr, HWMON_C_LABEL, HWMON_C_CRIT | HWMON_C_LABEL),
>   	HWMON_CHANNEL_INFO(in, HWMON_I_INPUT | HWMON_I_LABEL, HWMON_I_INPUT | HWMON_I_LABEL),
>   	HWMON_CHANNEL_INFO(energy, HWMON_E_INPUT | HWMON_E_LABEL, HWMON_E_INPUT | HWMON_E_LABEL),
> -	HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT, HWMON_F_INPUT, HWMON_F_INPUT),
> +	HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_MAX, HWMON_F_INPUT | HWMON_F_MAX,
> +			   HWMON_F_INPUT | HWMON_F_MAX),
>   	NULL
>   };
>   
> @@ -987,6 +990,14 @@ static int xe_hwmon_read_fan_control_info(struct xe_hwmon *hwmon)
>   		}
>   
>   		xe_dbg(hwmon->xe, "fan %d min PWM %u\n", fan, fi->min_pwm);
> +
> +		/* Read max fan RPS*/
> +		ret = xe_hwmon_pcode_read_fan_control(hwmon, FSC_READ_MAX_FAN_RPS, fan,
> +						      &fi->max_rps);
> +		if (ret)
> +			xe_warn(hwmon->xe, "failed to read fan %d max RPS, ret=%d\n", fan, ret);
> +		else
> +			xe_dbg(hwmon->xe, "fan %d max RPS %u\n", fan, fi->max_rps);
>   	}
>   	return 0;
>   }
> @@ -1406,6 +1417,7 @@ xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>   
>   	switch (attr) {
>   	case hwmon_fan_input:
> +	case hwmon_fan_max:
>   		return channel < hwmon->num_fans ? 0444 : 0;
>   	default:
>   		return 0;
> @@ -1457,6 +1469,10 @@ xe_hwmon_fan_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>   	switch (attr) {
>   	case hwmon_fan_input:
>   		return xe_hwmon_fan_input_read(hwmon, channel, val);
> +	case hwmon_fan_max:
> +		/* Convert RPS to RPM */
> +		*val = (long)hwmon->fi[channel].max_rps * 60;
> +		return 0;
>   	default:
>   		return -EOPNOTSUPP;
>   	}
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 669010f1e2d0..419ab4f416fa 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -84,6 +84,7 @@
>   #define     PCODE_MBOX_DOMAIN_HBM		0x2
>   
>   #define   FAN_SPEED_CONTROL			0x7D
> +#define     FSC_READ_MAX_FAN_RPS        0x3
>   #define     FSC_READ_NUM_FANS			0x4
>   #define     FSC_READ_STOCK_FAN_CONTROL_POINTS	0x5
>   #define     FSC_READ_FAN_TABLE			0x7