* [PATCH v9 1/8] hw/arm/virt: Only describe cpu topology since virt-6.2
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-20 14:21 ` [PATCH v9 2/8] device_tree: Add qemu_fdt_add_path Yanan Wang
` (7 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
On existing older machine types, without cpu topology described
in ACPI or DT, the guest will populate one by default. With the
topology described, it will read the information and set up its
topology as instructed, but that may not be the same as what was
getting used by default. It's possible that an user application
has a dependency on the default topology and if the default one
gets changed it will probably behave differently.
Based on above consideration we'd better only describe topology
information to the guest on 6.2 and later machine types.
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
---
hw/arm/virt.c | 1 +
include/hw/arm/virt.h | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4160d49688..15e8d8cf4a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2816,6 +2816,7 @@ static void virt_machine_6_1_options(MachineClass *mc)
virt_machine_6_2_options(mc);
compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
mc->smp_props.prefer_sockets = true;
+ vmc->no_cpu_topology = true;
/* qemu ITS was introduced with 6.2 */
vmc->no_tcg_its = true;
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index b461b8d261..dc6b66ffc8 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -125,11 +125,13 @@ struct VirtMachineClass {
bool claim_edge_triggered_timers;
bool smbios_old_sys_ver;
bool no_highmem_ecam;
- bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */
+ bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */
bool kvm_no_adjvtime;
bool no_kvm_steal_time;
bool acpi_expose_flash;
bool no_secure_gpio;
+ /* Machines < 6.2 have no support for describing cpu topology to guest */
+ bool no_cpu_topology;
};
struct VirtMachineState {
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 2/8] device_tree: Add qemu_fdt_add_path
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
2021-10-20 14:21 ` [PATCH v9 1/8] hw/arm/virt: Only describe cpu topology since virt-6.2 Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-20 14:21 ` [PATCH v9 3/8] hw/arm/virt: Add cpu-map to device tree Yanan Wang
` (6 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
qemu_fdt_add_path() works like qemu_fdt_add_subnode(), except it
also adds all missing subnodes from the given path. We'll use it
in a coming patch where we will add cpu-map to the device tree.
And we also tweak an error message of qemu_fdt_add_subnode().
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Alistair Francis <alistair.francis@wdc.com>
Co-developed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Andrew Jones <drjones@redhat.com>
---
include/sysemu/device_tree.h | 1 +
softmmu/device_tree.c | 44 ++++++++++++++++++++++++++++++++++--
2 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h
index 8a2fe55622..ef060a9759 100644
--- a/include/sysemu/device_tree.h
+++ b/include/sysemu/device_tree.h
@@ -121,6 +121,7 @@ uint32_t qemu_fdt_get_phandle(void *fdt, const char *path);
uint32_t qemu_fdt_alloc_phandle(void *fdt);
int qemu_fdt_nop_node(void *fdt, const char *node_path);
int qemu_fdt_add_subnode(void *fdt, const char *name);
+int qemu_fdt_add_path(void *fdt, const char *path);
#define qemu_fdt_setprop_cells(fdt, node_path, property, ...) \
do { \
diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c
index b621f63fba..3965c834ca 100644
--- a/softmmu/device_tree.c
+++ b/softmmu/device_tree.c
@@ -540,8 +540,8 @@ int qemu_fdt_add_subnode(void *fdt, const char *name)
retval = fdt_add_subnode(fdt, parent, basename);
if (retval < 0) {
- error_report("FDT: Failed to create subnode %s: %s", name,
- fdt_strerror(retval));
+ error_report("%s: Failed to create subnode %s: %s",
+ __func__, name, fdt_strerror(retval));
exit(1);
}
@@ -549,6 +549,46 @@ int qemu_fdt_add_subnode(void *fdt, const char *name)
return retval;
}
+/*
+ * qemu_fdt_add_path: Like qemu_fdt_add_subnode(), but will add
+ * all missing subnodes from the given path.
+ */
+int qemu_fdt_add_path(void *fdt, const char *path)
+{
+ const char *name;
+ const char *p = path;
+ int namelen, retval;
+ int parent = 0;
+
+ if (path[0] != '/') {
+ return -1;
+ }
+
+ while (p) {
+ name = p + 1;
+ p = strchr(name, '/');
+ namelen = p != NULL ? p - name : strlen(name);
+
+ retval = fdt_subnode_offset_namelen(fdt, parent, name, namelen);
+ if (retval < 0 && retval != -FDT_ERR_NOTFOUND) {
+ error_report("%s: Unexpected error in finding subnode %.*s: %s",
+ __func__, namelen, name, fdt_strerror(retval));
+ exit(1);
+ } else if (retval == -FDT_ERR_NOTFOUND) {
+ retval = fdt_add_subnode_namelen(fdt, parent, name, namelen);
+ if (retval < 0) {
+ error_report("%s: Failed to create subnode %.*s: %s",
+ __func__, namelen, name, fdt_strerror(retval));
+ exit(1);
+ }
+ }
+
+ parent = retval;
+ }
+
+ return retval;
+}
+
void qemu_fdt_dumpdtb(void *fdt, int size)
{
const char *dumpdtb = current_machine->dumpdtb;
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 3/8] hw/arm/virt: Add cpu-map to device tree
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
2021-10-20 14:21 ` [PATCH v9 1/8] hw/arm/virt: Only describe cpu topology since virt-6.2 Yanan Wang
2021-10-20 14:21 ` [PATCH v9 2/8] device_tree: Add qemu_fdt_add_path Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-20 14:21 ` [PATCH v9 4/8] hw/acpi/aml-build: Add Processor hierarchy node structure Yanan Wang
` (5 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
From: Andrew Jones <drjones@redhat.com>
Support device tree CPU topology descriptions.
In accordance with the Devicetree Specification, the Linux Doc
"arm/cpus.yaml" requires that cpus and cpu nodes in the DT are
present. And we have already met the requirement by generating
/cpus/cpu@* nodes for members within ms->smp.cpus. Accordingly,
we should also create subnodes in cpu-map for the present cpus,
each of which relates to an unique cpu node.
The Linux Doc "cpu/cpu-topology.txt" states that the hierarchy
of CPUs in a SMP system is defined through four entities and
they are socket/cluster/core/thread. It is also required that
a socket node's child nodes must be one or more cluster nodes.
Given that currently we are only provided with information of
socket/core/thread, we assume there is one cluster child node
in each socket node when creating cpu-map.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Co-developed-by: Yanan Wang <wangyanan55@huawei.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
---
hw/arm/virt.c | 70 +++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 60 insertions(+), 10 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 15e8d8cf4a..ca433adb5b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -351,20 +351,21 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
int cpu;
int addr_cells = 1;
const MachineState *ms = MACHINE(vms);
+ const VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
int smp_cpus = ms->smp.cpus;
/*
- * From Documentation/devicetree/bindings/arm/cpus.txt
- * On ARM v8 64-bit systems value should be set to 2,
- * that corresponds to the MPIDR_EL1 register size.
- * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
- * in the system, #address-cells can be set to 1, since
- * MPIDR_EL1[63:32] bits are not used for CPUs
- * identification.
+ * See Linux Documentation/devicetree/bindings/arm/cpus.yaml
+ * On ARM v8 64-bit systems value should be set to 2,
+ * that corresponds to the MPIDR_EL1 register size.
+ * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
+ * in the system, #address-cells can be set to 1, since
+ * MPIDR_EL1[63:32] bits are not used for CPUs
+ * identification.
*
- * Here we actually don't know whether our system is 32- or 64-bit one.
- * The simplest way to go is to examine affinity IDs of all our CPUs. If
- * at least one of them has Aff3 populated, we set #address-cells to 2.
+ * Here we actually don't know whether our system is 32- or 64-bit one.
+ * The simplest way to go is to examine affinity IDs of all our CPUs. If
+ * at least one of them has Aff3 populated, we set #address-cells to 2.
*/
for (cpu = 0; cpu < smp_cpus; cpu++) {
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu));
@@ -407,8 +408,57 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
}
+ if (!vmc->no_cpu_topology) {
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
+ qemu_fdt_alloc_phandle(ms->fdt));
+ }
+
g_free(nodename);
}
+
+ if (!vmc->no_cpu_topology) {
+ /*
+ * Add vCPU topology description through fdt node cpu-map.
+ *
+ * See Linux Documentation/devicetree/bindings/cpu/cpu-topology.txt
+ * In a SMP system, the hierarchy of CPUs can be defined through
+ * four entities that are used to describe the layout of CPUs in
+ * the system: socket/cluster/core/thread.
+ *
+ * A socket node represents the boundary of system physical package
+ * and its child nodes must be one or more cluster nodes. A system
+ * can contain several layers of clustering within a single physical
+ * package and cluster nodes can be contained in parent cluster nodes.
+ *
+ * Given that cluster is not yet supported in the vCPU topology,
+ * we currently generate one cluster node within each socket node
+ * by default.
+ */
+ qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
+
+ for (cpu = smp_cpus - 1; cpu >= 0; cpu--) {
+ char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu);
+ char *map_path;
+
+ if (ms->smp.threads > 1) {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster0/core%d/thread%d",
+ cpu / (ms->smp.cores * ms->smp.threads),
+ (cpu / ms->smp.threads) % ms->smp.cores,
+ cpu % ms->smp.threads);
+ } else {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster0/core%d",
+ cpu / ms->smp.cores,
+ cpu % ms->smp.cores);
+ }
+ qemu_fdt_add_path(ms->fdt, map_path);
+ qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
+
+ g_free(map_path);
+ g_free(cpu_path);
+ }
+ }
}
static void fdt_add_its_gic_node(VirtMachineState *vms)
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 4/8] hw/acpi/aml-build: Add Processor hierarchy node structure
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
` (2 preceding siblings ...)
2021-10-20 14:21 ` [PATCH v9 3/8] hw/arm/virt: Add cpu-map to device tree Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-20 14:21 ` [PATCH v9 5/8] hw/acpi/aml-build: Add PPTT table Yanan Wang
` (4 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
Add a generic API to build Processor hierarchy node structure (Type 0),
which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1.
This function will be used to build ACPI PPTT table for cpu topology.
Co-developed-by: Ying Fang <fangying1@huawei.com>
Co-developed-by: Henglong Fan <fanhenglong@huawei.com>
Co-developed-by: Yanan Wang <wangyanan55@huawei.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
---
hw/acpi/aml-build.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 76af0ebaf9..5195324585 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1964,6 +1964,36 @@ void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms,
acpi_table_end(linker, &table);
}
+/*
+ * ACPI spec, Revision 6.3
+ * 5.2.29.1 Processor hierarchy node structure (Type 0)
+ */
+static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
+ uint32_t parent, uint32_t id,
+ uint32_t *priv_rsrc,
+ uint32_t priv_num)
+{
+ int i;
+
+ build_append_byte(tbl, 0); /* Type 0 - processor */
+ build_append_byte(tbl, 20 + priv_num * 4); /* Length */
+ build_append_int_noprefix(tbl, 0, 2); /* Reserved */
+ build_append_int_noprefix(tbl, flags, 4); /* Flags */
+ build_append_int_noprefix(tbl, parent, 4); /* Parent */
+ build_append_int_noprefix(tbl, id, 4); /* ACPI Processor ID */
+
+ /* Number of private resources */
+ build_append_int_noprefix(tbl, priv_num, 4);
+
+ /* Private resources[N] */
+ if (priv_num > 0) {
+ assert(priv_rsrc);
+ for (i = 0; i < priv_num; i++) {
+ build_append_int_noprefix(tbl, priv_rsrc[i], 4);
+ }
+ }
+}
+
/* build rev1/rev3/rev5.1 FADT */
void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
const char *oem_id, const char *oem_table_id)
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 5/8] hw/acpi/aml-build: Add PPTT table
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
` (3 preceding siblings ...)
2021-10-20 14:21 ` [PATCH v9 4/8] hw/acpi/aml-build: Add Processor hierarchy node structure Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-21 7:03 ` Eric Auger
2021-10-20 14:21 ` [PATCH v9 6/8] tests/data/acpi/virt: Add an empty expected file for PPTT Yanan Wang
` (3 subsequent siblings)
8 siblings, 1 reply; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
From: Andrew Jones <drjones@redhat.com>
Add the Processor Properties Topology Table (PPTT) used to
describe CPU topology information to ACPI guests.
Note, a DT-boot Linux guest with a non-flat CPU topology will
see socket and core IDs being sequential integers starting
from zero, which is different from ACPI-boot Linux guest,
e.g. with -smp 4,sockets=2,cores=2,threads=1
a DT boot produces:
cpu: 0 package_id: 0 core_id: 0
cpu: 1 package_id: 0 core_id: 1
cpu: 2 package_id: 1 core_id: 0
cpu: 3 package_id: 1 core_id: 1
an ACPI boot produces:
cpu: 0 package_id: 36 core_id: 0
cpu: 1 package_id: 36 core_id: 1
cpu: 2 package_id: 96 core_id: 2
cpu: 3 package_id: 96 core_id: 3
This is due to several reasons:
1) DT cpu nodes do not have an equivalent field to what the PPTT
ACPI Processor ID must be, i.e. something equal to the MADT CPU
UID or equal to the UID of an ACPI processor container. In both
ACPI cases those are platform dependant IDs assigned by the
vendor.
2) While QEMU is the vendor for a guest, if the topology specifies
SMT (> 1 thread), then, with ACPI, it is impossible to assign a
core-id the same value as a package-id, thus it is not possible
to have package-id=0 and core-id=0. This is because package and
core containers must be in the same ACPI namespace and therefore
must have unique UIDs.
3) ACPI processor containers are not mandatorily required for PPTT
tables to be used and, due to the limitations of which IDs are
selected described above in (2), they are not helpful for QEMU,
so we don't build them with this patch. In the absence of them,
Linux assigns its own unique IDs. The maintainers have chosen not
to use counters from zero, but rather ACPI table offsets, which
explains why the numbers are so much larger than with DT.
4) When there is no SMT (threads=1) the core IDs for ACPI boot guests
match the logical CPU IDs, because these IDs must be equal to the
MADT CPU UID (as no processor containers are present), and QEMU
uses the logical CPU ID for these MADT IDs.
So in summary, with QEMU as the vendor for the guests, we simply
use sequential integers starting from zero for the non-leaf nodes
but with ID-valid flag unset, so that guest will ignore them and
use table offsets as unique container IDs. And we use logical CPU
IDs for the leaf nodes with the ID-valid flag set, which will be
consistent with MADT.
Currently the implementation of PPTT generation complies with ACPI
specification 5.2.29 (Revision 6.3). The 6.3 spec can be found at:
https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf
Signed-off-by: Andrew Jones <drjones@redhat.com>
Co-developed-by: Yanan Wang <wangyanan55@huawei.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/acpi/aml-build.c | 59 +++++++++++++++++++++++++++++++++++++
include/hw/acpi/aml-build.h | 3 ++
2 files changed, 62 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 5195324585..b3b3310df3 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1994,6 +1994,65 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
}
}
+/*
+ * ACPI spec, Revision 6.3
+ * 5.2.29 Processor Properties Topology Table (PPTT)
+ */
+void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
+ const char *oem_id, const char *oem_table_id)
+{
+ int pptt_start = table_data->len;
+ int uid = 0;
+ int socket;
+ AcpiTable table = { .sig = "PPTT", .rev = 2,
+ .oem_id = oem_id, .oem_table_id = oem_table_id };
+
+ acpi_table_begin(&table, table_data);
+
+ for (socket = 0; socket < ms->smp.sockets; socket++) {
+ uint32_t socket_offset = table_data->len - pptt_start;
+ int core;
+
+ build_processor_hierarchy_node(
+ table_data,
+ /*
+ * Physical package - represents the boundary
+ * of a physical package
+ */
+ (1 << 0),
+ 0, socket, NULL, 0);
+
+ for (core = 0; core < ms->smp.cores; core++) {
+ uint32_t core_offset = table_data->len - pptt_start;
+ int thread;
+
+ if (ms->smp.threads > 1) {
+ build_processor_hierarchy_node(
+ table_data,
+ (0 << 0), /* not a physical package */
+ socket_offset, core, NULL, 0);
+
+ for (thread = 0; thread < ms->smp.threads; thread++) {
+ build_processor_hierarchy_node(
+ table_data,
+ (1 << 1) | /* ACPI Processor ID valid */
+ (1 << 2) | /* Processor is a Thread */
+ (1 << 3), /* Node is a Leaf */
+ core_offset, uid++, NULL, 0);
+ }
+ } else {
+ build_processor_hierarchy_node(
+ table_data,
+ (1 << 1) | /* ACPI Processor ID valid */
+ (1 << 3), /* Node is a Leaf */
+ socket_offset, uid++, NULL, 0);
+ }
+ }
+ }
+
+ acpi_table_end(linker, &table);
+}
+
/* build rev1/rev3/rev5.1 FADT */
void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
const char *oem_id, const char *oem_table_id)
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 3cf6f2c1b9..8346003a22 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -489,6 +489,9 @@ void build_srat_memory(GArray *table_data, uint64_t base,
void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms,
const char *oem_id, const char *oem_table_id);
+void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
+ const char *oem_id, const char *oem_table_id);
+
void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
const char *oem_id, const char *oem_table_id);
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v9 5/8] hw/acpi/aml-build: Add PPTT table
2021-10-20 14:21 ` [PATCH v9 5/8] hw/acpi/aml-build: Add PPTT table Yanan Wang
@ 2021-10-21 7:03 ` Eric Auger
0 siblings, 0 replies; 12+ messages in thread
From: Eric Auger @ 2021-10-21 7:03 UTC (permalink / raw)
To: Yanan Wang, Peter Maydell, Richard Henderson, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
Hi Yanan,
On 10/20/21 4:21 PM, Yanan Wang wrote:
> From: Andrew Jones <drjones@redhat.com>
>
> Add the Processor Properties Topology Table (PPTT) used to
> describe CPU topology information to ACPI guests.
>
> Note, a DT-boot Linux guest with a non-flat CPU topology will
> see socket and core IDs being sequential integers starting
> from zero, which is different from ACPI-boot Linux guest,
> e.g. with -smp 4,sockets=2,cores=2,threads=1
>
> a DT boot produces:
>
> cpu: 0 package_id: 0 core_id: 0
> cpu: 1 package_id: 0 core_id: 1
> cpu: 2 package_id: 1 core_id: 0
> cpu: 3 package_id: 1 core_id: 1
>
> an ACPI boot produces:
>
> cpu: 0 package_id: 36 core_id: 0
> cpu: 1 package_id: 36 core_id: 1
> cpu: 2 package_id: 96 core_id: 2
> cpu: 3 package_id: 96 core_id: 3
>
> This is due to several reasons:
>
> 1) DT cpu nodes do not have an equivalent field to what the PPTT
> ACPI Processor ID must be, i.e. something equal to the MADT CPU
> UID or equal to the UID of an ACPI processor container. In both
> ACPI cases those are platform dependant IDs assigned by the
> vendor.
>
> 2) While QEMU is the vendor for a guest, if the topology specifies
> SMT (> 1 thread), then, with ACPI, it is impossible to assign a
> core-id the same value as a package-id, thus it is not possible
> to have package-id=0 and core-id=0. This is because package and
> core containers must be in the same ACPI namespace and therefore
> must have unique UIDs.
>
> 3) ACPI processor containers are not mandatorily required for PPTT
> tables to be used and, due to the limitations of which IDs are
> selected described above in (2), they are not helpful for QEMU,
> so we don't build them with this patch. In the absence of them,
> Linux assigns its own unique IDs. The maintainers have chosen not
> to use counters from zero, but rather ACPI table offsets, which
> explains why the numbers are so much larger than with DT.
>
> 4) When there is no SMT (threads=1) the core IDs for ACPI boot guests
> match the logical CPU IDs, because these IDs must be equal to the
> MADT CPU UID (as no processor containers are present), and QEMU
> uses the logical CPU ID for these MADT IDs.
>
> So in summary, with QEMU as the vendor for the guests, we simply
> use sequential integers starting from zero for the non-leaf nodes
> but with ID-valid flag unset, so that guest will ignore them and
> use table offsets as unique container IDs. And we use logical CPU
> IDs for the leaf nodes with the ID-valid flag set, which will be
> consistent with MADT.
>
> Currently the implementation of PPTT generation complies with ACPI
> specification 5.2.29 (Revision 6.3). The 6.3 spec can be found at:
> https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf
>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> Co-developed-by: Yanan Wang <wangyanan55@huawei.com>
> Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> hw/acpi/aml-build.c | 59 +++++++++++++++++++++++++++++++++++++
> include/hw/acpi/aml-build.h | 3 ++
> 2 files changed, 62 insertions(+)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 5195324585..b3b3310df3 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -1994,6 +1994,65 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
> }
> }
>
> +/*
> + * ACPI spec, Revision 6.3
> + * 5.2.29 Processor Properties Topology Table (PPTT)
> + */
> +void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
> + const char *oem_id, const char *oem_table_id)
> +{
> + int pptt_start = table_data->len;
> + int uid = 0;
> + int socket;
> + AcpiTable table = { .sig = "PPTT", .rev = 2,
> + .oem_id = oem_id, .oem_table_id = oem_table_id };
> +
> + acpi_table_begin(&table, table_data);
> +
> + for (socket = 0; socket < ms->smp.sockets; socket++) {
> + uint32_t socket_offset = table_data->len - pptt_start;
> + int core;
> +
> + build_processor_hierarchy_node(
> + table_data,
> + /*
> + * Physical package - represents the boundary
> + * of a physical package
> + */
> + (1 << 0),
> + 0, socket, NULL, 0);
> +
> + for (core = 0; core < ms->smp.cores; core++) {
> + uint32_t core_offset = table_data->len - pptt_start;
> + int thread;
> +
> + if (ms->smp.threads > 1) {
> + build_processor_hierarchy_node(
> + table_data,
> + (0 << 0), /* not a physical package */
> + socket_offset, core, NULL, 0);
> +
> + for (thread = 0; thread < ms->smp.threads; thread++) {
> + build_processor_hierarchy_node(
> + table_data,
> + (1 << 1) | /* ACPI Processor ID valid */
> + (1 << 2) | /* Processor is a Thread */
> + (1 << 3), /* Node is a Leaf */
> + core_offset, uid++, NULL, 0);
> + }
> + } else {
> + build_processor_hierarchy_node(
> + table_data,
> + (1 << 1) | /* ACPI Processor ID valid */
> + (1 << 3), /* Node is a Leaf */
> + socket_offset, uid++, NULL, 0);
> + }
> + }
> + }
> +
> + acpi_table_end(linker, &table);
> +}
> +
> /* build rev1/rev3/rev5.1 FADT */
> void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
> const char *oem_id, const char *oem_table_id)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index 3cf6f2c1b9..8346003a22 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -489,6 +489,9 @@ void build_srat_memory(GArray *table_data, uint64_t base,
> void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms,
> const char *oem_id, const char *oem_table_id);
>
> +void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
> + const char *oem_id, const char *oem_table_id);
> +
> void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
> const char *oem_id, const char *oem_table_id);
>
>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Thanks
Eric
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v9 6/8] tests/data/acpi/virt: Add an empty expected file for PPTT
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
` (4 preceding siblings ...)
2021-10-20 14:21 ` [PATCH v9 5/8] hw/acpi/aml-build: Add PPTT table Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-20 14:21 ` [PATCH v9 7/8] hw/arm/virt-acpi-build: Generate PPTT table Yanan Wang
` (2 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
Add a generic empty binary file for the new introduced PPTT table
under tests/data/acpi/virt, and list it as files to be changed in
tests/qtest/bios-tables-test-allowed-diff.h
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
---
tests/data/acpi/virt/PPTT | 0
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
2 files changed, 1 insertion(+)
create mode 100644 tests/data/acpi/virt/PPTT
diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..cb143a55a6 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/virt/PPTT",
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 7/8] hw/arm/virt-acpi-build: Generate PPTT table
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
` (5 preceding siblings ...)
2021-10-20 14:21 ` [PATCH v9 6/8] tests/data/acpi/virt: Add an empty expected file for PPTT Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-20 14:21 ` [PATCH v9 8/8] tests/data/acpi/virt: Update the empty expected file for PPTT Yanan Wang
2021-10-21 15:04 ` [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Richard Henderson
8 siblings, 0 replies; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
Generate the Processor Properties Topology Table (PPTT) for ARM
virt machines supporting it (>= 6.2).
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
---
hw/arm/virt-acpi-build.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 6cec97352b..658a0a5d39 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -875,13 +875,19 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables)
dsdt = tables_blob->len;
build_dsdt(tables_blob, tables->linker, vms);
- /* FADT MADT GTDT MCFG SPCR pointed to by RSDT */
+ /* FADT MADT PPTT GTDT MCFG SPCR pointed to by RSDT */
acpi_add_table(table_offsets, tables_blob);
build_fadt_rev5(tables_blob, tables->linker, vms, dsdt);
acpi_add_table(table_offsets, tables_blob);
build_madt(tables_blob, tables->linker, vms);
+ if (!vmc->no_cpu_topology) {
+ acpi_add_table(table_offsets, tables_blob);
+ build_pptt(tables_blob, tables->linker, ms,
+ vms->oem_id, vms->oem_table_id);
+ }
+
acpi_add_table(table_offsets, tables_blob);
build_gtdt(tables_blob, tables->linker, vms);
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v9 8/8] tests/data/acpi/virt: Update the empty expected file for PPTT
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
` (6 preceding siblings ...)
2021-10-20 14:21 ` [PATCH v9 7/8] hw/arm/virt-acpi-build: Generate PPTT table Yanan Wang
@ 2021-10-20 14:21 ` Yanan Wang
2021-10-21 7:04 ` Eric Auger
2021-10-21 15:04 ` [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Richard Henderson
8 siblings, 1 reply; 12+ messages in thread
From: Yanan Wang @ 2021-10-20 14:21 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Yanan Wang, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
Run ./tests/data/acpi/rebuild-expected-aml.sh from build directory
to update PPTT binary. Also empty bios-tables-test-allowed-diff.h.
Disassembled output of the updated new file:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180810 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembly of tests/data/acpi/virt/PPTT, Fri Oct 8 10:12:32 2021
*
* ACPI Data Table [PPTT]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "PPTT" [Processor Properties Topology Table]
[004h 0004 4] Table Length : 0000004C
[008h 0008 1] Revision : 02
[009h 0009 1] Checksum : A8
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 1] Subtable Type : 00 [Processor Hierarchy Node]
[025h 0037 1] Length : 14
[026h 0038 2] Reserved : 0000
[028h 0040 4] Flags (decoded below) : 00000001
Physical package : 1
ACPI Processor ID valid : 0
[02Ch 0044 4] Parent : 00000000
[030h 0048 4] ACPI Processor ID : 00000000
[034h 0052 4] Private Resource Number : 00000000
[038h 0056 1] Subtable Type : 00 [Processor Hierarchy Node]
[039h 0057 1] Length : 14
[03Ah 0058 2] Reserved : 0000
[03Ch 0060 4] Flags (decoded below) : 0000000A
Physical package : 0
ACPI Processor ID valid : 1
[040h 0064 4] Parent : 00000024
[044h 0068 4] ACPI Processor ID : 00000000
[048h 0072 4] Private Resource Number : 00000000
Raw Table Data: Length 76 (0x4C)
0000: 50 50 54 54 4C 00 00 00 02 A8 42 4F 43 48 53 20 // PPTTL.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 14 00 00 01 00 00 00 00 00 00 00 // ................
0030: 00 00 00 00 00 00 00 00 00 14 00 00 0A 00 00 00 // ................
0040: 24 00 00 00 00 00 00 00 00 00 00 00 // $...........
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
---
tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
2 files changed, 1 deletion(-)
diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..7a1258ecf123555b24462c98ccbb76b4ac1d0c2b 100644
GIT binary patch
literal 76
zcmV-S0JHy4P*hY*00002s6tOeNK+s}SWrVCARr(C0000&SWrU&000006aWAL00000
i0000000000000006aWAU0000a00000000000001^0tW#A
literal 0
KcmV+b0RR6000031
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index cb143a55a6..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/virt/PPTT",
--
2.19.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v9 8/8] tests/data/acpi/virt: Update the empty expected file for PPTT
2021-10-20 14:21 ` [PATCH v9 8/8] tests/data/acpi/virt: Update the empty expected file for PPTT Yanan Wang
@ 2021-10-21 7:04 ` Eric Auger
0 siblings, 0 replies; 12+ messages in thread
From: Eric Auger @ 2021-10-21 7:04 UTC (permalink / raw)
To: Yanan Wang, Peter Maydell, Richard Henderson, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
Hi Yanan,
On 10/20/21 4:21 PM, Yanan Wang wrote:
> Run ./tests/data/acpi/rebuild-expected-aml.sh from build directory
> to update PPTT binary. Also empty bios-tables-test-allowed-diff.h.
>
> Disassembled output of the updated new file:
>
> /*
> * Intel ACPI Component Architecture
> * AML/ASL+ Disassembler version 20180810 (64-bit version)
> * Copyright (c) 2000 - 2018 Intel Corporation
> *
> * Disassembly of tests/data/acpi/virt/PPTT, Fri Oct 8 10:12:32 2021
> *
> * ACPI Data Table [PPTT]
> *
> * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
> */
>
> [000h 0000 4] Signature : "PPTT" [Processor Properties Topology Table]
> [004h 0004 4] Table Length : 0000004C
> [008h 0008 1] Revision : 02
> [009h 0009 1] Checksum : A8
> [00Ah 0010 6] Oem ID : "BOCHS "
> [010h 0016 8] Oem Table ID : "BXPC "
> [018h 0024 4] Oem Revision : 00000001
> [01Ch 0028 4] Asl Compiler ID : "BXPC"
> [020h 0032 4] Asl Compiler Revision : 00000001
>
> [024h 0036 1] Subtable Type : 00 [Processor Hierarchy Node]
> [025h 0037 1] Length : 14
> [026h 0038 2] Reserved : 0000
> [028h 0040 4] Flags (decoded below) : 00000001
> Physical package : 1
> ACPI Processor ID valid : 0
> [02Ch 0044 4] Parent : 00000000
> [030h 0048 4] ACPI Processor ID : 00000000
> [034h 0052 4] Private Resource Number : 00000000
>
> [038h 0056 1] Subtable Type : 00 [Processor Hierarchy Node]
> [039h 0057 1] Length : 14
> [03Ah 0058 2] Reserved : 0000
> [03Ch 0060 4] Flags (decoded below) : 0000000A
> Physical package : 0
> ACPI Processor ID valid : 1
> [040h 0064 4] Parent : 00000024
> [044h 0068 4] ACPI Processor ID : 00000000
> [048h 0072 4] Private Resource Number : 00000000
>
> Raw Table Data: Length 76 (0x4C)
>
> 0000: 50 50 54 54 4C 00 00 00 02 A8 42 4F 43 48 53 20 // PPTTL.....BOCHS
> 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
> 0020: 01 00 00 00 00 14 00 00 01 00 00 00 00 00 00 00 // ................
> 0030: 00 00 00 00 00 00 00 00 00 14 00 00 0A 00 00 00 // ................
> 0040: 24 00 00 00 00 00 00 00 00 00 00 00 // $...........
>
> Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
> ---
> tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes
> tests/qtest/bios-tables-test-allowed-diff.h | 1 -
> 2 files changed, 1 deletion(-)
>
> diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT
> index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..7a1258ecf123555b24462c98ccbb76b4ac1d0c2b 100644
> GIT binary patch
> literal 76
> zcmV-S0JHy4P*hY*00002s6tOeNK+s}SWrVCARr(C0000&SWrU&000006aWAL00000
> i0000000000000006aWAU0000a00000000000001^0tW#A
>
> literal 0
> KcmV+b0RR6000031
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index cb143a55a6..dfb8523c8b 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1,2 +1 @@
> /* List of comma-separated changed AML files to ignore */
> -"tests/data/acpi/virt/PPTT",
>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Thanks
Eric
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support
2021-10-20 14:21 [PATCH v9 0/8] hw/arm/virt: Introduce cpu topology support Yanan Wang
` (7 preceding siblings ...)
2021-10-20 14:21 ` [PATCH v9 8/8] tests/data/acpi/virt: Update the empty expected file for PPTT Yanan Wang
@ 2021-10-21 15:04 ` Richard Henderson
8 siblings, 0 replies; 12+ messages in thread
From: Richard Henderson @ 2021-10-21 15:04 UTC (permalink / raw)
To: Yanan Wang, Peter Maydell, Eric Auger, Andrew Jones,
Michael S . Tsirkin, Igor Mammedov
Cc: qemu-devel, Shannon Zhao, qemu-arm, Alistair Francis,
wanghaibin.wang, David Gibson
On 10/20/21 7:21 AM, Yanan Wang wrote:
> Hi,
>
> This is the latest v9 series which supports exposing vCPU topology
> to the guest for Arm virt machines.
>
> Description of this series:
> Once the view of an accurate virtual cpu topology is provided to guest,
> with a well-designed vCPU pinning to the pCPU we may get a huge benefit,
> e.g., the scheduling performance improvement. See Dario Faggioli's
> research and the related performance tests in [1] for reference.
>
> This patch series introduces cpu topology support for Arm platform.
> Both cpu-map in DT and ACPI PPTT table are introduced to store the
> topology information. And we only describe the topology information
> to 6.2 and newer virt machines, considering compatibility.
>
> [1] https://kvmforum2020.sched.com/event/eE1y/virtual-topology-for-virtual-machines
> -friend-or-foe-dario-faggioli-suse
Queued to target-arm.next, thanks.
r~
>
> Changelog:
> v8->v9:
> - add Eric's R-bs, thanks!
> - address Eric's suggestions to update some function comments and commit msg (patch #5)
> - make build_processor_hierarchy_node static as it's only used by build_pptt (patch #4)
> - retested.
> - v8: https://lore.kernel.org/qemu-devel/20211014132206.19220-1-wangyanan55@huawei.com/
>
> v7->v8:
> - rebased on top of master (commit e5b2333f24)
> - only add one generic expected file for PPTT instead of four, which works
> fine enough for now (patch #6 and #8 updated)
> - v7: https://lore.kernel.org/qemu-devel/20211007030746.10420-1-wangyanan55@huawei.com/
>
> v6->v7:
> - rebased on top of master (commit ca61fa4b80)
> - use newly introduced acpi_table_begin/acpi_table_end APIs to build PPTT
> (patch #5 updated)
> - add reference files for PPTT to fix broken bios-table-test for Aarch64
> virt machine (patch #6-#8 added)
> - v6: https://lore.kernel.org/qemu-devel/20210824122016.144364-1-wangyanan55@huawei.com/
>
> Andrew Jones (2):
> hw/arm/virt: Add cpu-map to device tree
> hw/acpi/aml-build: Add PPTT table
>
> Yanan Wang (6):
> hw/arm/virt: Only describe cpu topology since virt-6.2
> device_tree: Add qemu_fdt_add_path
> hw/acpi/aml-build: Add Processor hierarchy node structure
> tests/data/acpi/virt: Add an empty expected file for PPTT
> hw/arm/virt-acpi-build: Generate PPTT table
> tests/data/acpi/virt: Update the empty expected file for PPTT
>
> hw/acpi/aml-build.c | 89 +++++++++++++++++++++++++++++++++++
> hw/arm/virt-acpi-build.c | 8 +++-
> hw/arm/virt.c | 71 ++++++++++++++++++++++++----
> include/hw/acpi/aml-build.h | 3 ++
> include/hw/arm/virt.h | 4 +-
> include/sysemu/device_tree.h | 1 +
> softmmu/device_tree.c | 44 ++++++++++++++++-
> tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes
> 8 files changed, 206 insertions(+), 14 deletions(-)
> create mode 100644 tests/data/acpi/virt/PPTT
>
> --
> 2.19.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread