From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Alan Modra <amodra@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>,
Carlos O'Donell <codonell@redhat.com>,
Tulio Magno Quites Machado Filho <tuliom@ascii.art.br>,
Florian Weimer <fweimer@redhat.com>,
Michael Meissner <meissner@linux.ibm.com>,
Peter Bergner <bergner@vnet.ibm.com>,
Paul Burton <paul.burton@mips.com>,
Will Deacon <will.deacon@arm.com>,
Boqun Feng <boqun.feng@gmail.com>,
heiko carstens <heiko.carstens@de.ibm.com>,
gor <gor@linux.ibm.com>, schwidefsky <schwidefsky@de.ibm.com>,
"Russell King, ARM Linux" <linux@armlinux.org.uk>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>, carlos <carlos@redhat.com>,
Joseph Myers <joseph@codesourcery.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
libc-alpha <libc-alpha@sourceware.org>,
Thomas
Subject: Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
Date: Thu, 18 Apr 2019 11:31:56 -0400 (EDT) [thread overview]
Message-ID: <836018684.1056.1555601516134.JavaMail.zimbra@efficios.com> (raw)
In-Reply-To: <20190409092948.GA14424@bubble.grove.modra.org>
----- On Apr 9, 2019, at 5:29 AM, Alan Modra amodra@gmail.com wrote:
> On Tue, Apr 09, 2019 at 02:23:53PM +1000, Michael Ellerman wrote:
>> I'd much rather we use a trap with a specific immediate value. Otherwise
>> someone's going to waste time one day puzzling over why userspace is
>> doing mtmsr.
>
> It's data. We have other data in executable sections. Anyone who
> wonders about odd disassembly just hasn't realized they are
> disassembling data.
>
>> It would also complicate things if we ever wanted to emulate mtmsr.
>
> No, because it won't be executed. If I understand correctly, the only
> reason to choose an illegal, trap or privileged insn is to halt
> execution earlier rather than later when a program goes off in the
> weeds.
>
>> If we want something that is a trap rather than a nop then use 0x0fe50553.
>>
>> That's "compare the value in r5 with 0x553 and then trap unconditionally".
>>
>> It shows up in objdump as:
>>
>> 10000000: 53 05 e5 0f twui r5,1363
>>
>>
>> The immediate can be anything, I chose that value to mimic the x86 value
>> Mathieu mentioned.
>>
>> There's no reason that instruction would ever be generated because the
>> immediate value serves no purpose. So it satisfies the "very unlikely
>> to appear" criteria AFAICS.
>
> Yes, looks fine to me, except that in VLE mode (do we care?)
> ".long 0x0fe50553" disassembles as
> 0: 0f e5 se_cmphl r5,r30
> 2: 05 53 se_mullw r3,r5
> No illegal/trap/privileged insn there.
>
> ".long 0x0fe5000b" might be better to cover VLE.
Can you share with us the objdump output of ".long 0x0fe5000b" in
VLE mode ? VLE mode support does not appear to be available in typical
toolchains. Also, is VLE mode only for powerpc 32 be, or also for
powerpc 64 be/le ?
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
WARNING: multiple messages have this Message-ID (diff)
From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Alan Modra <amodra@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>,
Carlos O'Donell <codonell@redhat.com>,
Tulio Magno Quites Machado Filho <tuliom@ascii.art.br>,
Florian Weimer <fweimer@redhat.com>,
Michael Meissner <meissner@linux.ibm.com>,
Peter Bergner <bergner@vnet.ibm.com>,
Paul Burton <paul.burton@mips.com>,
Will Deacon <will.deacon@arm.com>,
Boqun Feng <boqun.feng@gmail.com>,
heiko carstens <heiko.carstens@de.ibm.com>,
gor <gor@linux.ibm.com>, schwidefsky <schwidefsky@de.ibm.com>,
"Russell King, ARM Linux" <linux@armlinux.org.uk>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>, carlos <carlos@redhat.com>,
Joseph Myers <joseph@codesourcery.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
libc-alpha <libc-alpha@sourceware.org>,
Thomas Gleixner <tglx@linutronix.de>, Ben Maurer <bmaurer@fb.com>,
Peter Zijlstra <peterz@infradead.org>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Dave Watson <davejwatson@fb.com>, Paul Turner <pjt@google.com>,
Rich Felker <dalias@libc.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-api <linux-api@vger.kernel.org>
Subject: Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
Date: Thu, 18 Apr 2019 11:31:56 -0400 (EDT) [thread overview]
Message-ID: <836018684.1056.1555601516134.JavaMail.zimbra@efficios.com> (raw)
In-Reply-To: <20190409092948.GA14424@bubble.grove.modra.org>
----- On Apr 9, 2019, at 5:29 AM, Alan Modra amodra@gmail.com wrote:
> On Tue, Apr 09, 2019 at 02:23:53PM +1000, Michael Ellerman wrote:
>> I'd much rather we use a trap with a specific immediate value. Otherwise
>> someone's going to waste time one day puzzling over why userspace is
>> doing mtmsr.
>
> It's data. We have other data in executable sections. Anyone who
> wonders about odd disassembly just hasn't realized they are
> disassembling data.
>
>> It would also complicate things if we ever wanted to emulate mtmsr.
>
> No, because it won't be executed. If I understand correctly, the only
> reason to choose an illegal, trap or privileged insn is to halt
> execution earlier rather than later when a program goes off in the
> weeds.
>
>> If we want something that is a trap rather than a nop then use 0x0fe50553.
>>
>> That's "compare the value in r5 with 0x553 and then trap unconditionally".
>>
>> It shows up in objdump as:
>>
>> 10000000: 53 05 e5 0f twui r5,1363
>>
>>
>> The immediate can be anything, I chose that value to mimic the x86 value
>> Mathieu mentioned.
>>
>> There's no reason that instruction would ever be generated because the
>> immediate value serves no purpose. So it satisfies the "very unlikely
>> to appear" criteria AFAICS.
>
> Yes, looks fine to me, except that in VLE mode (do we care?)
> ".long 0x0fe50553" disassembles as
> 0: 0f e5 se_cmphl r5,r30
> 2: 05 53 se_mullw r3,r5
> No illegal/trap/privileged insn there.
>
> ".long 0x0fe5000b" might be better to cover VLE.
Can you share with us the objdump output of ".long 0x0fe5000b" in
VLE mode ? VLE mode support does not appear to be available in typical
toolchains. Also, is VLE mode only for powerpc 32 be, or also for
powerpc 64 be/le ?
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
next prev parent reply other threads:[~2019-04-18 15:31 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20190212194253.1951-1-mathieu.desnoyers@efficios.com>
2019-02-12 19:42 ` [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7) Mathieu Desnoyers
2019-03-22 20:09 ` Carlos O'Donell
2019-03-25 15:54 ` Mathieu Desnoyers
2019-03-27 9:16 ` Martin Schwidefsky
2019-03-27 9:16 ` Martin Schwidefsky
2019-03-27 20:01 ` Mathieu Desnoyers
2019-03-27 20:01 ` Mathieu Desnoyers
2019-03-27 20:38 ` Carlos O'Donell
2019-03-27 20:38 ` Carlos O'Donell
2019-03-28 7:49 ` Martin Schwidefsky
2019-03-28 7:49 ` Martin Schwidefsky
2019-03-28 15:42 ` Mathieu Desnoyers
2019-03-28 15:42 ` Mathieu Desnoyers
2019-04-02 6:02 ` Michael Ellerman
2019-04-02 7:08 ` Florian Weimer
2019-04-02 7:08 ` Florian Weimer
2019-04-04 20:32 ` Carlos O'Donell
2019-04-04 20:32 ` Carlos O'Donell
2019-04-05 9:16 ` Florian Weimer
2019-04-05 9:16 ` Florian Weimer
2019-04-05 15:40 ` Carlos O'Donell
2019-04-05 15:40 ` Carlos O'Donell
2019-04-08 19:20 ` Tulio Magno Quites Machado Filho
2019-04-08 19:20 ` Tulio Magno Quites Machado Filho
2019-04-08 21:45 ` Carlos O'Donell
2019-04-08 21:45 ` Carlos O'Donell
2019-04-09 4:23 ` Michael Ellerman
2019-04-09 4:23 ` Michael Ellerman
2019-04-09 9:29 ` Alan Modra
2019-04-09 9:29 ` Alan Modra
2019-04-09 13:58 ` Tulio Magno Quites Machado Filho
2019-04-09 14:13 ` Carlos O'Donell
2019-04-09 14:13 ` Carlos O'Donell
2019-04-09 15:45 ` Mathieu Desnoyers
2019-04-09 15:45 ` Mathieu Desnoyers
2019-04-18 15:31 ` Mathieu Desnoyers [this message]
2019-04-18 15:31 ` Mathieu Desnoyers
2019-04-09 16:33 ` Mathieu Desnoyers
2019-04-09 16:33 ` Mathieu Desnoyers
2019-04-04 20:15 ` Carlos O'Donell
2019-04-04 20:50 ` Carlos O'Donell
2019-04-04 21:41 ` Paul Burton
2019-04-04 21:41 ` Paul Burton
2019-04-09 16:40 ` Mathieu Desnoyers
2019-04-09 16:40 ` Mathieu Desnoyers
2019-04-18 18:58 ` Mathieu Desnoyers
2019-04-18 18:58 ` Mathieu Desnoyers
2019-04-24 15:05 ` Mathieu Desnoyers
2019-04-24 15:05 ` Mathieu Desnoyers
2019-04-24 23:13 ` Paul Burton
2019-04-24 23:13 ` Paul Burton
2019-04-25 0:41 ` Maciej W. Rozycki
2019-04-25 0:41 ` Maciej W. Rozycki
2019-02-12 19:42 ` [PATCH 2/4] glibc: sched_getcpu(): use rseq cpu_id TLS on Linux Mathieu Desnoyers
2019-03-22 20:13 ` Carlos O'Donell
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