From: Chris Wilson <chris@chris-wilson.co.uk>
To: Zhenyu Wang <zhenyuw@linux.intel.com>,
daniel.vetter@ffwll.ch,
intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: ignore cached memory flag in i965_write_entry()?
Date: Tue, 14 Dec 2010 09:26:01 +0000 [thread overview]
Message-ID: <849307$aokeen@azsmga001.ch.intel.com> (raw)
In-Reply-To: <20101214050250.GB27927@zhen-devel.sh.intel.com>
On Tue, 14 Dec 2010 13:02:50 +0800, Zhenyu Wang <zhenyuw@linux.intel.com> wrote:
> On 2010.12.14 11:03:53 +0800, Zhenyu Wang wrote:
> >
> > Looks from a6963596a13e62f8e65b1cf3403a330ff2db407c, setting
> > GTT entry on i965-ish totally ignored cached memory flag?
> > That might break r/w consistent for pages like hw status.
> >
>
> This should recover that.
Nice catch. My fault, I should have spotted that when I applied the patch.
Thanks!
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
prev parent reply other threads:[~2010-12-14 9:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-14 3:03 ignore cached memory flag in i965_write_entry()? Zhenyu Wang
2010-12-14 5:02 ` Zhenyu Wang
2010-12-14 9:26 ` Chris Wilson [this message]
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