From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com
Subject: Re: [PATCH] drm/i915/skl: Enable eDRAM for gen9 as well
Date: 31 Jan 2015 09:30:17 -0800 [thread overview]
Message-ID: <84c8a8$j7knla@orsmga001.jf.intel.com> (raw)
In-Reply-To: <1422535355-4574-1-git-send-email-damien.lespiau@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5681
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 353/353 353/353
ILK 200/200 200/200
SNB 400/422 400/422
IVB +2 485/487 487/487
BYT 296/296 296/296
HSW +1-1 507/508 507/508
BDW 401/402 401/402
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
IVB igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance DMESG_WARN(6, M34M21)PASS(8, M4M34) PASS(1, M4)
IVB igt_gem_storedw_batches_loop_normal DMESG_WARN(5, M34M4)PASS(15, M34M4M21) PASS(1, M4)
HSW igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance DMESG_WARN(1, M40)PASS(18, M40M20) PASS(1, M40)
*HSW igt_gem_pwrite_pread_uncached-copy-performance PASS(2, M40) DMESG_WARN(1, M40)
Note: You need to pay more attention to line start with '*'
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prev parent reply other threads:[~2015-01-31 17:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-29 12:42 [PATCH] drm/i915/skl: Enable eDRAM for gen9 as well Damien Lespiau
2015-01-30 16:23 ` Daniel Vetter
2015-02-02 15:08 ` Damien Lespiau
2015-01-30 17:10 ` Ville Syrjälä
2015-01-31 17:30 ` shuang.he [this message]
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