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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Jimi Xenidis <jimix@pobox.com>
Cc: kvm-ppc-devel@lists.sourceforge.net, linuxppc-dev@ozlabs.org
Subject: Re: [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x
Date: Fri, 04 Apr 2008 18:47:04 +0000	[thread overview]
Message-ID: <851f4822aac18c820ac2b5755ad3c364@kernel.crashing.org> (raw)
In-Reply-To: <835D8B13-CF90-4013-A172-8243BF93DE52@pobox.com>

>> +	msr_save = mfmsr();
>> +	/* set wait state MSR */
>> +	mtmsr(msr_save|MSR_WE|MSR_EE|MSR_CE);
>
> Did we decide to drop MSR_DE?
>
>> +	/* return to initial state */
>> +	mtmsr(msr_save);
>
> It may be my paranoia but I'm pretty sure you need the isync() after
> _both_ mtmsr()s
> Certainly can't hurt.

It hurts because it spreads the paranoia.  Cargo cult.

Please add a comment that explains _why_ you need a context 
synchronising
instruction here.  The POWER ISA 2.05 says that the requirements for
changing the WE bit are implementation dependent, both before and after
the mtmsr, so the safe thing to do would be to use the "big hammer" 
isync
both before and after each of these mtmsrs.  A sync before entering wait
state might be needed as well, dunno.  Either way, comment please :-)


Segher


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WARNING: multiple messages have this Message-ID (diff)
From: Segher Boessenkool <segher@kernel.crashing.org>
To: Jimi Xenidis <jimix@pobox.com>
Cc: kvm-ppc-devel@lists.sourceforge.net, linuxppc-dev@ozlabs.org
Subject: Re: [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms
Date: Fri, 4 Apr 2008 20:47:04 +0200	[thread overview]
Message-ID: <851f4822aac18c820ac2b5755ad3c364@kernel.crashing.org> (raw)
In-Reply-To: <835D8B13-CF90-4013-A172-8243BF93DE52@pobox.com>

>> +	msr_save = mfmsr();
>> +	/* set wait state MSR */
>> +	mtmsr(msr_save|MSR_WE|MSR_EE|MSR_CE);
>
> Did we decide to drop MSR_DE?
>
>> +	/* return to initial state */
>> +	mtmsr(msr_save);
>
> It may be my paranoia but I'm pretty sure you need the isync() after
> _both_ mtmsr()s
> Certainly can't hurt.

It hurts because it spreads the paranoia.  Cargo cult.

Please add a comment that explains _why_ you need a context 
synchronising
instruction here.  The POWER ISA 2.05 says that the requirements for
changing the WE bit are implementation dependent, both before and after
the mtmsr, so the safe thing to do would be to use the "big hammer" 
isync
both before and after each of these mtmsrs.  A sync before entering wait
state might be needed as well, dunno.  Either way, comment please :-)


Segher

  parent reply	other threads:[~2008-04-04 18:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-04-04  7:06 [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms Jerone Young
2008-04-04  7:06 ` Jerone Young
2008-04-04 12:36 ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x Jimi Xenidis
2008-04-04 12:36   ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms Jimi Xenidis
2008-04-04 15:42   ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for Jerone Young
2008-04-04 15:42     ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms Jerone Young
2008-04-04 15:56     ` [kvm-ppc-devel] Hollis Blanchard
2008-04-04 15:56       ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms Hollis Blanchard
2008-04-08  2:21     ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x Arnd Bergmann
2008-04-08  2:21       ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms Arnd Bergmann
2008-04-08  2:35       ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x Josh Boyer
2008-04-08  2:35         ` [kvm-ppc-devel] [PATCH] [v2] Add idle wait support for 44x platforms Josh Boyer
2008-04-04 18:47   ` Segher Boessenkool [this message]
2008-04-04 18:47     ` Segher Boessenkool

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