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From: Marc Zyngier <maz@kernel.org>
To: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: devicetree@vger.kernel.org, alix.wu@mediatek.com,
	jason@lakedaemon.net, yj.chiang@mediatek.com, daniel@0x0f.com,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	tglx@linutronix.de, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] irqchip: irq-mst: Add MStar interrupt controller support
Date: Wed, 19 Aug 2020 16:24:17 +0100	[thread overview]
Message-ID: <85749ec80ad0b9c85e3984c808d02b9c@kernel.org> (raw)
In-Reply-To: <20200819145525.26315-1-mark-pk.tsai@mediatek.com>

On 2020-08-19 15:55, Mark-PK Tsai wrote:
> From: Marc Zyngier <maz@kernel.org>
> 
>> On 2020-08-19 14:31, Mark-PK Tsai wrote:
>>> From: Marc Zyngier <maz@kernel.org>
>>> 
>>>> > +
>>>> > +static int mst_intc_domain_alloc(struct irq_domain *domain, unsigned
>>>> > int virq,
>>>> > +				 unsigned int nr_irqs, void *data)
>>>> > +{
>>>> > +	int i;
>>>> > +	irq_hw_number_t hwirq;
>>>> > +	struct irq_fwspec parent_fwspec, *fwspec = data;
>>>> > +	struct mst_intc_chip_data *cd = (struct mst_intc_chip_data
>>>> > *)domain->host_data;
>>>> 
>>>> No cast necessary here.
>>>> 
>>>> > +
>>>> > +	/* Not GIC compliant */
>>>> > +	if (fwspec->param_count != 3)
>>>> > +		return -EINVAL;
>>>> > +
>>>> > +	/* No PPI should point to this domain */
>>>> > +	if (fwspec->param[0])
>>>> > +		return -EINVAL;
>>>> > +
>>>> > +	if (fwspec->param[1] >= cd->nr_irqs)
>>>> 
>>>> This condition is bogus, as it doesn't take into account the nr_irqs
>>>> parameter.
>>>> 
>>> 
>>> 
>>> The hwirq number need to be in the irq map range. (property:
>>> mstar,irqs-map-range)
>>> If it's not, it must be incorrect configuration.
>> 
>> I agree. And since you are checking whether the configuration is
>> correct,
>> it'd better be completely correct.
>> 
>>> So how about use the condition as following?
>>> 
>>> if (hwirq >= cd->nr_irqs)
>>> 	return -EINVAL;
>> 
>> Again, this says nothing of the validity of (hwirq + nr_irqs - 1)...
>> 
> 
> How about move this to mst_intc_domain_translate? Then all the 
> irq_fwspec
> point to domain mst_intc should be valid.
> 
> The mst_intc_domain_translate will be as following:
> 
> static int mst_intc_domain_translate(struct irq_domain *d,
> 				     struct irq_fwspec *fwspec,
> 				     unsigned long *hwirq,
> 				     unsigned int *type)
> {
> 	struct mst_intc_chip_data *cd = d->host_data;
> 
> 	if (is_of_node(fwspec->fwnode)) {
> 		if (fwspec->param_count != 3)
> 			return -EINVAL;
> 
> 		/* No PPI should point to this domain */
> 		if (fwspec->param[0] != 0)
> 			return -EINVAL;
> 
> 		if (fwspec->param[1] >= cd->nr_irqs)
> 			return -EINVAL;
> 
> 		*hwirq = fwspec->param[1];
> 		*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
> 		return 0;
> 	}
> 
> 	return -EINVAL;
> }

It would make more sense.

         M.
-- 
Jazz is not dead. It just smells funny...

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: devicetree@vger.kernel.org, alix.wu@mediatek.com,
	jason@lakedaemon.net, yj.chiang@mediatek.com, daniel@0x0f.com,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	tglx@linutronix.de, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] irqchip: irq-mst: Add MStar interrupt controller support
Date: Wed, 19 Aug 2020 16:24:17 +0100	[thread overview]
Message-ID: <85749ec80ad0b9c85e3984c808d02b9c@kernel.org> (raw)
In-Reply-To: <20200819145525.26315-1-mark-pk.tsai@mediatek.com>

On 2020-08-19 15:55, Mark-PK Tsai wrote:
> From: Marc Zyngier <maz@kernel.org>
> 
>> On 2020-08-19 14:31, Mark-PK Tsai wrote:
>>> From: Marc Zyngier <maz@kernel.org>
>>> 
>>>> > +
>>>> > +static int mst_intc_domain_alloc(struct irq_domain *domain, unsigned
>>>> > int virq,
>>>> > +				 unsigned int nr_irqs, void *data)
>>>> > +{
>>>> > +	int i;
>>>> > +	irq_hw_number_t hwirq;
>>>> > +	struct irq_fwspec parent_fwspec, *fwspec = data;
>>>> > +	struct mst_intc_chip_data *cd = (struct mst_intc_chip_data
>>>> > *)domain->host_data;
>>>> 
>>>> No cast necessary here.
>>>> 
>>>> > +
>>>> > +	/* Not GIC compliant */
>>>> > +	if (fwspec->param_count != 3)
>>>> > +		return -EINVAL;
>>>> > +
>>>> > +	/* No PPI should point to this domain */
>>>> > +	if (fwspec->param[0])
>>>> > +		return -EINVAL;
>>>> > +
>>>> > +	if (fwspec->param[1] >= cd->nr_irqs)
>>>> 
>>>> This condition is bogus, as it doesn't take into account the nr_irqs
>>>> parameter.
>>>> 
>>> 
>>> 
>>> The hwirq number need to be in the irq map range. (property:
>>> mstar,irqs-map-range)
>>> If it's not, it must be incorrect configuration.
>> 
>> I agree. And since you are checking whether the configuration is
>> correct,
>> it'd better be completely correct.
>> 
>>> So how about use the condition as following?
>>> 
>>> if (hwirq >= cd->nr_irqs)
>>> 	return -EINVAL;
>> 
>> Again, this says nothing of the validity of (hwirq + nr_irqs - 1)...
>> 
> 
> How about move this to mst_intc_domain_translate? Then all the 
> irq_fwspec
> point to domain mst_intc should be valid.
> 
> The mst_intc_domain_translate will be as following:
> 
> static int mst_intc_domain_translate(struct irq_domain *d,
> 				     struct irq_fwspec *fwspec,
> 				     unsigned long *hwirq,
> 				     unsigned int *type)
> {
> 	struct mst_intc_chip_data *cd = d->host_data;
> 
> 	if (is_of_node(fwspec->fwnode)) {
> 		if (fwspec->param_count != 3)
> 			return -EINVAL;
> 
> 		/* No PPI should point to this domain */
> 		if (fwspec->param[0] != 0)
> 			return -EINVAL;
> 
> 		if (fwspec->param[1] >= cd->nr_irqs)
> 			return -EINVAL;
> 
> 		*hwirq = fwspec->param[1];
> 		*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
> 		return 0;
> 	}
> 
> 	return -EINVAL;
> }

It would make more sense.

         M.
-- 
Jazz is not dead. It just smells funny...

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark-PK Tsai <mark-pk.tsai@mediatek.com>
Cc: alix.wu@mediatek.com, daniel@0x0f.com,
	devicetree@vger.kernel.org, jason@lakedaemon.net,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
	matthias.bgg@gmail.com, robh+dt@kernel.org, tglx@linutronix.de,
	yj.chiang@mediatek.com
Subject: Re: [PATCH 1/2] irqchip: irq-mst: Add MStar interrupt controller support
Date: Wed, 19 Aug 2020 16:24:17 +0100	[thread overview]
Message-ID: <85749ec80ad0b9c85e3984c808d02b9c@kernel.org> (raw)
In-Reply-To: <20200819145525.26315-1-mark-pk.tsai@mediatek.com>

On 2020-08-19 15:55, Mark-PK Tsai wrote:
> From: Marc Zyngier <maz@kernel.org>
> 
>> On 2020-08-19 14:31, Mark-PK Tsai wrote:
>>> From: Marc Zyngier <maz@kernel.org>
>>> 
>>>> > +
>>>> > +static int mst_intc_domain_alloc(struct irq_domain *domain, unsigned
>>>> > int virq,
>>>> > +				 unsigned int nr_irqs, void *data)
>>>> > +{
>>>> > +	int i;
>>>> > +	irq_hw_number_t hwirq;
>>>> > +	struct irq_fwspec parent_fwspec, *fwspec = data;
>>>> > +	struct mst_intc_chip_data *cd = (struct mst_intc_chip_data
>>>> > *)domain->host_data;
>>>> 
>>>> No cast necessary here.
>>>> 
>>>> > +
>>>> > +	/* Not GIC compliant */
>>>> > +	if (fwspec->param_count != 3)
>>>> > +		return -EINVAL;
>>>> > +
>>>> > +	/* No PPI should point to this domain */
>>>> > +	if (fwspec->param[0])
>>>> > +		return -EINVAL;
>>>> > +
>>>> > +	if (fwspec->param[1] >= cd->nr_irqs)
>>>> 
>>>> This condition is bogus, as it doesn't take into account the nr_irqs
>>>> parameter.
>>>> 
>>> 
>>> 
>>> The hwirq number need to be in the irq map range. (property:
>>> mstar,irqs-map-range)
>>> If it's not, it must be incorrect configuration.
>> 
>> I agree. And since you are checking whether the configuration is
>> correct,
>> it'd better be completely correct.
>> 
>>> So how about use the condition as following?
>>> 
>>> if (hwirq >= cd->nr_irqs)
>>> 	return -EINVAL;
>> 
>> Again, this says nothing of the validity of (hwirq + nr_irqs - 1)...
>> 
> 
> How about move this to mst_intc_domain_translate? Then all the 
> irq_fwspec
> point to domain mst_intc should be valid.
> 
> The mst_intc_domain_translate will be as following:
> 
> static int mst_intc_domain_translate(struct irq_domain *d,
> 				     struct irq_fwspec *fwspec,
> 				     unsigned long *hwirq,
> 				     unsigned int *type)
> {
> 	struct mst_intc_chip_data *cd = d->host_data;
> 
> 	if (is_of_node(fwspec->fwnode)) {
> 		if (fwspec->param_count != 3)
> 			return -EINVAL;
> 
> 		/* No PPI should point to this domain */
> 		if (fwspec->param[0] != 0)
> 			return -EINVAL;
> 
> 		if (fwspec->param[1] >= cd->nr_irqs)
> 			return -EINVAL;
> 
> 		*hwirq = fwspec->param[1];
> 		*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
> 		return 0;
> 	}
> 
> 	return -EINVAL;
> }

It would make more sense.

         M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2020-08-19 15:24 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-19  3:42 [PATCH 0/2] Add MStar interrupt controller support Mark-PK Tsai
2020-08-19  3:42 ` Mark-PK Tsai
2020-08-19  3:42 ` Mark-PK Tsai
2020-08-19  3:42 ` [PATCH 1/2] irqchip: irq-mst: " Mark-PK Tsai
2020-08-19  3:42   ` Mark-PK Tsai
2020-08-19  3:42   ` Mark-PK Tsai
2020-08-19  8:14   ` Marc Zyngier
2020-08-19 13:31     ` Mark-PK Tsai
2020-08-19 13:31     ` Mark-PK Tsai
2020-08-19 13:31     ` Mark-PK Tsai
2020-08-19  8:14     ` Marc Zyngier
2020-08-19  8:14     ` Marc Zyngier
2020-08-19 13:42     ` Marc Zyngier
2020-08-19 13:42       ` Marc Zyngier
2020-08-19 13:42       ` Marc Zyngier
2020-08-19 14:55       ` Mark-PK Tsai
2020-08-19 14:55         ` Mark-PK Tsai
2020-08-19 14:55         ` Mark-PK Tsai
2020-08-19 15:24         ` Marc Zyngier [this message]
2020-08-19 15:24           ` Marc Zyngier
2020-08-19 15:24           ` Marc Zyngier
2020-08-19  3:42 ` [PATCH 2/2] dt-bindings: interrupt-controller: Add MStar interrupt controller Mark-PK Tsai
2020-08-19  3:42   ` Mark-PK Tsai
2020-08-19  3:42   ` Mark-PK Tsai
2020-08-25 21:48   ` Rob Herring
2020-08-25 21:48     ` Rob Herring
2020-08-25 21:48     ` Rob Herring
2020-08-26  7:50     ` Mark-PK Tsai
2020-08-26  7:50       ` Mark-PK Tsai
2020-08-26  7:50       ` Mark-PK Tsai
2020-08-19 15:37 ` [PATCH v2 1/2] irqchip: irq-mst: Add MStar interrupt controller support Mark-PK Tsai
2020-08-19 15:37   ` Mark-PK Tsai
2020-08-19 15:37   ` Mark-PK Tsai
2020-08-20 12:36   ` Daniel Palmer
2020-08-20 12:36     ` Daniel Palmer
2020-08-20 12:36     ` Daniel Palmer
2020-08-20 12:47     ` Marc Zyngier
2020-08-20 12:47       ` Marc Zyngier
2020-08-20 12:47       ` Marc Zyngier
2020-09-02  6:59       ` Mark-PK Tsai
2020-09-02  6:59         ` Mark-PK Tsai
2020-09-02  6:59         ` Mark-PK Tsai
2020-08-22  4:48   ` Daniel Palmer
2020-08-22  4:48     ` Daniel Palmer
2020-08-22  4:48     ` Daniel Palmer
2020-08-24  2:36     ` Mark-PK Tsai
2020-08-24  2:36       ` Mark-PK Tsai
2020-08-24  2:36       ` Mark-PK Tsai
2020-08-24  2:48   ` [PATCH] MAINTAINERS: Add maintenance information for MStar Interrupt Controller Mark-PK Tsai
2020-08-24  2:48     ` Mark-PK Tsai
2020-08-24  2:48     ` Mark-PK Tsai

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