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From: Marc Zyngier <maz@kernel.org>
To: Yize Wang <wangyize7@huawei.com>
Cc: <kvmarm@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <oupton@kernel.org>,
	<catalin.marinas@arm.com>, <will@kernel.org>,
	<fuad.tabba@linux.dev>, <joey.gouly@arm.com>,
	<seiden@linux.ibm.com>, <suzuki.poulose@arm.com>,
	<yuzenghui@huawei.com>, <mark.rutland@arm.com>,
	<zhengchuan@huawei.com>, <jiangjiacheng@huawei.com>,
	<yize_w1110@163.com>
Subject: Re: [PATCH 0/2] Batch register access for live migration optimization
Date: Fri, 18 Sep 2026 13:08:45 +0100	[thread overview]
Message-ID: <861paq69te.wl-maz@kernel.org> (raw)
In-Reply-To: <20260918081930.4014735-1-wangyize7@huawei.com>

On Fri, 18 Sep 2026 09:18:13 +0100,
Yize Wang <wangyize7@huawei.com> wrote:
> 
> This series adds batch register access support to KVM/arm64 to reduce
> syscall overhead during VM live migration.
> 
> Currently, QEMU issues one ioctl per register when saving/restoring VGIC
> state. On large VM configurations this means tens of thousands of syscalls,
> where lock acquisition and context switch overhead dominates migration
> downtime. Thus, we provide a batch register method to allow userspace
> read/write multiple distributor and redistributor registers in a single call.
> In this way, we can significantly reduce syscalls and migration downtime.
> 
> Test the VM migration time under pressure conditions.
> The VM specifications for migration are as follows:
> - VM use 4-K page;
> - the number of VCPU is 160;
> - the total memory is 320Gigabit;
> - use 'Redis SET-benchmark' to pressurize VM;
> 
> Performance results (3-run average, ms):
>     | Metric              | Without patch | With patch | Improvement |
>     |---------------------|---------------|------------|-------------|
>     | Migration downtime  |        536    |     321    |     40%     |
>     | Source (total)      |        344    |     230    |     33%     |
>     |   - VGIC put        |        158    |      40    |     75%     |
>     |   - VGIC get        |        120    |      19    |     84%     |
>     | Destination (total) |        192    |      91    |     53%     |
>     |   - VGIC put        |        132    |      27    |     80%     |
> 
> Yize Wang (2):
>   KVM: arm64: Add batch group constant and data structure to UAPI header
>   KVM: arm64: Add VGIC v3 batch register access implementation

Questions:

- Why only the MMIO registers?

- Why not the sysregs?

- Why only the GIC?

- Why not all of the state?

- Where is the corresponding userspace code?

More importantly, since this is about batching system calls:

- Why can't this be done with io_uring instead?

	M.

-- 
Without deviation from the norm, progress is not possible.

  parent reply	other threads:[~2026-09-18 12:08 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-18  8:18 [PATCH 0/2] Batch register access for live migration optimization Yize Wang
2026-09-18  8:18 ` [PATCH 1/2] KVM: arm64: Add batch group constant and data structure to UAPI header Yize Wang
2026-09-18  8:27   ` sashiko-bot
2026-09-18  8:18 ` [PATCH 2/2] KVM: arm64: Add VGIC v3 batch register access implementation Yize Wang
2026-09-18  8:33   ` sashiko-bot
2026-09-18 12:08 ` Marc Zyngier [this message]
2026-09-20 12:12   ` [RESEND][PATCH 0/2] Batch register access for live migration optimization Yize Wang
2026-09-23  7:57     ` Yize Wang
     [not found]   ` <f70c6fe3-e3c5-4912-b4bb-8a418fec4346@huawei.com>
2026-10-03 14:53     ` [PATCH " Marc Zyngier
2026-10-08  8:32       ` Yize Wang
2026-10-08 12:50       ` [RESEND][PATCH " Yize Wang
2026-10-12 11:04         ` Yize Wang
2026-10-12 11:31         ` Marc Zyngier

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