* [PATCH V2] irqchip/gic-v4.1:Check whether indirect table is supported in allocate_vpe_l1_table
@ 2025-09-18 14:15 Nianyao Tang
2025-09-26 8:47 ` Marc Zyngier
0 siblings, 1 reply; 2+ messages in thread
From: Nianyao Tang @ 2025-09-18 14:15 UTC (permalink / raw)
To: maz, tglx, linux-arm-kernel, linux-kernel
Cc: guoyang2, wangwudi, tangnianyao, wangzhou1, jiangkunkun,
guozicheng3
In allocate_vpe_l1_table, it allocates a new vpe table without checking
whether indirect table is supported.
ARM allows vendors to support only flat tables. Let's first check if
indirect tables are supported before using it.
Signed-off-by: Nianyao Tang <tangnianyao@huawei.com>
---
drivers/irqchip/irq-gic-v3-its.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 467cb78435a9..a4d719720e61 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2903,6 +2903,7 @@ static int allocate_vpe_l1_table(void)
unsigned int psz = SZ_64K;
unsigned int np, epp, esz;
struct page *page;
+ bool indirect;
if (!gic_rdists->has_rvpeid)
return 0;
@@ -2937,10 +2938,12 @@ static int allocate_vpe_l1_table(void)
/* First probe the page size */
val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K);
+ val |= GICR_VPROPBASER_4_1_INDIRECT;
gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);
val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER);
gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val);
esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val);
+ indirect = !!(val & GICR_VPROPBASER_4_1_INDIRECT);
switch (gpsz) {
default:
@@ -2973,7 +2976,7 @@ static int allocate_vpe_l1_table(void)
* If we need more than just a single L1 page, flag the table
* as indirect and compute the number of required L1 pages.
*/
- if (epp < ITS_MAX_VPEID) {
+ if (epp < ITS_MAX_VPEID && indirect) {
int nl2;
val |= GICR_VPROPBASER_4_1_INDIRECT;
@@ -2984,7 +2987,8 @@ static int allocate_vpe_l1_table(void)
/* Number of L1 pages to point to the L2 pages */
npg = DIV_ROUND_UP(nl2 * SZ_8, psz);
} else {
- npg = 1;
+ npg = DIV_ROUND_UP(ITS_MAX_VPEID, epp);
+ npg = clamp_val(npg, 1, (GICR_VPROPBASER_4_1_SIZE + 1));
}
val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1);
--
2.33.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH V2] irqchip/gic-v4.1:Check whether indirect table is supported in allocate_vpe_l1_table
2025-09-18 14:15 [PATCH V2] irqchip/gic-v4.1:Check whether indirect table is supported in allocate_vpe_l1_table Nianyao Tang
@ 2025-09-26 8:47 ` Marc Zyngier
0 siblings, 0 replies; 2+ messages in thread
From: Marc Zyngier @ 2025-09-26 8:47 UTC (permalink / raw)
To: Nianyao Tang
Cc: tglx, linux-arm-kernel, linux-kernel, guoyang2, wangwudi,
wangzhou1, jiangkunkun, guozicheng3
On Thu, 18 Sep 2025 15:15:57 +0100,
Nianyao Tang <tangnianyao@huawei.com> wrote:
>
> In allocate_vpe_l1_table, it allocates a new vpe table without checking
> whether indirect table is supported.
> ARM allows vendors to support only flat tables. Let's first check if
> indirect tables are supported before using it.
>
> Signed-off-by: Nianyao Tang <tangnianyao@huawei.com>
As I understand it, this is for the same machines that also requires
[1] and [2] to be able to use vLPIs and vSGIs.
I seriously doubt that we want *any* of it (creating userspace ABI to
deal with a broken design is not something I'm keen on).
Frankly, you should consider disabling GICv4.1 on these machines, and
stick with GICv3 (which I assume works correctly).
Thanks,
M.
[1] https://lore.kernel.org/r/20250825023954.3516381-1-wangzhou1@hisilicon.com
[2] https://lore.kernel.org/r/20250909110615.129179-1-wangzhou1@hisilicon.com
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2025-09-18 14:15 [PATCH V2] irqchip/gic-v4.1:Check whether indirect table is supported in allocate_vpe_l1_table Nianyao Tang
2025-09-26 8:47 ` Marc Zyngier
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