[PATCH v2 09/10] irqchip: ti-sci-inta: Add support for Interrupt Aggregator driver

[marc.zyngier@arm.com (Marc Zyngier)]

Hi Peter,

On Thu, 01 Nov 2018 09:14:15 +0000,
Peter Ujfalusi <peter.ujfalusi@ti.com> wrote:
> 
> Hi Marc,
> 
> On 11/1/18 11:00 AM, Marc Zyngier wrote:
> > On Thu, 01 Nov 2018 07:55:12 +0000,
> > Peter Ujfalusi <peter.ujfalusi@ti.com> wrote:
> >>
> >> Lokesh,
> >>
> >> On 10/29/18 3:04 PM, Lokesh Vutla wrote:
> >>>>> With the above information, linux should send a message to
> >>>>> system-controller using TISCI protocol. After policing the given
> >>>>> information, system-controller does the following:
> >>>>> - Attaches the interrupt(INTA input) to the device resource index
> >>>>> - Muxes the interrupt(INTA input) to corresponding vint(INTA output)
> >>>>> - Muxes the vint(INTR input) to GIC irq(INTR output).
> >>>>
> >>>> Isn't there a 1:1 mapping between *used* INTR inputs and outputs?
> >>>> Since INTR is a router, there is no real muxing. I assume that the
> >>>> third point above is just a copy-paste error.
> >>>
> >>> Right, my bad. INTR is just a router and no read muxing.
> >>
> >> INTR can mux M interrupt inputs to N interrupt outputs.
> >> One selects which interrupt input is outputted on the given interrupt
> >> output.
> >> It is perfectly valid (but not sane) to select the same interrupt input
> >> to be routed to _all_ interrupt output for example.
> >>
> >> Not sure if we are going to use this for anything but 1:1 mapping, but
> >> might worth keeping in mind...
> > 
> > It's not obvious how you'd use this "feature". Interrupt replicator,
> > should one of the output be tied to another part of the system? Or
> > maybe that's just the result of reusing some generic block...
> 
> I think the intention is that different virtualized OS would got
> assigned with different range of NAVSS GIC irqs and there might be a
> case when more than one virtualized environment need to get a GIC irq
> for the same virt. Timer interrupts comes to mind first, but there could
> be other cases when the same virt should trigger on multiple GIC line.

That would be strange. SPIs seen by a guest are always virtual, and
the hypervisor must handle the physical interrupt to inject the
virtual counterpart. By duplicating the interrupt, you double the
overhead at the hypervisor level. It would be much cheaper to just
inject the interrupt twice.

On top of that, this only works for edge interrupts, and breaks badly
for level signalling: who talks to the device to lower the line?

Thanks,

	M.

-- 
Jazz is not dead, it just smell funny.