* [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() @ 2025-06-25 8:47 Wei-Lin Chang 2025-06-25 16:45 ` Marc Zyngier 2025-06-26 7:52 ` Marc Zyngier 0 siblings, 2 replies; 4+ messages in thread From: Wei-Lin Chang @ 2025-06-25 8:47 UTC (permalink / raw) To: linux-arm-kernel, kvmarm, linux-kernel Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas, Wei-Lin Chang, Will Deacon, Jintack Lim, Christoffer Dall The state of the vcpu's MI line should be asserted when its ICH_HCR_EL2.En is set and ICH_MISR_EL2 is non-zero. Using bitwise AND (&=) directly for this calculation will not give us the correct result when the LSB of the vcpu's ICH_MISR_EL2 isn't set. Correct this by first adjusting the return value of vgic_v3_get_misr() into 1 if it is non-zero. Signed-off-by: Wei-Lin Chang <r09922117@csie.ntu.edu.tw> --- arch/arm64/kvm/vgic/vgic-v3-nested.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c index 4f6954c30674..ebffad632fd2 100644 --- a/arch/arm64/kvm/vgic/vgic-v3-nested.c +++ b/arch/arm64/kvm/vgic/vgic-v3-nested.c @@ -400,7 +400,7 @@ void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu) level = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En; if (level) - level &= vgic_v3_get_misr(vcpu); + level &= !!vgic_v3_get_misr(vcpu); kvm_vgic_inject_irq(vcpu->kvm, vcpu, vcpu->kvm->arch.vgic.mi_intid, level, vcpu); } -- 2.49.0 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() 2025-06-25 8:47 [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() Wei-Lin Chang @ 2025-06-25 16:45 ` Marc Zyngier 2025-06-26 5:57 ` Wei-Lin Chang 2025-06-26 7:52 ` Marc Zyngier 1 sibling, 1 reply; 4+ messages in thread From: Marc Zyngier @ 2025-06-25 16:45 UTC (permalink / raw) To: Wei-Lin Chang Cc: linux-arm-kernel, kvmarm, linux-kernel, Oliver Upton, Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas, Will Deacon, Jintack Lim, Christoffer Dall On Wed, 25 Jun 2025 09:47:09 +0100, Wei-Lin Chang <r09922117@csie.ntu.edu.tw> wrote: > > The state of the vcpu's MI line should be asserted when its > ICH_HCR_EL2.En is set and ICH_MISR_EL2 is non-zero. Using bitwise AND > (&=) directly for this calculation will not give us the correct result > when the LSB of the vcpu's ICH_MISR_EL2 isn't set. Correct this by first > adjusting the return value of vgic_v3_get_misr() into 1 if it is > non-zero. > > Signed-off-by: Wei-Lin Chang <r09922117@csie.ntu.edu.tw> > --- > arch/arm64/kvm/vgic/vgic-v3-nested.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c > index 4f6954c30674..ebffad632fd2 100644 > --- a/arch/arm64/kvm/vgic/vgic-v3-nested.c > +++ b/arch/arm64/kvm/vgic/vgic-v3-nested.c > @@ -400,7 +400,7 @@ void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu) > > level = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En; > if (level) > - level &= vgic_v3_get_misr(vcpu); > + level &= !!vgic_v3_get_misr(vcpu); > kvm_vgic_inject_irq(vcpu->kvm, vcpu, > vcpu->kvm->arch.vgic.mi_intid, level, vcpu); > } Very well spotted, once more. Where were you when I posted all these patches? ;-) We could make it even clearer with this: diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c index a50fb7e6841f7..679aafe77de2e 100644 --- a/arch/arm64/kvm/vgic/vgic-v3-nested.c +++ b/arch/arm64/kvm/vgic/vgic-v3-nested.c @@ -401,9 +401,7 @@ void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu) { bool level; - level = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En; - if (level) - level &= vgic_v3_get_misr(vcpu); + level = (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En) && vgic_v3_get_misr(vcpu); kvm_vgic_inject_irq(vcpu->kvm, vcpu, vcpu->kvm->arch.vgic.mi_intid, level, vcpu); } If you're OK with it, I'll use this, keeping your authorship of course. Thanks, M. -- Without deviation from the norm, progress is not possible. ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() 2025-06-25 16:45 ` Marc Zyngier @ 2025-06-26 5:57 ` Wei-Lin Chang 0 siblings, 0 replies; 4+ messages in thread From: Wei-Lin Chang @ 2025-06-26 5:57 UTC (permalink / raw) To: Marc Zyngier Cc: linux-arm-kernel, kvmarm, linux-kernel, Oliver Upton, Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas, Will Deacon, Jintack Lim, Christoffer Dall On Wed, Jun 25, 2025 at 05:45:06PM +0100, Marc Zyngier wrote: > On Wed, 25 Jun 2025 09:47:09 +0100, > Wei-Lin Chang <r09922117@csie.ntu.edu.tw> wrote: > > > > The state of the vcpu's MI line should be asserted when its > > ICH_HCR_EL2.En is set and ICH_MISR_EL2 is non-zero. Using bitwise AND > > (&=) directly for this calculation will not give us the correct result > > when the LSB of the vcpu's ICH_MISR_EL2 isn't set. Correct this by first > > adjusting the return value of vgic_v3_get_misr() into 1 if it is > > non-zero. > > > > Signed-off-by: Wei-Lin Chang <r09922117@csie.ntu.edu.tw> > > --- > > arch/arm64/kvm/vgic/vgic-v3-nested.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c > > index 4f6954c30674..ebffad632fd2 100644 > > --- a/arch/arm64/kvm/vgic/vgic-v3-nested.c > > +++ b/arch/arm64/kvm/vgic/vgic-v3-nested.c > > @@ -400,7 +400,7 @@ void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu) > > > > level = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En; > > if (level) > > - level &= vgic_v3_get_misr(vcpu); > > + level &= !!vgic_v3_get_misr(vcpu); > > kvm_vgic_inject_irq(vcpu->kvm, vcpu, > > vcpu->kvm->arch.vgic.mi_intid, level, vcpu); > > } > > Very well spotted, once more. Where were you when I posted all these > patches? ;-) Thanks ;) > > We could make it even clearer with this: > > diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c > index a50fb7e6841f7..679aafe77de2e 100644 > --- a/arch/arm64/kvm/vgic/vgic-v3-nested.c > +++ b/arch/arm64/kvm/vgic/vgic-v3-nested.c > @@ -401,9 +401,7 @@ void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu) > { > bool level; > > - level = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En; > - if (level) > - level &= vgic_v3_get_misr(vcpu); > + level = (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En) && vgic_v3_get_misr(vcpu); > kvm_vgic_inject_irq(vcpu->kvm, vcpu, > vcpu->kvm->arch.vgic.mi_intid, level, vcpu); > } > > If you're OK with it, I'll use this, keeping your authorship of > course. Yes this is more straightforward, with this the commit message should be rephrased too. I'm ok with keeping my authorship but really feel free to adjust if you think some other credit is more appropriate. I'm just glad that I'm able to help a little :) Thanks, Wei-Lin Chang > > Thanks, > > M. > > -- > Without deviation from the norm, progress is not possible. ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() 2025-06-25 8:47 [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() Wei-Lin Chang 2025-06-25 16:45 ` Marc Zyngier @ 2025-06-26 7:52 ` Marc Zyngier 1 sibling, 0 replies; 4+ messages in thread From: Marc Zyngier @ 2025-06-26 7:52 UTC (permalink / raw) To: linux-arm-kernel, kvmarm, linux-kernel, Wei-Lin Chang Cc: Oliver Upton, Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas, Will Deacon, Jintack Lim, Christoffer Dall On Wed, 25 Jun 2025 16:47:09 +0800, Wei-Lin Chang wrote: > The state of the vcpu's MI line should be asserted when its > ICH_HCR_EL2.En is set and ICH_MISR_EL2 is non-zero. Using bitwise AND > (&=) directly for this calculation will not give us the correct result > when the LSB of the vcpu's ICH_MISR_EL2 isn't set. Correct this by first > adjusting the return value of vgic_v3_get_misr() into 1 if it is > non-zero. > > [...] Applied to fixes, thanks! [1/1] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() commit: af040a9a296044fd4b748786c2516f172a7617f1 Cheers, M. -- Without deviation from the norm, progress is not possible. ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2025-06-26 7:52 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-06-25 8:47 [PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi() Wei-Lin Chang 2025-06-25 16:45 ` Marc Zyngier 2025-06-26 5:57 ` Wei-Lin Chang 2025-06-26 7:52 ` Marc Zyngier
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.