* [PATCH v5 1/5] Documentation: Add device tree binding for Goldfish PIC driver
2017-10-20 14:33 [PATCH v5 0/5] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
@ 2017-10-20 14:33 ` Aleksandar Markovic
2017-10-27 3:08 ` Rob Herring
2017-10-20 14:33 ` [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add " Aleksandar Markovic
` (3 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Aleksandar Markovic @ 2017-10-20 14:33 UTC (permalink / raw)
To: linux-mips
Cc: Miodrag Dinic, Goran Ferenc, Aleksandar Markovic, David S. Miller,
devicetree, Douglas Leung, Greg Kroah-Hartman, James Hogan,
Jason Cooper, linux-kernel, Marc Zyngier, Mark Rutland,
Mauro Carvalho Chehab, Paul Burton, Petar Jovanovic,
Raghu Gandham, Randy Dunlap, Rob Herring, Thomas Gleixner
From: Miodrag Dinic <miodrag.dinic@mips.com>
Add documentation for DT binding of Goldfish PIC driver. The compatible
string used by OS for binding the driver is "google,goldfish-pic".
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
.../interrupt-controller/google,goldfish-pic.txt | 30 ++++++++++++++++++++++
MAINTAINERS | 5 ++++
2 files changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
new file mode 100644
index 0000000..295bf97
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
@@ -0,0 +1,30 @@
+Android Goldfish PIC
+
+Android Goldfish programmable interrupt device used by Android
+emulator.
+
+Required properties:
+
+- compatible : should contain "google,goldfish-pic"
+- reg : <registers mapping>
+- interrupts : <interrupt mapping>
+
+Example for mips when used in cascade mode:
+
+ cpuintc {
+ #interrupt-cells = <0x1>;
+ #address-cells = <0>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
+
+ goldfish_pic@1f000000 {
+ compatible = "google,goldfish-pic";
+ reg = <0x1f000000 0x0 0x1000>;
+
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <0x2>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 4a3de82..4d5108f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -872,6 +872,11 @@ S: Supported
F: drivers/android/
F: drivers/staging/android/
+ANDROID GOLDFISH PIC DRIVER
+M: Miodrag Dinic <miodrag.dinic@mips.com>
+S: Supported
+F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
+
ANDROID GOLDFISH RTC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
S: Supported
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v5 1/5] Documentation: Add device tree binding for Goldfish PIC driver
2017-10-20 14:33 ` [PATCH v5 1/5] Documentation: Add device tree binding for Goldfish PIC driver Aleksandar Markovic
@ 2017-10-27 3:08 ` Rob Herring
0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2017-10-27 3:08 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: linux-mips, Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, devicetree, Douglas Leung, Greg Kroah-Hartman,
James Hogan, Jason Cooper, linux-kernel, Marc Zyngier,
Mark Rutland, Mauro Carvalho Chehab, Paul Burton, Petar Jovanovic,
Raghu Gandham, Randy Dunlap, Thomas Gleixner
On Fri, Oct 20, 2017 at 04:33:34PM +0200, Aleksandar Markovic wrote:
> From: Miodrag Dinic <miodrag.dinic@mips.com>
>
> Add documentation for DT binding of Goldfish PIC driver. The compatible
> string used by OS for binding the driver is "google,goldfish-pic".
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
> ---
> .../interrupt-controller/google,goldfish-pic.txt | 30 ++++++++++++++++++++++
> MAINTAINERS | 5 ++++
> 2 files changed, 35 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
> new file mode 100644
> index 0000000..295bf97
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
> @@ -0,0 +1,30 @@
> +Android Goldfish PIC
> +
> +Android Goldfish programmable interrupt device used by Android
> +emulator.
> +
> +Required properties:
> +
> +- compatible : should contain "google,goldfish-pic"
> +- reg : <registers mapping>
> +- interrupts : <interrupt mapping>
> +
> +Example for mips when used in cascade mode:
> +
> + cpuintc {
> + #interrupt-cells = <0x1>;
> + #address-cells = <0>;
> + interrupt-controller;
> + compatible = "mti,cpu-interrupt-controller";
> + };
> +
> + goldfish_pic@1f000000 {
interrupt-controller@...
With that,
Acked-by: Rob Herring <robh@kernel.org>
> + compatible = "google,goldfish-pic";
> + reg = <0x1f000000 0x0 0x1000>;
> +
> + interrupt-controller;
> + #interrupt-cells = <0x1>;
> +
> + interrupt-parent = <&cpuintc>;
> + interrupts = <0x2>;
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4a3de82..4d5108f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -872,6 +872,11 @@ S: Supported
> F: drivers/android/
> F: drivers/staging/android/
>
> +ANDROID GOLDFISH PIC DRIVER
> +M: Miodrag Dinic <miodrag.dinic@mips.com>
> +S: Supported
> +F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
> +
> ANDROID GOLDFISH RTC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> S: Supported
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add Goldfish PIC driver
2017-10-20 14:33 [PATCH v5 0/5] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
2017-10-20 14:33 ` [PATCH v5 1/5] Documentation: Add device tree binding for Goldfish PIC driver Aleksandar Markovic
@ 2017-10-20 14:33 ` Aleksandar Markovic
2017-10-23 8:20 ` Marc Zyngier
2017-10-20 14:33 ` [PATCH v5 3/5] Documentation: Add device tree binding for Goldfish FB driver Aleksandar Markovic
` (2 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Aleksandar Markovic @ 2017-10-20 14:33 UTC (permalink / raw)
To: linux-mips
Cc: Miodrag Dinic, Goran Ferenc, Aleksandar Markovic, David S. Miller,
Douglas Leung, Greg Kroah-Hartman, James Hogan, Jason Cooper,
linux-kernel, Marc Zyngier, Mauro Carvalho Chehab, Paul Burton,
Petar Jovanovic, Raghu Gandham, Randy Dunlap, Thomas Gleixner
From: Miodrag Dinic <miodrag.dinic@mips.com>
Add device driver for a virtual programmable interrupt controller
The virtual PIC is designed as a device tree-based interrupt controller.
The compatible string used by OS for binding the driver is
"google,goldfish-pic".
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
MAINTAINERS | 1 +
drivers/irqchip/Kconfig | 8 +++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-goldfish-pic.c | 131 +++++++++++++++++++++++++++++++++++++
4 files changed, 141 insertions(+)
create mode 100644 drivers/irqchip/irq-goldfish-pic.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 4d5108f..f1be016 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -876,6 +876,7 @@ ANDROID GOLDFISH PIC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
S: Supported
F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
+F: drivers/irqchip/irq-goldfish-pic.c
ANDROID GOLDFISH RTC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 9d8a1dd..712b561 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -321,3 +321,11 @@ config IRQ_UNIPHIER_AIDET
select IRQ_DOMAIN_HIERARCHY
help
Support for the UniPhier AIDET (ARM Interrupt Detector).
+
+config GOLDFISH_PIC
+ bool "Goldfish programmable interrupt controller"
+ depends on MIPS && (GOLDFISH || COMPILE_TEST)
+ select IRQ_DOMAIN
+ help
+ Say yes here to enable Goldfish interrupt controller driver used
+ for Goldfish based virtual platforms.
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 845abc1..0e7a224 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -79,3 +79,4 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o
obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
+obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
diff --git a/drivers/irqchip/irq-goldfish-pic.c b/drivers/irqchip/irq-goldfish-pic.c
new file mode 100644
index 0000000..d8b5277
--- /dev/null
+++ b/drivers/irqchip/irq-goldfish-pic.c
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2017 Imagination Technologies Ltd. All rights reserved
+ * Author: Miodrag Dinic <miodrag.dinic@imgtec.com>
+ *
+ * This file implements interrupt controller driver for MIPS Goldfish PIC.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#define GFPIC_NR_IRQS 32
+
+/* 8..39 Cascaded Goldfish PIC interrupts */
+#define GFPIC_IRQ_BASE 8
+
+#define GFPIC_REG_IRQ_PENDING 0x04
+#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
+#define GFPIC_REG_IRQ_DISABLE 0x0c
+#define GFPIC_REG_IRQ_ENABLE 0x10
+
+struct goldfish_pic_data {
+ void __iomem *base;
+ struct irq_domain *irq_domain;
+};
+
+static irqreturn_t goldfish_pic_cascade(int irq, void *data)
+{
+ struct goldfish_pic_data *gfpic = irq_get_handler_data(irq);
+ u32 hwirq;
+ u32 virq;
+
+ hwirq = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
+
+ virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
+ generic_handle_irq(virq);
+
+ return IRQ_HANDLED;
+}
+
+static const struct irq_domain_ops goldfish_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static struct irqaction cascade = {
+ .handler = goldfish_pic_cascade,
+ .name = "Goldfish PIC cascade",
+};
+
+static int __init goldfish_pic_of_init(struct device_node *of_node,
+ struct device_node *parent)
+{
+ struct goldfish_pic_data *gfpic;
+ struct irq_chip_generic *gc;
+ struct irq_chip_type *ct;
+ unsigned int parent_irq;
+ int ret = 0;
+
+ gfpic = kzalloc(sizeof(*gfpic), GFP_KERNEL);
+ if (!gfpic) {
+ ret = -ENOMEM;
+ goto out_err;
+ }
+
+ parent_irq = irq_of_parse_and_map(of_node, 0);
+ if (!parent_irq) {
+ pr_err("Failed to map Goldfish PIC parent IRQ\n");
+ ret = -EINVAL;
+ goto out_free;
+ }
+
+ ret = irq_set_handler_data(parent_irq, gfpic);
+ if (ret)
+ goto out_unmap_irq;
+
+ gfpic->base = of_iomap(of_node, 0);
+ if (!gfpic->base) {
+ pr_err("Failed to map Goldfish PIC base\n");
+ ret = -ENOMEM;
+ goto out_unmap_irq;
+ }
+
+ /* Mask interrupts. */
+ writel(1, gfpic->base + GFPIC_REG_IRQ_DISABLE_ALL);
+
+ gc = irq_alloc_generic_chip("GFPIC", 1, GFPIC_IRQ_BASE, gfpic->base,
+ handle_level_irq);
+
+ ct = gc->chip_types;
+ ct->regs.enable = GFPIC_REG_IRQ_ENABLE;
+ ct->regs.disable = GFPIC_REG_IRQ_DISABLE;
+ ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
+ ct->chip.irq_mask = irq_gc_mask_disable_reg;
+
+ irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0, 0,
+ IRQ_NOPROBE | IRQ_LEVEL);
+
+ gfpic->irq_domain = irq_domain_add_legacy(of_node, GFPIC_NR_IRQS,
+ GFPIC_IRQ_BASE, 0,
+ &goldfish_irq_domain_ops,
+ NULL);
+ if (!gfpic->irq_domain) {
+ pr_err("Failed to add irqdomain for Goldfish PIC\n");
+ ret = -EINVAL;
+ goto out_iounmap;
+ }
+
+ setup_irq(parent_irq, &cascade);
+
+ pr_info("Successfully registered Goldfish PIC\n");
+ return 0;
+
+out_iounmap:
+ iounmap(gfpic->base);
+out_unmap_irq:
+ irq_dispose_mapping(parent_irq);
+out_free:
+ kfree(gfpic);
+out_err:
+ return ret;
+}
+
+IRQCHIP_DECLARE(google_gf_pic, "google,goldfish-pic", goldfish_pic_of_init);
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add Goldfish PIC driver
@ 2017-10-23 8:20 ` Marc Zyngier
0 siblings, 0 replies; 13+ messages in thread
From: Marc Zyngier @ 2017-10-23 8:20 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: linux-mips, Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, Douglas Leung, Greg Kroah-Hartman, James Hogan,
Jason Cooper, linux-kernel, Mauro Carvalho Chehab, Paul Burton,
Petar Jovanovic, Raghu Gandham, Randy Dunlap, Thomas Gleixner
On Fri, Oct 20 2017 at 4:33:35 pm BST, Aleksandar Markovic <aleksandar.markovic@rt-rk.com> wrote:
> From: Miodrag Dinic <miodrag.dinic@mips.com>
>
> Add device driver for a virtual programmable interrupt controller
>
> The virtual PIC is designed as a device tree-based interrupt controller.
>
> The compatible string used by OS for binding the driver is
> "google,goldfish-pic".
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
> ---
> MAINTAINERS | 1 +
> drivers/irqchip/Kconfig | 8 +++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-goldfish-pic.c | 131 +++++++++++++++++++++++++++++++++++++
> 4 files changed, 141 insertions(+)
> create mode 100644 drivers/irqchip/irq-goldfish-pic.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4d5108f..f1be016 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -876,6 +876,7 @@ ANDROID GOLDFISH PIC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> S: Supported
> F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
> +F: drivers/irqchip/irq-goldfish-pic.c
>
> ANDROID GOLDFISH RTC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 9d8a1dd..712b561 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -321,3 +321,11 @@ config IRQ_UNIPHIER_AIDET
> select IRQ_DOMAIN_HIERARCHY
> help
> Support for the UniPhier AIDET (ARM Interrupt Detector).
> +
> +config GOLDFISH_PIC
> + bool "Goldfish programmable interrupt controller"
> + depends on MIPS && (GOLDFISH || COMPILE_TEST)
> + select IRQ_DOMAIN
> + help
> + Say yes here to enable Goldfish interrupt controller driver used
> + for Goldfish based virtual platforms.
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 845abc1..0e7a224 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -79,3 +79,4 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o
> obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
> obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
> obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
> +obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
> diff --git a/drivers/irqchip/irq-goldfish-pic.c b/drivers/irqchip/irq-goldfish-pic.c
> new file mode 100644
> index 0000000..d8b5277
> --- /dev/null
> +++ b/drivers/irqchip/irq-goldfish-pic.c
> @@ -0,0 +1,131 @@
> +/*
> + * Copyright (C) 2017 Imagination Technologies Ltd. All rights reserved
> + * Author: Miodrag Dinic <miodrag.dinic@imgtec.com>
> + *
> + * This file implements interrupt controller driver for MIPS Goldfish PIC.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/irqchip.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
> +#define GFPIC_NR_IRQS 32
> +
> +/* 8..39 Cascaded Goldfish PIC interrupts */
> +#define GFPIC_IRQ_BASE 8
> +
> +#define GFPIC_REG_IRQ_PENDING 0x04
> +#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
> +#define GFPIC_REG_IRQ_DISABLE 0x0c
> +#define GFPIC_REG_IRQ_ENABLE 0x10
> +
> +struct goldfish_pic_data {
> + void __iomem *base;
> + struct irq_domain *irq_domain;
> +};
> +
> +static irqreturn_t goldfish_pic_cascade(int irq, void *data)
> +{
> + struct goldfish_pic_data *gfpic = irq_get_handler_data(irq);
> + u32 hwirq;
> + u32 virq;
> +
> + hwirq = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
> +
> + virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
> + generic_handle_irq(virq);
> +
> + return IRQ_HANDLED;
> +}
This is not how we implement cascaded (chained) interrupt
controllers. See existing examples everywhere in the irqchip directory.
> +
> +static const struct irq_domain_ops goldfish_irq_domain_ops = {
> + .xlate = irq_domain_xlate_onecell,
> +};
> +
> +static struct irqaction cascade = {
> + .handler = goldfish_pic_cascade,
> + .name = "Goldfish PIC cascade",
> +};
> +
> +static int __init goldfish_pic_of_init(struct device_node *of_node,
> + struct device_node *parent)
> +{
> + struct goldfish_pic_data *gfpic;
> + struct irq_chip_generic *gc;
> + struct irq_chip_type *ct;
> + unsigned int parent_irq;
> + int ret = 0;
> +
> + gfpic = kzalloc(sizeof(*gfpic), GFP_KERNEL);
> + if (!gfpic) {
> + ret = -ENOMEM;
> + goto out_err;
> + }
> +
> + parent_irq = irq_of_parse_and_map(of_node, 0);
> + if (!parent_irq) {
> + pr_err("Failed to map Goldfish PIC parent IRQ\n");
> + ret = -EINVAL;
> + goto out_free;
> + }
> +
> + ret = irq_set_handler_data(parent_irq, gfpic);
> + if (ret)
> + goto out_unmap_irq;
> +
> + gfpic->base = of_iomap(of_node, 0);
> + if (!gfpic->base) {
> + pr_err("Failed to map Goldfish PIC base\n");
> + ret = -ENOMEM;
> + goto out_unmap_irq;
> + }
> +
> + /* Mask interrupts. */
> + writel(1, gfpic->base + GFPIC_REG_IRQ_DISABLE_ALL);
> +
> + gc = irq_alloc_generic_chip("GFPIC", 1, GFPIC_IRQ_BASE, gfpic->base,
> + handle_level_irq);
> +
> + ct = gc->chip_types;
> + ct->regs.enable = GFPIC_REG_IRQ_ENABLE;
> + ct->regs.disable = GFPIC_REG_IRQ_DISABLE;
> + ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
> + ct->chip.irq_mask = irq_gc_mask_disable_reg;
> +
> + irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0, 0,
> + IRQ_NOPROBE | IRQ_LEVEL);
> +
> + gfpic->irq_domain = irq_domain_add_legacy(of_node, GFPIC_NR_IRQS,
> + GFPIC_IRQ_BASE, 0,
> + &goldfish_irq_domain_ops,
> + NULL);
> + if (!gfpic->irq_domain) {
> + pr_err("Failed to add irqdomain for Goldfish PIC\n");
> + ret = -EINVAL;
> + goto out_iounmap;
> + }
> +
> + setup_irq(parent_irq, &cascade);
> +
> + pr_info("Successfully registered Goldfish PIC\n");
> + return 0;
> +
> +out_iounmap:
> + iounmap(gfpic->base);
> +out_unmap_irq:
> + irq_dispose_mapping(parent_irq);
> +out_free:
> + kfree(gfpic);
> +out_err:
> + return ret;
> +}
> +
> +IRQCHIP_DECLARE(google_gf_pic, "google,goldfish-pic", goldfish_pic_of_init);
It otherwise looks much better than the previous versions.
Thanks,
M.
--
Jazz is not dead. It just smells funny.
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add Goldfish PIC driver
@ 2017-10-23 8:20 ` Marc Zyngier
0 siblings, 0 replies; 13+ messages in thread
From: Marc Zyngier @ 2017-10-23 8:20 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: linux-mips, Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, Douglas Leung, Greg Kroah-Hartman, James Hogan,
Jason Cooper, linux-kernel, Mauro Carvalho Chehab, Paul Burton,
Petar Jovanovic, Raghu Gandham, Randy Dunlap, Thomas Gleixner
On Fri, Oct 20 2017 at 4:33:35 pm BST, Aleksandar Markovic <aleksandar.markovic@rt-rk.com> wrote:
> From: Miodrag Dinic <miodrag.dinic@mips.com>
>
> Add device driver for a virtual programmable interrupt controller
>
> The virtual PIC is designed as a device tree-based interrupt controller.
>
> The compatible string used by OS for binding the driver is
> "google,goldfish-pic".
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
> ---
> MAINTAINERS | 1 +
> drivers/irqchip/Kconfig | 8 +++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-goldfish-pic.c | 131 +++++++++++++++++++++++++++++++++++++
> 4 files changed, 141 insertions(+)
> create mode 100644 drivers/irqchip/irq-goldfish-pic.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4d5108f..f1be016 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -876,6 +876,7 @@ ANDROID GOLDFISH PIC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> S: Supported
> F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
> +F: drivers/irqchip/irq-goldfish-pic.c
>
> ANDROID GOLDFISH RTC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 9d8a1dd..712b561 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -321,3 +321,11 @@ config IRQ_UNIPHIER_AIDET
> select IRQ_DOMAIN_HIERARCHY
> help
> Support for the UniPhier AIDET (ARM Interrupt Detector).
> +
> +config GOLDFISH_PIC
> + bool "Goldfish programmable interrupt controller"
> + depends on MIPS && (GOLDFISH || COMPILE_TEST)
> + select IRQ_DOMAIN
> + help
> + Say yes here to enable Goldfish interrupt controller driver used
> + for Goldfish based virtual platforms.
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 845abc1..0e7a224 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -79,3 +79,4 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o
> obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
> obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
> obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
> +obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
> diff --git a/drivers/irqchip/irq-goldfish-pic.c b/drivers/irqchip/irq-goldfish-pic.c
> new file mode 100644
> index 0000000..d8b5277
> --- /dev/null
> +++ b/drivers/irqchip/irq-goldfish-pic.c
> @@ -0,0 +1,131 @@
> +/*
> + * Copyright (C) 2017 Imagination Technologies Ltd. All rights reserved
> + * Author: Miodrag Dinic <miodrag.dinic@imgtec.com>
> + *
> + * This file implements interrupt controller driver for MIPS Goldfish PIC.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/irqchip.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
> +#define GFPIC_NR_IRQS 32
> +
> +/* 8..39 Cascaded Goldfish PIC interrupts */
> +#define GFPIC_IRQ_BASE 8
> +
> +#define GFPIC_REG_IRQ_PENDING 0x04
> +#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
> +#define GFPIC_REG_IRQ_DISABLE 0x0c
> +#define GFPIC_REG_IRQ_ENABLE 0x10
> +
> +struct goldfish_pic_data {
> + void __iomem *base;
> + struct irq_domain *irq_domain;
> +};
> +
> +static irqreturn_t goldfish_pic_cascade(int irq, void *data)
> +{
> + struct goldfish_pic_data *gfpic = irq_get_handler_data(irq);
> + u32 hwirq;
> + u32 virq;
> +
> + hwirq = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
> +
> + virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
> + generic_handle_irq(virq);
> +
> + return IRQ_HANDLED;
> +}
This is not how we implement cascaded (chained) interrupt
controllers. See existing examples everywhere in the irqchip directory.
> +
> +static const struct irq_domain_ops goldfish_irq_domain_ops = {
> + .xlate = irq_domain_xlate_onecell,
> +};
> +
> +static struct irqaction cascade = {
> + .handler = goldfish_pic_cascade,
> + .name = "Goldfish PIC cascade",
> +};
> +
> +static int __init goldfish_pic_of_init(struct device_node *of_node,
> + struct device_node *parent)
> +{
> + struct goldfish_pic_data *gfpic;
> + struct irq_chip_generic *gc;
> + struct irq_chip_type *ct;
> + unsigned int parent_irq;
> + int ret = 0;
> +
> + gfpic = kzalloc(sizeof(*gfpic), GFP_KERNEL);
> + if (!gfpic) {
> + ret = -ENOMEM;
> + goto out_err;
> + }
> +
> + parent_irq = irq_of_parse_and_map(of_node, 0);
> + if (!parent_irq) {
> + pr_err("Failed to map Goldfish PIC parent IRQ\n");
> + ret = -EINVAL;
> + goto out_free;
> + }
> +
> + ret = irq_set_handler_data(parent_irq, gfpic);
> + if (ret)
> + goto out_unmap_irq;
> +
> + gfpic->base = of_iomap(of_node, 0);
> + if (!gfpic->base) {
> + pr_err("Failed to map Goldfish PIC base\n");
> + ret = -ENOMEM;
> + goto out_unmap_irq;
> + }
> +
> + /* Mask interrupts. */
> + writel(1, gfpic->base + GFPIC_REG_IRQ_DISABLE_ALL);
> +
> + gc = irq_alloc_generic_chip("GFPIC", 1, GFPIC_IRQ_BASE, gfpic->base,
> + handle_level_irq);
> +
> + ct = gc->chip_types;
> + ct->regs.enable = GFPIC_REG_IRQ_ENABLE;
> + ct->regs.disable = GFPIC_REG_IRQ_DISABLE;
> + ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
> + ct->chip.irq_mask = irq_gc_mask_disable_reg;
> +
> + irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0, 0,
> + IRQ_NOPROBE | IRQ_LEVEL);
> +
> + gfpic->irq_domain = irq_domain_add_legacy(of_node, GFPIC_NR_IRQS,
> + GFPIC_IRQ_BASE, 0,
> + &goldfish_irq_domain_ops,
> + NULL);
> + if (!gfpic->irq_domain) {
> + pr_err("Failed to add irqdomain for Goldfish PIC\n");
> + ret = -EINVAL;
> + goto out_iounmap;
> + }
> +
> + setup_irq(parent_irq, &cascade);
> +
> + pr_info("Successfully registered Goldfish PIC\n");
> + return 0;
> +
> +out_iounmap:
> + iounmap(gfpic->base);
> +out_unmap_irq:
> + irq_dispose_mapping(parent_irq);
> +out_free:
> + kfree(gfpic);
> +out_err:
> + return ret;
> +}
> +
> +IRQCHIP_DECLARE(google_gf_pic, "google,goldfish-pic", goldfish_pic_of_init);
It otherwise looks much better than the previous versions.
Thanks,
M.
--
Jazz is not dead. It just smells funny.
^ permalink raw reply [flat|nested] 13+ messages in thread* RE: [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add Goldfish PIC driver
2017-10-23 8:20 ` Marc Zyngier
(?)
@ 2017-10-23 15:01 ` Miodrag Dinic
-1 siblings, 0 replies; 13+ messages in thread
From: Miodrag Dinic @ 2017-10-23 15:01 UTC (permalink / raw)
To: Marc Zyngier, Aleksandar Markovic
Cc: linux-mips@linux-mips.org, Goran Ferenc, Aleksandar Markovic,
David S. Miller, Douglas Leung, Greg Kroah-Hartman, James Hogan,
Jason Cooper, linux-kernel@vger.kernel.org, Mauro Carvalho Chehab,
Paul Burton, Petar Jovanovic, Raghu Gandham, Randy Dunlap,
Thomas Gleixner
Hi Marc,
> > +static irqreturn_t goldfish_pic_cascade(int irq, void *data)
> > +{
> > + struct goldfish_pic_data *gfpic = irq_get_handler_data(irq);
> > + u32 hwirq;
> > + u32 virq;
> > +
> > + hwirq = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
> > +
> > + virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
> > + generic_handle_irq(virq);
> > +
> > + return IRQ_HANDLED;
> > +}
>
> This is not how we implement cascaded (chained) interrupt
> controllers. See existing examples everywhere in the irqchip directory.
It will be addressed in V6.
Thank you.
Kind regards,
Miodrag
________________________________________
From: Marc Zyngier [marc.zyngier@arm.com]
Sent: Monday, October 23, 2017 10:20 AM
To: Aleksandar Markovic
Cc: linux-mips@linux-mips.org; Miodrag Dinic; Goran Ferenc; Aleksandar Markovic; David S. Miller; Douglas Leung; Greg Kroah-Hartman; James Hogan; Jason Cooper; linux-kernel@vger.kernel.org; Mauro Carvalho Chehab; Paul Burton; Petar Jovanovic; Raghu Gandham; Randy Dunlap; Thomas Gleixner
Subject: Re: [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add Goldfish PIC driver
On Fri, Oct 20 2017 at 4:33:35 pm BST, Aleksandar Markovic <aleksandar.markovic@rt-rk.com> wrote:
> From: Miodrag Dinic <miodrag.dinic@mips.com>
>
> Add device driver for a virtual programmable interrupt controller
>
> The virtual PIC is designed as a device tree-based interrupt controller.
>
> The compatible string used by OS for binding the driver is
> "google,goldfish-pic".
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
> ---
> MAINTAINERS | 1 +
> drivers/irqchip/Kconfig | 8 +++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-goldfish-pic.c | 131 +++++++++++++++++++++++++++++++++++++
> 4 files changed, 141 insertions(+)
> create mode 100644 drivers/irqchip/irq-goldfish-pic.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4d5108f..f1be016 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -876,6 +876,7 @@ ANDROID GOLDFISH PIC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> S: Supported
> F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
> +F: drivers/irqchip/irq-goldfish-pic.c
>
> ANDROID GOLDFISH RTC DRIVER
> M: Miodrag Dinic <miodrag.dinic@mips.com>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 9d8a1dd..712b561 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -321,3 +321,11 @@ config IRQ_UNIPHIER_AIDET
> select IRQ_DOMAIN_HIERARCHY
> help
> Support for the UniPhier AIDET (ARM Interrupt Detector).
> +
> +config GOLDFISH_PIC
> + bool "Goldfish programmable interrupt controller"
> + depends on MIPS && (GOLDFISH || COMPILE_TEST)
> + select IRQ_DOMAIN
> + help
> + Say yes here to enable Goldfish interrupt controller driver used
> + for Goldfish based virtual platforms.
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 845abc1..0e7a224 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -79,3 +79,4 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o
> obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
> obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
> obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
> +obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
> diff --git a/drivers/irqchip/irq-goldfish-pic.c b/drivers/irqchip/irq-goldfish-pic.c
> new file mode 100644
> index 0000000..d8b5277
> --- /dev/null
> +++ b/drivers/irqchip/irq-goldfish-pic.c
> @@ -0,0 +1,131 @@
> +/*
> + * Copyright (C) 2017 Imagination Technologies Ltd. All rights reserved
> + * Author: Miodrag Dinic <miodrag.dinic@imgtec.com>
> + *
> + * This file implements interrupt controller driver for MIPS Goldfish PIC.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/irqchip.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
> +#define GFPIC_NR_IRQS 32
> +
> +/* 8..39 Cascaded Goldfish PIC interrupts */
> +#define GFPIC_IRQ_BASE 8
> +
> +#define GFPIC_REG_IRQ_PENDING 0x04
> +#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
> +#define GFPIC_REG_IRQ_DISABLE 0x0c
> +#define GFPIC_REG_IRQ_ENABLE 0x10
> +
> +struct goldfish_pic_data {
> + void __iomem *base;
> + struct irq_domain *irq_domain;
> +};
> +
> +static irqreturn_t goldfish_pic_cascade(int irq, void *data)
> +{
> + struct goldfish_pic_data *gfpic = irq_get_handler_data(irq);
> + u32 hwirq;
> + u32 virq;
> +
> + hwirq = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
> +
> + virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
> + generic_handle_irq(virq);
> +
> + return IRQ_HANDLED;
> +}
This is not how we implement cascaded (chained) interrupt
controllers. See existing examples everywhere in the irqchip directory.
> +
> +static const struct irq_domain_ops goldfish_irq_domain_ops = {
> + .xlate = irq_domain_xlate_onecell,
> +};
> +
> +static struct irqaction cascade = {
> + .handler = goldfish_pic_cascade,
> + .name = "Goldfish PIC cascade",
> +};
> +
> +static int __init goldfish_pic_of_init(struct device_node *of_node,
> + struct device_node *parent)
> +{
> + struct goldfish_pic_data *gfpic;
> + struct irq_chip_generic *gc;
> + struct irq_chip_type *ct;
> + unsigned int parent_irq;
> + int ret = 0;
> +
> + gfpic = kzalloc(sizeof(*gfpic), GFP_KERNEL);
> + if (!gfpic) {
> + ret = -ENOMEM;
> + goto out_err;
> + }
> +
> + parent_irq = irq_of_parse_and_map(of_node, 0);
> + if (!parent_irq) {
> + pr_err("Failed to map Goldfish PIC parent IRQ\n");
> + ret = -EINVAL;
> + goto out_free;
> + }
> +
> + ret = irq_set_handler_data(parent_irq, gfpic);
> + if (ret)
> + goto out_unmap_irq;
> +
> + gfpic->base = of_iomap(of_node, 0);
> + if (!gfpic->base) {
> + pr_err("Failed to map Goldfish PIC base\n");
> + ret = -ENOMEM;
> + goto out_unmap_irq;
> + }
> +
> + /* Mask interrupts. */
> + writel(1, gfpic->base + GFPIC_REG_IRQ_DISABLE_ALL);
> +
> + gc = irq_alloc_generic_chip("GFPIC", 1, GFPIC_IRQ_BASE, gfpic->base,
> + handle_level_irq);
> +
> + ct = gc->chip_types;
> + ct->regs.enable = GFPIC_REG_IRQ_ENABLE;
> + ct->regs.disable = GFPIC_REG_IRQ_DISABLE;
> + ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
> + ct->chip.irq_mask = irq_gc_mask_disable_reg;
> +
> + irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0, 0,
> + IRQ_NOPROBE | IRQ_LEVEL);
> +
> + gfpic->irq_domain = irq_domain_add_legacy(of_node, GFPIC_NR_IRQS,
> + GFPIC_IRQ_BASE, 0,
> + &goldfish_irq_domain_ops,
> + NULL);
> + if (!gfpic->irq_domain) {
> + pr_err("Failed to add irqdomain for Goldfish PIC\n");
> + ret = -EINVAL;
> + goto out_iounmap;
> + }
> +
> + setup_irq(parent_irq, &cascade);
> +
> + pr_info("Successfully registered Goldfish PIC\n");
> + return 0;
> +
> +out_iounmap:
> + iounmap(gfpic->base);
> +out_unmap_irq:
> + irq_dispose_mapping(parent_irq);
> +out_free:
> + kfree(gfpic);
> +out_err:
> + return ret;
> +}
> +
> +IRQCHIP_DECLARE(google_gf_pic, "google,goldfish-pic", goldfish_pic_of_init);
It otherwise looks much better than the previous versions.
Thanks,
M.
--
Jazz is not dead. It just smells funny.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v5 3/5] Documentation: Add device tree binding for Goldfish FB driver
2017-10-20 14:33 [PATCH v5 0/5] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
2017-10-20 14:33 ` [PATCH v5 1/5] Documentation: Add device tree binding for Goldfish PIC driver Aleksandar Markovic
2017-10-20 14:33 ` [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add " Aleksandar Markovic
@ 2017-10-20 14:33 ` Aleksandar Markovic
2017-10-27 3:10 ` Rob Herring
2017-10-20 14:33 ` Aleksandar Markovic
2017-10-20 14:33 ` [PATCH v5 5/5] MIPS: ranchu: Add Ranchu as a new generic-based board Aleksandar Markovic
4 siblings, 1 reply; 13+ messages in thread
From: Aleksandar Markovic @ 2017-10-20 14:33 UTC (permalink / raw)
To: linux-mips
Cc: Aleksandar Markovic, Miodrag Dinic, Goran Ferenc, David Airlie,
devicetree, Douglas Leung, dri-devel, James Hogan, linux-kernel,
Mark Rutland, Paul Burton, Petar Jovanovic, Raghu Gandham,
Rob Herring
From: Aleksandar Markovic <aleksandar.markovic@mips.com>
Add documentation for DT binding of Goldfish FB driver. The compatible
string used by OS for binding the driver is "google,goldfish-fb".
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
.../devicetree/bindings/display/google,goldfish-fb.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/google,goldfish-fb.txt
diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt
new file mode 100644
index 0000000..9ce0615
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt
@@ -0,0 +1,18 @@
+Android Goldfish framebuffer
+
+Android Goldfish framebuffer device used by Android emulator.
+
+Required properties:
+
+- compatible : should contain "google,goldfish-fb"
+- reg : <registers mapping>
+- interrupts : <interrupt mapping>
+
+Example:
+
+ goldfish_fb@1f008000 {
+ compatible = "google,goldfish-fb";
+ interrupts = <0x10>;
+ reg = <0x1f008000 0x0 0x100>;
+ compatible = "google,goldfish-fb";
+ };
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v5 3/5] Documentation: Add device tree binding for Goldfish FB driver
2017-10-20 14:33 ` [PATCH v5 3/5] Documentation: Add device tree binding for Goldfish FB driver Aleksandar Markovic
@ 2017-10-27 3:10 ` Rob Herring
0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2017-10-27 3:10 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: linux-mips, Aleksandar Markovic, Miodrag Dinic, Goran Ferenc,
David Airlie, devicetree, Douglas Leung, dri-devel, James Hogan,
linux-kernel, Mark Rutland, Paul Burton, Petar Jovanovic,
Raghu Gandham
On Fri, Oct 20, 2017 at 04:33:36PM +0200, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <aleksandar.markovic@mips.com>
>
> Add documentation for DT binding of Goldfish FB driver. The compatible
> string used by OS for binding the driver is "google,goldfish-fb".
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
> ---
> .../devicetree/bindings/display/google,goldfish-fb.txt | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/google,goldfish-fb.txt
>
> diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt
> new file mode 100644
> index 0000000..9ce0615
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt
> @@ -0,0 +1,18 @@
> +Android Goldfish framebuffer
> +
> +Android Goldfish framebuffer device used by Android emulator.
> +
> +Required properties:
> +
> +- compatible : should contain "google,goldfish-fb"
> +- reg : <registers mapping>
> +- interrupts : <interrupt mapping>
> +
> +Example:
> +
> + goldfish_fb@1f008000 {
Use generic node names:
display-controller@...
With that,
Acked-by: Rob Herring <robh@kernel.org>
> + compatible = "google,goldfish-fb";
> + interrupts = <0x10>;
> + reg = <0x1f008000 0x0 0x100>;
An address of one cell and size of 2 cells is strange...
> + compatible = "google,goldfish-fb";
> + };
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v5 3/5] Documentation: Add device tree binding for Goldfish FB driver
@ 2017-10-27 3:10 ` Rob Herring
0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2017-10-27 3:10 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: Mark Rutland, linux-mips, Raghu Gandham, Aleksandar Markovic,
devicetree, Goran Ferenc, dri-devel, linux-kernel, Paul Burton,
Petar Jovanovic, Miodrag Dinic, James Hogan, Douglas Leung
On Fri, Oct 20, 2017 at 04:33:36PM +0200, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <aleksandar.markovic@mips.com>
>
> Add documentation for DT binding of Goldfish FB driver. The compatible
> string used by OS for binding the driver is "google,goldfish-fb".
>
> Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
> ---
> .../devicetree/bindings/display/google,goldfish-fb.txt | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/google,goldfish-fb.txt
>
> diff --git a/Documentation/devicetree/bindings/display/google,goldfish-fb.txt b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt
> new file mode 100644
> index 0000000..9ce0615
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/google,goldfish-fb.txt
> @@ -0,0 +1,18 @@
> +Android Goldfish framebuffer
> +
> +Android Goldfish framebuffer device used by Android emulator.
> +
> +Required properties:
> +
> +- compatible : should contain "google,goldfish-fb"
> +- reg : <registers mapping>
> +- interrupts : <interrupt mapping>
> +
> +Example:
> +
> + goldfish_fb@1f008000 {
Use generic node names:
display-controller@...
With that,
Acked-by: Rob Herring <robh@kernel.org>
> + compatible = "google,goldfish-fb";
> + interrupts = <0x10>;
> + reg = <0x1f008000 0x0 0x100>;
An address of one cell and size of 2 cells is strange...
> + compatible = "google,goldfish-fb";
> + };
> --
> 2.7.4
>
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v5 4/5] video: goldfishfb: Add support for device tree bindings
2017-10-20 14:33 [PATCH v5 0/5] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
@ 2017-10-20 14:33 ` Aleksandar Markovic
2017-10-20 14:33 ` [PATCH v5 2/5] irqchip/irq-goldfish-pic: Add " Aleksandar Markovic
` (3 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Aleksandar Markovic @ 2017-10-20 14:33 UTC (permalink / raw)
To: linux-mips
Cc: Aleksandar Markovic, Miodrag Dinic, Goran Ferenc,
Bartlomiej Zolnierkiewicz, Douglas Leung, James Hogan,
linux-fbdev, linux-kernel, Paul Burton, Petar Jovanovic,
Raghu Gandham
From: Aleksandar Markovic <aleksandar.markovic@mips.com>
Add ability to the Goldfish FB driver to be recognized by OS via DT.
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
drivers/video/fbdev/goldfishfb.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/video/fbdev/goldfishfb.c b/drivers/video/fbdev/goldfishfb.c
index 7f6c9e6..3b70044 100644
--- a/drivers/video/fbdev/goldfishfb.c
+++ b/drivers/video/fbdev/goldfishfb.c
@@ -304,12 +304,18 @@ static int goldfish_fb_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id goldfish_fb_of_match[] = {
+ { .compatible = "google,goldfish-fb", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, goldfish_fb_of_match);
static struct platform_driver goldfish_fb_driver = {
.probe = goldfish_fb_probe,
.remove = goldfish_fb_remove,
.driver = {
- .name = "goldfish_fb"
+ .name = "goldfish_fb",
+ .of_match_table = goldfish_fb_of_match,
}
};
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v5 4/5] video: goldfishfb: Add support for device tree bindings
@ 2017-10-20 14:33 ` Aleksandar Markovic
0 siblings, 0 replies; 13+ messages in thread
From: Aleksandar Markovic @ 2017-10-20 14:33 UTC (permalink / raw)
To: linux-mips
Cc: Aleksandar Markovic, Miodrag Dinic, Goran Ferenc,
Bartlomiej Zolnierkiewicz, Douglas Leung, James Hogan,
linux-fbdev, linux-kernel, Paul Burton, Petar Jovanovic,
Raghu Gandham
From: Aleksandar Markovic <aleksandar.markovic@mips.com>
Add ability to the Goldfish FB driver to be recognized by OS via DT.
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
drivers/video/fbdev/goldfishfb.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/video/fbdev/goldfishfb.c b/drivers/video/fbdev/goldfishfb.c
index 7f6c9e6..3b70044 100644
--- a/drivers/video/fbdev/goldfishfb.c
+++ b/drivers/video/fbdev/goldfishfb.c
@@ -304,12 +304,18 @@ static int goldfish_fb_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id goldfish_fb_of_match[] = {
+ { .compatible = "google,goldfish-fb", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, goldfish_fb_of_match);
static struct platform_driver goldfish_fb_driver = {
.probe = goldfish_fb_probe,
.remove = goldfish_fb_remove,
.driver = {
- .name = "goldfish_fb"
+ .name = "goldfish_fb",
+ .of_match_table = goldfish_fb_of_match,
}
};
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v5 5/5] MIPS: ranchu: Add Ranchu as a new generic-based board
2017-10-20 14:33 [PATCH v5 0/5] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
` (3 preceding siblings ...)
2017-10-20 14:33 ` Aleksandar Markovic
@ 2017-10-20 14:33 ` Aleksandar Markovic
4 siblings, 0 replies; 13+ messages in thread
From: Aleksandar Markovic @ 2017-10-20 14:33 UTC (permalink / raw)
To: linux-mips
Cc: Miodrag Dinic, Goran Ferenc, Aleksandar Markovic, David S. Miller,
Douglas Leung, Greg Kroah-Hartman, James Hogan, linux-kernel,
Mauro Carvalho Chehab, Paul Burton, Paul Burton, Petar Jovanovic,
Raghu Gandham, Ralf Baechle, Randy Dunlap
From: Miodrag Dinic <miodrag.dinic@mips.com>
Provide amendments to the MIPS generic platform framework so that
the new generic-based board Ranchu can be chosen to be built.
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
MAINTAINERS | 6 +++
arch/mips/configs/generic/board-ranchu.config | 30 +++++++++++
arch/mips/generic/Kconfig | 10 ++++
arch/mips/generic/Makefile | 1 +
arch/mips/generic/board-ranchu.c | 78 +++++++++++++++++++++++++++
5 files changed, 125 insertions(+)
create mode 100644 arch/mips/configs/generic/board-ranchu.config
create mode 100644 arch/mips/generic/board-ranchu.c
diff --git a/MAINTAINERS b/MAINTAINERS
index f1be016..e429cc2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11308,6 +11308,12 @@ S: Maintained
F: Documentation/blockdev/ramdisk.txt
F: drivers/block/brd.c
+RANCHU VIRTUAL BOARD FOR MIPS
+M: Miodrag Dinic <miodrag.dinic@mips.com>
+L: linux-mips@linux-mips.org
+S: Supported
+F: arch/mips/generic/board-ranchu.c
+
RANDOM NUMBER DRIVER
M: "Theodore Ts'o" <tytso@mit.edu>
S: Maintained
diff --git a/arch/mips/configs/generic/board-ranchu.config b/arch/mips/configs/generic/board-ranchu.config
new file mode 100644
index 0000000..fee9ad4
--- /dev/null
+++ b/arch/mips/configs/generic/board-ranchu.config
@@ -0,0 +1,30 @@
+CONFIG_VIRT_BOARD_RANCHU=y
+
+CONFIG_BATTERY_GOLDFISH=y
+CONFIG_FB=y
+CONFIG_FB_GOLDFISH=y
+CONFIG_GOLDFISH=y
+CONFIG_STAGING=y
+CONFIG_GOLDFISH_AUDIO=y
+CONFIG_GOLDFISH_PIC=y
+CONFIG_GOLDFISH_PIPE=y
+CONFIG_GOLDFISH_TTY=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_GOLDFISH=y
+
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
+
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
+CONFIG_NETDEVICES=y
+CONFIG_VIRTIO_NET=y
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index e0436aa..93582be 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -42,4 +42,14 @@ config FIT_IMAGE_FDT_NI169445
Enable this to include the FDT for the 169445 platform from
National Instruments in the FIT kernel image.
+config VIRT_BOARD_RANCHU
+ bool "Ranchu platform for Android emulator"
+ help
+ This enables support for the platform used by Android emulator.
+
+ Ranchu platform consists of a set of virtual devices. This platform
+ enables emulation of variety of virtual configurations while using
+ Android emulator. Android emulator is based on Qemu, and contains
+ the support for the same set of virtual devices.
+
endif
diff --git a/arch/mips/generic/Makefile b/arch/mips/generic/Makefile
index 56b3ea5..2fee84a 100644
--- a/arch/mips/generic/Makefile
+++ b/arch/mips/generic/Makefile
@@ -15,3 +15,4 @@ obj-y += proc.o
obj-$(CONFIG_YAMON_DT_SHIM) += yamon-dt.o
obj-$(CONFIG_LEGACY_BOARD_SEAD3) += board-sead3.o
obj-$(CONFIG_KEXEC) += kexec.o
+obj-$(CONFIG_VIRT_BOARD_RANCHU) += board-ranchu.o
diff --git a/arch/mips/generic/board-ranchu.c b/arch/mips/generic/board-ranchu.c
new file mode 100644
index 0000000..500874d
--- /dev/null
+++ b/arch/mips/generic/board-ranchu.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2017 Imagination Technologies Ltd.
+ * Author: Miodrag Dinic <miodrag.dinic@imgtec.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/of_address.h>
+
+#include <asm/machine.h>
+#include <asm/time.h>
+
+#define GOLDFISH_TIMER_LOW 0x00
+#define GOLDFISH_TIMER_HIGH 0x04
+
+static __init uint64_t read_rtc_time(void __iomem *base)
+{
+ u64 time_low;
+ u64 time_high;
+
+ time_low = readl(base + GOLDFISH_TIMER_LOW);
+ time_high = readl(base + GOLDFISH_TIMER_HIGH);
+
+ return (time_high << 32) | time_low;
+}
+
+static __init unsigned int ranchu_measure_hpt_freq(void)
+{
+ u64 rtc_start, rtc_current, rtc_delta;
+ unsigned int start, count;
+ struct device_node *np;
+ void __iomem *rtc_base;
+
+ np = of_find_compatible_node(NULL, NULL, "google,goldfish-rtc");
+ if (!np)
+ panic("%s(): Failed to find 'google,goldfish-rtc' dt node!",
+ __func__);
+
+ rtc_base = of_iomap(np, 0);
+ if (!rtc_base)
+ panic("%s(): Failed to ioremap Goldfish RTC base!", __func__);
+
+ /*
+ * poll the nanosecond resolution RTC for 1 second
+ * to calibrate the CPU frequency
+ */
+ rtc_start = read_rtc_time(rtc_base);
+ start = read_c0_count();
+
+ do {
+ rtc_current = read_rtc_time(rtc_base);
+ rtc_delta = rtc_current - rtc_start;
+ } while (rtc_delta < NSEC_PER_SEC);
+
+ count = read_c0_count() - start;
+
+ count += 5000; /* round */
+ count -= count % 10000;
+
+ return count;
+}
+
+static const struct of_device_id ranchu_of_match[];
+
+MIPS_MACHINE(ranchu) = {
+ .matches = ranchu_of_match,
+ .measure_hpt_freq = ranchu_measure_hpt_freq,
+};
+
+static const struct of_device_id ranchu_of_match[] = {
+ {
+ .compatible = "mti,ranchu",
+ .data = &__mips_mach_ranchu,
+ },
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread