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From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling
Date: Tue, 26 Jun 2018 15:53:27 +0100	[thread overview]
Message-ID: <86fu197g60.wl-marc.zyngier@arm.com> (raw)
In-Reply-To: <e606924b-04e2-82df-0813-21c548259ff2@arm.com>

Hi Lei,

On Thu, 21 Jun 2018 13:02:11 +0100,
Marc Zyngier <marc.zyngier@arm.com> wrote:
> 
> Hi Lei,
> 
> On 21/06/18 11:57, Zhang, Lei wrote:
> > Hi Marc
> > 
> >> - If EnableLPI is already set to 1, your redistributors are already
> >>   potentially corrupting the memory by writing to the pending
> >>   tables. Your system is now potentially unstable (single bit
> >>   corruption, depending on what the ITS outputs).
> >>
> >> - If EnableLPI has become RES1, you cannot even turn it off to
> >>   reprogram things so that the property and pending tables are under
> >>   your control.
> > Thanks for you reply.
> > 
> > One more question.
> > If EnableLPIs bit becomes RES1 after EnableLPIs has been written to
> > 1, DKUMP/KEXEC case will enter kernel with GICR_CTLR.EnableLPIs=1. In
> > this case I do not think DKUMP/KEXEC can work well even use
> > irqchip.gicv3_nolpi, if secondary kernel need to use LPI such as the
> > disk is nvme. Am I right?
> 
> Absolutely. If you can only signal interrupts using LPIs, there isn't
> much you can do if you cannot disable LPIs the first place to
> reconfigure the interrupts. Your NVME device is pretty useless in that case.
> 
> What we could potentially do in the kdump case (and only in that case)
> would be to try to reuse the programmed tables and IDbits settings if
> EnableLPIs is RES1. This is absolutely awful, but it could get you
> going. Maybe.

For what it is worth, I've prototyped this solution, and it is less
horrible than I though:

https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gicv3-kdump

It should allow a system that reboots into a kdump kernel to use LPIs
with the same limitations (IDbits setting and memory) as the previous
one. It doesn't help for kexec though, as the whole memory map is
relinquished to the new kernel (and by the time we find out, it could
be too late to avoid fatal damage).

It could also be used to build in an hypothetical world where the
firmware allocates tables for the kernel, excluding them from the
memory map.

The whole thing, of course, requires careful thoughts, reviewing and
testing. I'd appreciate your feedback on the matter.

Thanks,

	M.

-- 
Jazz is not dead, it just smell funny.

      reply	other threads:[~2018-06-26 14:53 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-22  1:58 [PATCH v3] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling Shanker Donthineni
2018-03-22  1:58 ` Shanker Donthineni
2018-03-22 15:51 ` Marc Zyngier
2018-03-22 15:51   ` Marc Zyngier
2018-03-22 19:41   ` Shanker Donthineni
2018-03-22 19:41     ` Shanker Donthineni
2018-03-23  9:19     ` Marc Zyngier
2018-03-23  9:19       ` Marc Zyngier
2018-06-19 14:14       ` Zhang, Lei
2018-06-19 14:46         ` Marc Zyngier
2018-06-21 10:57           ` Zhang, Lei
2018-06-21 12:02             ` Marc Zyngier
2018-06-26 14:53               ` Marc Zyngier [this message]

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