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From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH v2 2/2] KVM: arm64: Virtualise PMEVTYPER<n>_EL1.{NSU,NSK}
Date: Wed, 18 Oct 2023 14:31:11 +0100	[thread overview]
Message-ID: <86o7gwm50g.wl-maz@kernel.org> (raw)
In-Reply-To: <20231013052901.170138-3-oliver.upton@linux.dev>

On Fri, 13 Oct 2023 06:29:01 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
> 
> Suzuki noticed that KVM's PMU emulation is oblivious to the NSU and NSK
> event filter bits. On systems that have EL3 these bits modify the
> filter behavior in non-secure EL0 and EL1, respectively. Even though the
> kernel doesn't use these bits, it is entirely possible some other guest
> OS does.

But what does it mean for KVM itself? We have no EL3 to speak of as
far as a guest is concerned. And the moment we allow things like
NSU/NSK to be set, why don't we allow M as well?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  parent reply	other threads:[~2023-10-18 13:31 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-13  5:28 [PATCH v2 0/2] KVM: arm64: PMU event filtering fixes Oliver Upton
2023-10-13  5:29 ` [PATCH v2 1/2] KVM: arm64: Treat PMEVTYPER<n>_EL0.NSH as RES0 Oliver Upton
2023-10-13  5:29 ` [PATCH v2 2/2] KVM: arm64: Virtualise PMEVTYPER<n>_EL1.{NSU,NSK} Oliver Upton
2023-10-13  5:56   ` Oliver Upton
2023-10-18 13:31   ` Marc Zyngier [this message]
2023-10-18 18:24     ` Oliver Upton
2023-10-19  7:20       ` Marc Zyngier
2023-10-16 12:47 ` [PATCH v2 0/2] KVM: arm64: PMU event filtering fixes Suzuki K Poulose

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