From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.linux.dev
Cc: kvm@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH v2 2/2] KVM: arm64: Virtualise PMEVTYPER<n>_EL1.{NSU,NSK}
Date: Thu, 12 Oct 2023 22:56:50 -0700 [thread overview]
Message-ID: <ZSjcIpdOGpSEjpu8@linux.dev> (raw)
In-Reply-To: <20231013052901.170138-3-oliver.upton@linux.dev>
On Fri, Oct 13, 2023 at 05:29:01AM +0000, Oliver Upton wrote:
> Suzuki noticed that KVM's PMU emulation is oblivious to the NSU and NSK
> event filter bits. On systems that have EL3 these bits modify the
> filter behavior in non-secure EL0 and EL1, respectively. Even though the
> kernel doesn't use these bits, it is entirely possible some other guest
> OS does.
>
> Implement the behavior of NSU and NSK as it appears in the pseudocode.
>
> Reported-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
This is obviously EL0, not EL1. Assuing there's no respin, I intend to
fix up the shortlog after applying the series.
--
Thanks,
Oliver
next prev parent reply other threads:[~2023-10-13 5:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 5:28 [PATCH v2 0/2] KVM: arm64: PMU event filtering fixes Oliver Upton
2023-10-13 5:29 ` [PATCH v2 1/2] KVM: arm64: Treat PMEVTYPER<n>_EL0.NSH as RES0 Oliver Upton
2023-10-13 5:29 ` [PATCH v2 2/2] KVM: arm64: Virtualise PMEVTYPER<n>_EL1.{NSU,NSK} Oliver Upton
2023-10-13 5:56 ` Oliver Upton [this message]
2023-10-18 13:31 ` Marc Zyngier
2023-10-18 18:24 ` Oliver Upton
2023-10-19 7:20 ` Marc Zyngier
2023-10-16 12:47 ` [PATCH v2 0/2] KVM: arm64: PMU event filtering fixes Suzuki K Poulose
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