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From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Akihiko Odaki <akihiko.odaki@daynix.com>,
	linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	James Morse <james.morse@arm.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	asahi@lists.linux.dev, Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Sven Peter <sven@svenpeter.dev>, Hector Martin <marcan@marcan.st>
Subject: Re: [PATCH v3 1/7] arm64/sysreg: Convert CCSIDR_EL1 to automatic generation
Date: Mon, 19 Dec 2022 15:27:17 +0000	[thread overview]
Message-ID: <86o7rzpg6i.wl-maz@kernel.org> (raw)
In-Reply-To: <Y6B8fzaFSwmJ5VC1@sirena.org.uk>

On Mon, 19 Dec 2022 15:00:15 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> [1  <text/plain; us-ascii (7bit)>]
> On Sun, Dec 18, 2022 at 01:11:01PM +0000, Marc Zyngier wrote:
> > Akihiko Odaki <akihiko.odaki@daynix.com> wrote:
> 
> > > arch/arm64/tools/gen-sysreg.awk does not allow a hole and requires all
> > > bits are described hence these descriptions. If you have an
> > > alternative idea I'd like to hear.
> 
> > I'd simply suggest creating an UNKNOWN field encompassing bits
> > [21:28]. Alternatively, feel free to try the patch below, which allows
> > you to describe these 4 bits as "Unkn	31:28", similar to Res0/Res1.
> 
> I agree, where practical we should add new field types and other
> features as needed rather than trying to shoehorn things into what the
> tool currently supports.  It is very much a work in progress which can't
> fully represent everything in the spec yet.  For things like the
> registers with multiple possible views it's much more effort which
> shouldn't get in the way of progress on features but with something like
> this just updating the tool so we can match the architecture spec is the
> right thing.

I was tempted to add a Namespace tag that wouldn't generate the sysreg
#defines, but only generate the fields with a feature-specific
namespace. For example:

Sysreg	CCSIDR_EL1	3	1	0	0	0
Res0	63:32
Unkn	31:28
Field	27:13	NumSets
Field	12:3	Associativity
Field	2:0	LineSize
EndSysreg

Namespace CCIDX CCSIDR_EL1
Res0	63:56
Field	55:32	NumSets
Res0	31:25
Field	24:3	Associativity
Field	2:0	LineSize
EndSysreg

the later generating:

#define CCIDR_EL1_CCIDX_RES0		(GENMASK(63, 56) | GENMASK(31, 25))
#define	CCIDR_EL1_CCIDX_NumSets		GENMASK(55, 32)
#define	CCIDR_EL1_CCIDX_Associativity	GENMASK(24, 3)
#define CCIDR_EL1_CCIDX_LineSize	GENMASK(2, 0)

Thoughts?

> 
> > Define an 'Unkn' field type modeled after the Res0/Res1 types
> > to allow such description. This allows the generation of
> 
> I'd be tempted to spell out Unknown fully since Unkn is not such a
> common abbreviation but I can see the desire to keep the name shorter
> and it doesn't really matter so either way:
> 
> Reviewed-by: Mark Brown <broonie@kernel.org>

Yeah, this stuff is write-only most of the time, and I like my fields
aligned if at all possible.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Hector Martin <marcan@marcan.st>,
	Akihiko Odaki <akihiko.odaki@daynix.com>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Will Deacon <will@kernel.org>, Sven Peter <sven@svenpeter.dev>,
	linux-kernel@vger.kernel.org, asahi@lists.linux.dev,
	Catalin Marinas <catalin.marinas@arm.com>,
	kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/7] arm64/sysreg: Convert CCSIDR_EL1 to automatic generation
Date: Mon, 19 Dec 2022 15:27:17 +0000	[thread overview]
Message-ID: <86o7rzpg6i.wl-maz@kernel.org> (raw)
In-Reply-To: <Y6B8fzaFSwmJ5VC1@sirena.org.uk>

On Mon, 19 Dec 2022 15:00:15 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> [1  <text/plain; us-ascii (7bit)>]
> On Sun, Dec 18, 2022 at 01:11:01PM +0000, Marc Zyngier wrote:
> > Akihiko Odaki <akihiko.odaki@daynix.com> wrote:
> 
> > > arch/arm64/tools/gen-sysreg.awk does not allow a hole and requires all
> > > bits are described hence these descriptions. If you have an
> > > alternative idea I'd like to hear.
> 
> > I'd simply suggest creating an UNKNOWN field encompassing bits
> > [21:28]. Alternatively, feel free to try the patch below, which allows
> > you to describe these 4 bits as "Unkn	31:28", similar to Res0/Res1.
> 
> I agree, where practical we should add new field types and other
> features as needed rather than trying to shoehorn things into what the
> tool currently supports.  It is very much a work in progress which can't
> fully represent everything in the spec yet.  For things like the
> registers with multiple possible views it's much more effort which
> shouldn't get in the way of progress on features but with something like
> this just updating the tool so we can match the architecture spec is the
> right thing.

I was tempted to add a Namespace tag that wouldn't generate the sysreg
#defines, but only generate the fields with a feature-specific
namespace. For example:

Sysreg	CCSIDR_EL1	3	1	0	0	0
Res0	63:32
Unkn	31:28
Field	27:13	NumSets
Field	12:3	Associativity
Field	2:0	LineSize
EndSysreg

Namespace CCIDX CCSIDR_EL1
Res0	63:56
Field	55:32	NumSets
Res0	31:25
Field	24:3	Associativity
Field	2:0	LineSize
EndSysreg

the later generating:

#define CCIDR_EL1_CCIDX_RES0		(GENMASK(63, 56) | GENMASK(31, 25))
#define	CCIDR_EL1_CCIDX_NumSets		GENMASK(55, 32)
#define	CCIDR_EL1_CCIDX_Associativity	GENMASK(24, 3)
#define CCIDR_EL1_CCIDX_LineSize	GENMASK(2, 0)

Thoughts?

> 
> > Define an 'Unkn' field type modeled after the Res0/Res1 types
> > to allow such description. This allows the generation of
> 
> I'd be tempted to spell out Unknown fully since Unkn is not such a
> common abbreviation but I can see the desire to keep the name shorter
> and it doesn't really matter so either way:
> 
> Reviewed-by: Mark Brown <broonie@kernel.org>

Yeah, this stuff is write-only most of the time, and I like my fields
aligned if at all possible.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Akihiko Odaki <akihiko.odaki@daynix.com>,
	linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	James Morse <james.morse@arm.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	asahi@lists.linux.dev, Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Sven Peter <sven@svenpeter.dev>, Hector Martin <marcan@marcan.st>
Subject: Re: [PATCH v3 1/7] arm64/sysreg: Convert CCSIDR_EL1 to automatic generation
Date: Mon, 19 Dec 2022 15:27:17 +0000	[thread overview]
Message-ID: <86o7rzpg6i.wl-maz@kernel.org> (raw)
In-Reply-To: <Y6B8fzaFSwmJ5VC1@sirena.org.uk>

On Mon, 19 Dec 2022 15:00:15 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> [1  <text/plain; us-ascii (7bit)>]
> On Sun, Dec 18, 2022 at 01:11:01PM +0000, Marc Zyngier wrote:
> > Akihiko Odaki <akihiko.odaki@daynix.com> wrote:
> 
> > > arch/arm64/tools/gen-sysreg.awk does not allow a hole and requires all
> > > bits are described hence these descriptions. If you have an
> > > alternative idea I'd like to hear.
> 
> > I'd simply suggest creating an UNKNOWN field encompassing bits
> > [21:28]. Alternatively, feel free to try the patch below, which allows
> > you to describe these 4 bits as "Unkn	31:28", similar to Res0/Res1.
> 
> I agree, where practical we should add new field types and other
> features as needed rather than trying to shoehorn things into what the
> tool currently supports.  It is very much a work in progress which can't
> fully represent everything in the spec yet.  For things like the
> registers with multiple possible views it's much more effort which
> shouldn't get in the way of progress on features but with something like
> this just updating the tool so we can match the architecture spec is the
> right thing.

I was tempted to add a Namespace tag that wouldn't generate the sysreg
#defines, but only generate the fields with a feature-specific
namespace. For example:

Sysreg	CCSIDR_EL1	3	1	0	0	0
Res0	63:32
Unkn	31:28
Field	27:13	NumSets
Field	12:3	Associativity
Field	2:0	LineSize
EndSysreg

Namespace CCIDX CCSIDR_EL1
Res0	63:56
Field	55:32	NumSets
Res0	31:25
Field	24:3	Associativity
Field	2:0	LineSize
EndSysreg

the later generating:

#define CCIDR_EL1_CCIDX_RES0		(GENMASK(63, 56) | GENMASK(31, 25))
#define	CCIDR_EL1_CCIDX_NumSets		GENMASK(55, 32)
#define	CCIDR_EL1_CCIDX_Associativity	GENMASK(24, 3)
#define CCIDR_EL1_CCIDX_LineSize	GENMASK(2, 0)

Thoughts?

> 
> > Define an 'Unkn' field type modeled after the Res0/Res1 types
> > to allow such description. This allows the generation of
> 
> I'd be tempted to spell out Unknown fully since Unkn is not such a
> common abbreviation but I can see the desire to keep the name shorter
> and it doesn't really matter so either way:
> 
> Reviewed-by: Mark Brown <broonie@kernel.org>

Yeah, this stuff is write-only most of the time, and I like my fields
aligned if at all possible.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-12-19 15:27 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-18  5:14 [PATCH v3 0/7] KVM: arm64: Normalize cache configuration Akihiko Odaki
2022-12-18  5:14 ` Akihiko Odaki
2022-12-18  5:14 ` Akihiko Odaki
2022-12-18  5:14 ` Akihiko Odaki
2022-12-18  5:14 ` [PATCH v3 1/7] arm64/sysreg: Convert CCSIDR_EL1 to automatic generation Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18 11:23   ` Marc Zyngier
2022-12-18 11:23     ` Marc Zyngier
2022-12-18 11:23     ` Marc Zyngier
2022-12-18 11:35     ` Akihiko Odaki
2022-12-18 11:35       ` Akihiko Odaki
2022-12-18 11:35       ` Akihiko Odaki
2022-12-18 13:11       ` Marc Zyngier
2022-12-18 13:11         ` Marc Zyngier
2022-12-18 13:11         ` Marc Zyngier
2022-12-19 15:00         ` Mark Brown
2022-12-19 15:00           ` Mark Brown
2022-12-19 15:00           ` Mark Brown
2022-12-19 15:27           ` Marc Zyngier [this message]
2022-12-19 15:27             ` Marc Zyngier
2022-12-19 15:27             ` Marc Zyngier
2022-12-19 17:52             ` Mark Brown
2022-12-19 17:52               ` Mark Brown
2022-12-19 17:52               ` Mark Brown
2022-12-18  5:14 ` [PATCH v3 2/7] arm64/sysreg: Add CCSIDR2_EL1 Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-19 15:01   ` Mark Brown
2022-12-19 15:01     ` Mark Brown
2022-12-19 15:01     ` Mark Brown
2022-12-18  5:14 ` [PATCH v3 3/7] arm64/cache: Move CLIDR macro definitions Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14 ` [PATCH v3 4/7] KVM: arm64: Always set HCR_TID2 Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14 ` [PATCH v3 5/7] KVM: arm64: Allow user to set CCSIDR_EL1 Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18 21:16   ` Marc Zyngier
2022-12-18 21:16     ` Marc Zyngier
2022-12-18 21:16     ` Marc Zyngier
2022-12-18  5:14 ` [PATCH v3 6/7] KVM: arm64: Mask FEAT_CCIDX Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14 ` [PATCH v3 7/7] KVM: arm64: Normalize cache configuration Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  5:14   ` Akihiko Odaki
2022-12-18  6:55   ` kernel test robot
2022-12-18  6:55     ` kernel test robot

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