[PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[Jesse Barnes]

Had the wrong bits and field definitions.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_reg.h     |    2 +-
 drivers/gpu/drm/i915/intel_sprite.c |    6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 03c53fc..558ac71 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2689,7 +2689,7 @@
 #define   DVS_FORMAT_RGBX888	(2<<25)
 #define   DVS_FORMAT_RGBX161616	(3<<25)
 #define   DVS_SOURCE_KEY	(1<<22)
-#define   DVS_RGB_ORDER_RGBX	(1<<20)
+#define   DVS_RGB_ORDER_XBGR	(1<<20)
 #define   DVS_YUV_BYTE_ORDER_MASK (3<<16)
 #define   DVS_YUV_ORDER_YUYV	(0<<16)
 #define   DVS_YUV_ORDER_UYVY	(1<<16)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 2288abf..a083504 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -225,16 +225,16 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
 
 	/* Mask out pixel format bits in case we change it */
 	dvscntr &= ~DVS_PIXFORMAT_MASK;
-	dvscntr &= ~DVS_RGB_ORDER_RGBX;
+	dvscntr &= ~DVS_RGB_ORDER_XBGR;
 	dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK;
 
 	switch (fb->pixel_format) {
 	case DRM_FORMAT_XBGR8888:
-		dvscntr |= DVS_FORMAT_RGBX888;
+		dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR;
 		pixel_size = 4;
 		break;
 	case DRM_FORMAT_XRGB8888:
-		dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_RGBX;
+		dvscntr |= DVS_FORMAT_RGBX888;
 		pixel_size = 4;
 		break;
 	case DRM_FORMAT_YUYV:
-- 
1.7.5.4

[PATCH 2/2] drm/i915: remove vblank wait around sprite buffer changes

[Jesse Barnes]

The docs made me paranoid about updating the surface reg too quickly,
but experiements have shown it to be safe on the two supported
platforms, so remove the waits to avoid blocking apps.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_sprite.c |   14 +-------------
 1 files changed, 1 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index a083504..b08c55f 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -489,20 +489,8 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 	}
 
 	/* Unpin old obj after new one is active to avoid ugliness */
-	if (old_obj) {
-		/*
-		 * It's fairly common to simply update the position of
-		 * an existing object.  In that case, we don't need to
-		 * wait for vblank to avoid ugliness, we only need to
-		 * do the pin & ref bookkeeping.
-		 */
-		if (old_obj != obj) {
-			mutex_unlock(&dev->struct_mutex);
-			intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
-			mutex_lock(&dev->struct_mutex);
-		}
+	if (old_obj)
 		i915_gem_object_unpin(old_obj);
-	}
 
 out_unlock:
 	mutex_unlock(&dev->struct_mutex);
-- 
1.7.5.4

Re: [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[Jesse Barnes]

Dave, not sure if Keith has setup his -fixes tree again, but this one
needs to go to Linus in your next pull assuming you're doing one.

Otherwise we can just send it to stable after 3.3 is out.

I have one more similar fix for the i915 fb init code that was
preventing us from using BGR formats (a fuller fix to make per-chipset
format lists for display and sprite can wait until -next).  I'll send
that after some testing today.

Thanks,
Jesse

On Mon, 27 Feb 2012 12:40:10 -0800
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Had the wrong bits and field definitions.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h     |    2 +-
>  drivers/gpu/drm/i915/intel_sprite.c |    6 +++---
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h index 03c53fc..558ac71 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2689,7 +2689,7 @@
>  #define   DVS_FORMAT_RGBX888	(2<<25)
>  #define   DVS_FORMAT_RGBX161616	(3<<25)
>  #define   DVS_SOURCE_KEY	(1<<22)
> -#define   DVS_RGB_ORDER_RGBX	(1<<20)
> +#define   DVS_RGB_ORDER_XBGR	(1<<20)
>  #define   DVS_YUV_BYTE_ORDER_MASK (3<<16)
>  #define   DVS_YUV_ORDER_YUYV	(0<<16)
>  #define   DVS_YUV_ORDER_UYVY	(1<<16)
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> b/drivers/gpu/drm/i915/intel_sprite.c index 2288abf..a083504 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -225,16 +225,16 @@ snb_update_plane(struct drm_plane *plane,
> struct drm_framebuffer *fb, 
>  	/* Mask out pixel format bits in case we change it */
>  	dvscntr &= ~DVS_PIXFORMAT_MASK;
> -	dvscntr &= ~DVS_RGB_ORDER_RGBX;
> +	dvscntr &= ~DVS_RGB_ORDER_XBGR;
>  	dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK;
>  
>  	switch (fb->pixel_format) {
>  	case DRM_FORMAT_XBGR8888:
> -		dvscntr |= DVS_FORMAT_RGBX888;
> +		dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR;
>  		pixel_size = 4;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -		dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_RGBX;
> +		dvscntr |= DVS_FORMAT_RGBX888;
>  		pixel_size = 4;
>  		break;
>  	case DRM_FORMAT_YUYV:

Re: [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[Keith Packard]

<#part sign=pgpmime>
On Wed, 7 Mar 2012 07:02:02 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Dave, not sure if Keith has setup his -fixes tree again, but this one
> needs to go to Linus in your next pull assuming you're doing one.

Yeah, I got home just in time to travel for a whole week. I'll get
things sorted out and merge 1/2 into my -fixes tree. 2/2 seems sketchy
to me.

-- 
keith.packard@intel.com

Re: [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[Jesse Barnes]

Keith Packard <keithp@keithp.com> wrote:

><#part sign=pgpmime>
>On Wed, 7 Mar 2012 07:02:02 -0800, Jesse Barnes
><jbarnes@virtuousgeek.org> wrote:
>
>> Dave, not sure if Keith has setup his -fixes tree again, but this one
>> needs to go to Linus in your next pull assuming you're doing one.
>
>Yeah, I got home just in time to travel for a whole week. I'll get
>things sorted out and merge 1/2 into my -fixes tree. 2/2 seems sketchy
>to me.
>
>-- 
>keith.packard@intel.com

Yeah, only 1/2 belongs in fixes.  The other one needs another patch on top to avoid unpinning an active buffer.
-- 
Jesse Barnes, Intel Open Source Technology Center

Re: [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[Keith Packard]

<#part sign=pgpmime>
On Wed, 07 Mar 2012 14:04:28 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Yeah, only 1/2 belongs in fixes.  The other one needs another patch on
> top to avoid unpinning an active buffer.

Hence 'sketchy' :-)

-- 
keith.packard@intel.com

Re: [PATCH 1/2] drm/i915: fix color order for BGR formats on SNB

[Keith Packard]

<#part sign=pgpmime>
On Mon, 27 Feb 2012 12:40:10 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Had the wrong bits and field definitions.

Merged.
   617cf88..ab2f9df  drm-intel-fixes -> drm-intel-fixes

-- 
keith.packard@intel.com